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  /frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/
fastidct.cpp 1862 ULong tmp4; local
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  /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
LegalizeDAG.cpp     [all...]
  /external/clang/test/CodeGen/
aarch64-neon-fma.c 221 // CHECK: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>
223 // CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[TMP4]], <2 x double> [[TMP5]], <2 x double> [[TMP3]]) #2
237 // CHECK: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>
239 // CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[TMP4]], <2 x double> [[TMP5]], <2 x double> [[TMP3]]) #2
aarch64-neon-intrinsics.c 643 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
645 // CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[TMP4]], <2 x float> [[TMP5]], <2 x float> [[TMP3]]) #4
656 // CHECK: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
658 // CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[TMP4]], <4 x float> [[TMP5]], <4 x float> [[TMP3]]) #4
669 // CHECK: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>
671 // CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[TMP4]], <2 x double> [[TMP5]], <2 x double> [[TMP3]]) #4
682 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
684 // CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[TMP4]], <2 x float> [[TMP5]], <2 x float> [[TMP3]]) #4
696 // CHECK: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
698 // CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[TMP4]], <4 x float> [[TMP5]], <4 x float> [[TMP3]]) #
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  /external/libvpx/libvpx/vp8/common/mips/msa/
bilinear_filter_msa.c 563 v8u16 hz_out0, hz_out1, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8; local
600 tmp4 = __msa_dotp_u_h(vec0, filt_vt);
602 SRARI_H2_UH(tmp3, tmp4, VP8_FILTER_SHIFT);
603 PCKEV_B2_SB(tmp2, tmp1, tmp4, tmp3, out0, out1);
  /external/llvm/test/CodeGen/ARM/
2007-05-22-tailmerge-3.ll 40 %tmp4 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
coalesce-subregs.ll 225 %tmp4 = bitcast <1 x i64> %tmp to <2 x float>
226 %tmp5 = shufflevector <2 x float> %tmp4, <2 x float> undef, <4 x i32> zeroinitializer
275 %tmp4 = shufflevector <2 x float> %tmp3, <2 x float> zeroinitializer, <2 x i32> <i32 1, i32 3>
276 %tmp5 = shufflevector <2 x float> %tmp4, <2 x float> undef, <2 x i32> <i32 1, i32 3>
vext.ll 192 %tmp4 = trunc i32 %tmp2 to i16
194 %tmp6 = insertelement <4 x i16> undef, i16 %tmp4, i32 0
  /external/llvm/test/CodeGen/PowerPC/
pr28130.ll 20 %tmp4 = bitcast %StructA* %tmp to <2 x double>*
  /external/llvm/test/CodeGen/X86/
sse2.ll 193 %tmp4 = fadd <4 x float> %tmp2, %tmp3 ; <<4 x float>> [#uses=1]
194 store <4 x float> %tmp4, <4 x float>* null
247 %tmp4 = shufflevector <4 x float> %tmp3, <4 x float> %tmp, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
248 ret <4 x float> %tmp4
misched-matrix.ll 105 %tmp4 = load i32, i32* %arrayidx8.2, align 4
150 %mul.2 = mul nsw i32 %tmp5, %tmp4
  /external/llvm/test/Transforms/SLPVectorizer/X86/
bswap.ll 108 ; SSE-NEXT: [[TMP4:%.*]] = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> [[TMP2]])
110 ; SSE-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* bitcast (i32* getelementptr inbounds ([8 x i32], [8 x i32]* @dst32, i32 0, i64 4) to <4 x i32>*), align 2
185 ; SSE-NEXT: [[TMP4:%.*]] = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> [[TMP2]])
187 ; SSE-NEXT: store <8 x i16> [[TMP4]], <8 x i16>* bitcast (i16* getelementptr inbounds ([16 x i16], [16 x i16]* @dst16, i16 0, i64 8) to <8 x i16>*), align 2
crash_mandeltext.ll 62 %tmp4 = fmul double %tmp3, undef
fma.ll 44 ; FMA-NEXT: [[TMP4:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[TMP1]], <2 x double> [[TMP2]], <2 x double> [[TMP3]])
45 ; FMA-NEXT: store <2 x double> [[TMP4]], <2 x double>* bitcast ([8 x double]* @dst64 to <2 x double>*), align 8
89 ; FMA-NEXT: [[TMP4:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> [[TMP1]], <4 x double> [[TMP2]], <4 x double> [[TMP3]])
90 ; FMA-NEXT: store <4 x double> [[TMP4]], <4 x double>* bitcast ([8 x double]* @dst64 to <4 x double>*), align 8
164 ; FMA256-NEXT: [[TMP4:%.*]] = load <4 x double>, <4 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @srcB64, i32 0, i64 4) to <4 x double>*), align 4
168 ; FMA256-NEXT: [[TMP8:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> [[TMP2]], <4 x double> [[TMP4]], <4 x double> [[TMP6]])
177 ; FMA512-NEXT: [[TMP4:%.*]] = call <8 x double> @llvm.fma.v8f64(<8 x double> [[TMP1]], <8 x double> [[TMP2]], <8 x double> [[TMP3]])
178 ; FMA512-NEXT: store <8 x double> [[TMP4]], <8 x double>* bitcast ([8 x double]* @dst64 to <8 x double>*), align 4
252 ; FMA-NEXT: [[TMP4:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[TMP1]], <4 x float> [[TMP2]], <4 x float> [[TMP3]])
253 ; FMA-NEXT: store <4 x float> [[TMP4]], <4 x float>* bitcast ([16 x float]* @dst32 to <4 x float>*), align
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  /external/llvm/test/CodeGen/AArch64/
arm64-ld1.ll 455 %tmp4 = insertelement <8 x i8> %tmp3, i8 %tmp1, i32 2
456 %tmp5 = insertelement <8 x i8> %tmp4, i8 %tmp1, i32 3
472 %tmp4 = insertelement <16 x i8> %tmp3, i8 %tmp1, i32 2
473 %tmp5 = insertelement <16 x i8> %tmp4, i8 %tmp1, i32 3
497 %tmp4 = insertelement <4 x i16> %tmp3, i16 %tmp1, i32 2
498 %tmp5 = insertelement <4 x i16> %tmp4, i16 %tmp1, i32 3
510 %tmp4 = insertelement <8 x i16> %tmp3, i16 %tmp1, i32 2
511 %tmp5 = insertelement <8 x i16> %tmp4, i16 %tmp1, i32 3
538 %tmp4 = insertelement <4 x i32> %tmp3, i32 %tmp1, i32 2
539 %tmp5 = insertelement <4 x i32> %tmp4, i32 %tmp1, i32
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  /external/llvm/test/Transforms/InstCombine/
x86-sse2.ll 193 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
194 ; CHECK-NEXT: ret double [[TMP4]]
233 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
234 ; CHECK-NEXT: ret double [[TMP4]]
273 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
274 ; CHECK-NEXT: ret double [[TMP4]]
  /bootable/recovery/tests/component/
applypatch_test.cpp 340 TemporaryFile tmp4; local
346 tmp4.path,
  /external/libjpeg-turbo/simd/
jfdctflt-sse-64.asm 148 subps xmm2,xmm1 ; xmm2=data3-data4=tmp4
283 subps xmm2,xmm1 ; xmm2=data3-data4=tmp4
jfdctflt-sse.asm 155 subps xmm2,xmm1 ; xmm2=data3-data4=tmp4
291 subps xmm2,xmm1 ; xmm2=data3-data4=tmp4
jfdctfst-mmx.asm 170 psubw mm2,mm1 ; mm2=data3-data4=tmp4
311 psubw mm2,mm1 ; mm2=data3-data4=tmp4
jidctflt-3dn.asm 255 pfadd mm4,mm2 ; mm4=tmp4
384 pfadd mm4,mm2 ; mm4=tmp4
  /external/llvm/lib/Transforms/Utils/
FlattenCFG.cpp 61 /// %cmp11 = fcmp une float %tmp3, %tmp4
75 /// %cmp11 = fcmp une float %tmp3, %tmp4
  /external/llvm/test/Analysis/ScalarEvolution/
trip-count7.ll 77 %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
78 br i1 %tmp4, label %bb.i.bb7.i.backedge_crit_edge, label %bb1.i
  /external/llvm/test/CodeGen/AMDGPU/
ctpop.ll 293 %tmp4 = load i32, i32 addrspace(1)* %tmp3
297 %tmp5 = phi i32 [%tmp2, %if], [%tmp4, %else]
madmk.ll 207 %tmp4 = fmul float %tmp, undef
208 %tmp7 = fmul float %tmp4, 0x40E55DD180000000

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