| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| Instruction.def | 130 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/IR/ |
| Instruction.def | 134 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/IR/ |
| Instruction.def | 134 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/IR/ |
| Instruction.def | 134 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/Target/GlobalISel/ |
| SelectionDAGCompat.td | 47 def : GINodeEquiv<G_UDIV, udiv>;
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/IR/ |
| Instruction.def | 134 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Target/GlobalISel/ |
| SelectionDAGCompat.td | 47 def : GINodeEquiv<G_UDIV, udiv>;
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/IR/ |
| Instruction.def | 134 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/GlobalISel/ |
| SelectionDAGCompat.td | 47 def : GINodeEquiv<G_UDIV, udiv>;
|
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/IR/ |
| Instruction.def | 134 HANDLE_BINARY_INST(17, UDiv , BinaryOperator)
|
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/GlobalISel/ |
| SelectionDAGCompat.td | 47 def : GINodeEquiv<G_UDIV, udiv>;
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/gc/ |
| go.go | 299 Udiv *obj.LSym
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/gc/ |
| go.go | 299 Udiv *obj.LSym
|
| /prebuilts/ndk/r16/sources/third_party/shaderc/third_party/spirv-tools/source/ |
| assembly_grammar.cpp | 110 CASE(UDiv),
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ft32/ |
| insn.s | 160 TERNARY udiv
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| ft32-opc.c | 61 { "udiv", 1, 0xf800000fU, 0xf0000000U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
|
| moxie-opc.c | 105 { 0x32, MOXIE_F1_AB, "udiv" },
|
| /external/llvm/test/CodeGen/ARM/ |
| vector-promotion.ll | 128 ; IR-NORMAL-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = udiv i32 [[EXTRACT]], 7
130 ; IR-STRESS-NEXT: [[DIV:%[a-zA-Z_0-9-]+]] = udiv <2 x i32> [[LOAD]], <i32 7, i32 7>
138 %out = udiv i32 %extract, 7
243 ; IR-BOTH-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = udiv i32 7, [[EXTRACT]]
249 %out = udiv i32 7, %extract
|
| /external/swiftshader/third_party/LLVM/include/llvm/Support/ |
| PatternMatch.h | 327 inline BinaryOp_match<LHS, RHS, Instruction::UDiv>
329 return BinaryOp_match<LHS, RHS, Instruction::UDiv>(L, R);
436 /// m_IDiv - Matches UDiv and SDiv.
438 inline BinOp2_match<LHS, RHS, Instruction::SDiv, Instruction::UDiv>
440 return BinOp2_match<LHS, RHS, Instruction::SDiv, Instruction::UDiv>(L, R);
|
| /external/llvm/lib/Support/ |
| APInt.cpp | [all...] |
| /external/swiftshader/third_party/llvm-subzero/lib/Support/ |
| APInt.cpp | [all...] |
| /external/valgrind/none/tests/arm64/ |
| integer.stdout.exp | [all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| shift.ll | 678 %div = udiv i32 %a, %shl2
695 ; CHECK-NEXT: [[DIV2:%.*]] = udiv i32 %a, [[DIV]]
699 %div2 = udiv i32 %a, %div
706 ; CHECK-NEXT: [[DIV2:%.*]] = udiv <2 x i32> %a, [[DIV]]
710 %div2 = udiv <2 x i32> %a, %div
721 %div2 = udiv i32 %a, %div
|
| /external/llvm/unittests/ADT/ |
| APIntTest.cpp | 187 EXPECT_EQ(neg_one, one.udiv(neg_one));
188 EXPECT_EQ(neg_one, neg_one.udiv(one));
189 EXPECT_EQ(one, neg_one.udiv(neg_one));
190 EXPECT_EQ(one, one.udiv(one));
427 auto q = p.udiv(a);
443 q = p.udiv(b);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 122 { ISD::UDIV, MVT::v16i16, 6 }, // vpmulhuw sequence
124 { ISD::UDIV, MVT::v8i32, 15 }, // vpmuludq sequence
228 { ISD::UDIV, MVT::v32i8, 32*20 },
229 { ISD::UDIV, MVT::v16i16, 16*20 },
230 { ISD::UDIV, MVT::v8i32, 8*20 },
231 { ISD::UDIV, MVT::v4i64, 4*20 },
274 { ISD::UDIV, MVT::v8i16, 6 }, // pmulhuw sequence
276 { ISD::UDIV, MVT::v4i32, 15 }, // pmuludq sequence
358 { ISD::UDIV, MVT::v16i8, 16*20 },
359 { ISD::UDIV, MVT::v8i16, 8*20 }
[all...] |
