/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/CodeGen/ |
MachineRegisterInfo.h | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.h | 38 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 65 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const; 66 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const; 68 SDValue lowerMulDiv(SDValue Op, unsigned NewOpc, bool HasLo, bool HasHi, 71 SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; 72 SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const; 73 SDValue lowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const; 74 SDValue lowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 75 SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; 78 SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 86 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; 87 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 88 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 89 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; 90 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 91 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; 92 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 93 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const; 94 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
MipsISelLowering.h | 104 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 128 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 129 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 130 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const; 131 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 132 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 133 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 134 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 135 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 136 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.h | 149 // Compiler barrier only; generate a no-op. 288 // ATOMIC_LOAD_<op>. 291 // Operand 1: the second operand of <op>, in the high bits of an i32 411 void LowerAsmOperandForConstraint(SDValue Op, 458 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 493 SDValue lowerSETCC(SDValue Op, SelectionDAG &DAG) const; 494 SDValue lowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 495 SDValue lowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 508 SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 509 SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.h | 28 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op, 30 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op, 33 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; 34 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const; 35 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const; 36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const; 37 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; 38 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 39 SDValue LowerFastFDIV(SDValue Op, SelectionDAG &DAG) const; 40 SDValue LowerFDIV32(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.h | 123 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const; 126 SDValue LowerEXTRACT_VECTOR(SDValue Op, SelectionDAG &DAG) const; 127 SDValue LowerINSERT_VECTOR(SDValue Op, SelectionDAG &DAG) const; 128 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; 129 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const; 130 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const; 131 SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) const; 132 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const; 133 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/Lanai/InstPrinter/ |
LanaiInstPrinter.cpp | 149 const MCOperand &Op = MI->getOperand(OpNo); 150 if (Op.isReg()) 151 OS << "%" << getRegisterName(Op.getReg()); 152 else if (Op.isImm()) 153 OS << formatHex(Op.getImm()); 155 assert(Op.isExpr() && "Expected an expression"); 156 Op.getExpr()->print(OS, &MAI); 162 const MCOperand &Op = MI->getOperand(OpNo); 163 if (Op.isImm()) { 164 OS << '[' << formatHex(Op.getImm()) << ']' [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 81 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const; 82 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 83 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 84 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; 85 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 86 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 87 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; 88 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
|
/external/swiftshader/third_party/subzero/pnacl-llvm/ |
NaClBitCodes.cpp | 78 const NaClBitCodeAbbrevOp &Op = Abbrev->getOperandInfo(Index); 79 Op.Print(Stream); 80 if (unsigned NumArgs = Op.NumArguments()) { 104 const NaClBitCodeAbbrevOp &Op = OperandList[i]; 108 // Op Array(Op) -> Array(Op) 109 assert(!Op.isArrayOp() || i == OperandList.size()-2); 110 while (Op.isArrayOp() && !Abbrev->OperandList.empty() && 114 Abbrev->OperandList.push_back(Op); [all...] |
/external/swiftshader/third_party/subzero/pydir/ |
gen_test_arith_ll.py | 1 def mangle(op, op_type, signed): 17 base = 'test' + op.capitalize() 20 def arith(Native, Type, Op): 25 %result{{trunc}} = {{op}} {{type}} %a{{trunc}}, %b{{trunc}} 30 Signed = Op in {'sdiv', 'srem', 'ashr'} 31 Name = mangle(Op, Type, Signed) 33 if Type == 'i1' and (Op not in {'and', 'or', 'xor'}): 42 lines = x.format(native=Native, type=Type, op=Op, name=Name, 47 for op in ['add', 'sub', 'mul', 'sdiv', 'udiv', 'srem', 'urem', 'shl', 'lshr' [all...] |
/prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
rewritegeneric.go | 17 switch v.Op { 480 if v_0.Op != OpConst16 { 485 if v_1.Op != OpConst16 { 499 if v_0.Op != OpConst16 { 504 if v_1.Op != OpConst16 { 519 if v_0.Op != OpMul16 { 526 if v_1.Op != OpMul16 { 549 if v_0.Op != OpMul16 { 556 if v_1.Op != OpMul16 { 579 if v_0.Op != OpMul16 [all...] |
/prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
rewritegeneric.go | 17 switch v.Op { 480 if v_0.Op != OpConst16 { 485 if v_1.Op != OpConst16 { 499 if v_0.Op != OpConst16 { 504 if v_1.Op != OpConst16 { 519 if v_0.Op != OpMul16 { 526 if v_1.Op != OpMul16 { 549 if v_0.Op != OpMul16 { 556 if v_1.Op != OpMul16 { 579 if v_0.Op != OpMul16 [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
XCoreISelLowering.h | 87 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 135 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; 136 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const; 137 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 138 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 139 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 140 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 141 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 142 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 143 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/AVR/ |
AVRISelLowering.h | 77 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 89 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, 111 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 118 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; 119 SDValue LowerDivRem(SDValue Op, SelectionDAG &DAG) const; 120 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 121 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 122 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 123 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const; 124 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const [all...] |