/external/llvm/test/MC/ARM/ |
single-precision-fp.s | 7 vdiv.f64 d4, d5, d6 8 vmul.f64 d6, d7, d8 15 @ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d6 17 @ CHECK-ERRORS-NEXT: vmul.f64 d6, d7, d8 22 vmls.f64 d8, d7, d6 26 vfms.f64 d4, d5, d6 32 @ CHECK-ERRORS-NEXT: vmls.f64 d8, d7, d6 40 @ CHECK-ERRORS-NEXT: vfms.f64 d4, d5, d6 60 vcmp.f64 d6, #0 70 @ CHECK-ERRORS-NEXT: vcmp.f64 d6, # [all...] |
neont2-pairwise-encoding.s | 20 vpaddl.u32 d6, d15 33 @ CHECK: vpaddl.u32 d6, d15 @ encoding: [0xb8,0xff,0x8f,0x62] 46 vpadal.u16 d12, d6 59 @ CHECK: vpadal.u16 d12, d6 @ encoding: [0xb4,0xff,0x86,0xc6] 89 vpmax.u8 d6, d23, d14 97 @ CHECK: vpmax.u8 d6, d23, d14 @ encoding: [0x07,0xff,0x8e,0x6a]
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68k/ |
mcf-mac.d | 129 1d6: aeee a0a9 000a macw %a1l,%a2u,%fp@\(10\)&,%sp [all...] |
mcf-emac.d | 262 3d6: aeee a0b9 000a macw %a1l,%a2u,%fp@\(10\)&,%sp,%acc2 [all...] |
mcf-emac.s | [all...] |
/external/libhevc/common/arm/ |
ihevc_itrans_recon_16x16.s | 225 vld1.16 d6,[r0],r10 238 @d6= r1 243 vmull.s16 q12,d6,d0[1] @// y1 * cos1(part of b0) 244 vmull.s16 q13,d6,d0[3] @// y1 * cos3(part of b1) 245 vmull.s16 q14,d6,d1[1] @// y1 * sin3(part of b2) 246 vmull.s16 q15,d6,d1[3] @// y1 * sin1(part of b3) 308 vld1.16 d6,[r0],r10 318 vmlal.s16 q12,d6,d2[1] @// y1 * cos1(part of b0) 319 vmlsl.s16 q13,d6,d1[1] @// y1 * cos3(part of b1) 320 vmlsl.s16 q14,d6,d3[1] @// y1 * sin3(part of b2 [all...] |
ihevc_intra_pred_filters_chroma_mode_11_to_17.s | 185 vrev64.16 d6,d6 193 vst1.8 d6,[r6]! 201 vld1.8 {d4,d5,d6},[r1]! 283 vmovn.s16 d6, q11 301 vand d6, d6, d29 @fract values in d1/ idx values in d0 315 vsub.s8 d7, d28, d6 @32-fract 326 vmlal.u8 q12, d13, d6 @mul (row 0) 336 vmlal.u8 q11, d17, d6 @mul (row 1 [all...] |
ihevc_intra_pred_chroma_planar.s | 154 vdup.s8 d6, r9 @nt - 1 - row 185 vmlal.u8 q6, d6, d10 @(nt-1-row) * src[2nt+1+col] 195 vmlal.u8 q14,d6,d11 200 vsub.s8 d19, d6, d7 @[nt-1-row]-- 220 vsub.s8 d6, d19, d7 @[nt-1-row]-- 232 vmlal.u8 q11, d6, d10 @(nt-1-row) * src[2nt+1+col] 241 vmlal.u8 q10,d6,d11 242 vsub.s8 d19, d6, d7 @[nt-1-row]-- 267 vsub.s8 d6, d19, d7 @[nt-1-row]-- 310 vdup.s8 d6, r9 @nt - 1 - ro [all...] |
ihevc_inter_pred_filters_luma_vert.s | 171 vld1.u8 {d6},[r3],r2 @src_tmp3 = vld1_u8(pu1_src_tmp)@ 176 vmlal.u8 q4,d6,d28 @mul_res1 = vmlal_u8(mul_res1, src_tmp3, coeffabs_6)@ 195 vmlsl.u8 q5,d6,d27 @mul_res2 = vmlsl_u8(mul_res2, src_tmp3, coeffabs_5)@ 213 vmlal.u8 q6,d6,d26 226 vmlal.u8 q7,d6,d25 233 vld1.u8 {d6},[r3],r2 @src_tmp3 = vld1_u8(pu1_src_tmp)@ 264 vmlal.u8 q4,d6,d28 @mul_res1 = vmlal_u8(mul_res1, src_tmp3, coeffabs_6)@ 287 vmlsl.u8 q5,d6,d27 @mul_res2 = vmlsl_u8(mul_res2, src_tmp3, coeffabs_5)@ 309 vmlal.u8 q6,d6,d26 333 vmlal.u8 q7,d6,d2 [all...] |
/external/boringssl/ios-arm/crypto/fipsmodule/ |
ghash-armv4.S | 377 vld1.64 d6,[r1] 381 vshr.u64 d26,d6,#63 400 vld1.64 d6,[r0]! 433 vld1.64 d6,[r2]! 440 vmull.p8 q8, d16, d6 @ F = A1*B 441 vext.8 d0, d6, d6, #1 @ B1 444 vmull.p8 q9, d18, d6 @ H = A2*B 445 vext.8 d22, d6, d6, #2 @ B [all...] |
/external/boringssl/linux-arm/crypto/fipsmodule/ |
ghash-armv4.S | 370 vld1.64 d6,[r1] 374 vshr.u64 d26,d6,#63 391 vld1.64 d6,[r0]! 422 vld1.64 d6,[r2]! 429 vmull.p8 q8, d16, d6 @ F = A1*B 430 vext.8 d0, d6, d6, #1 @ B1 433 vmull.p8 q9, d18, d6 @ H = A2*B 434 vext.8 d22, d6, d6, #2 @ B [all...] |
/external/capstone/suite/MC/ARM/ |
neon-vld-encoding.s.cs | 11 0x5f,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64] 12 0x8f,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3] 13 0xdf,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64] 15 0x5f,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64] 16 0x8f,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3] 17 0xdf,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64] 35 0x5d,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64]! 36 0x8d,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3]! 37 0xdd,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64]! 39 0x56,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64], r [all...] |
/external/vixl/test/aarch32/ |
test-assembler-cond-dt-drt-drd-drn-drm-float-not-f16-a32.cc | 102 {{F64, d22, d6, d1}, false, al, "F64 d22 d6 d1", "F64_d22_d6_d1"}, 104 {{F32, d15, d1, d6}, false, al, "F32 d15 d1 d6", "F32_d15_d1_d6"}, 110 {{F64, d4, d30, d6}, false, al, "F64 d4 d30 d6", "F64_d4_d30_d6"}, 117 {{F32, d29, d19, d6}, false, al, "F32 d29 d19 d6", "F32_d29_d19_d6"}, 126 {{F64, d19, d12, d6}, false, al, "F64 d19 d12 d6", "F64_d19_d12_d6"} [all...] |
test-assembler-cond-dt-drt-drd-drn-drm-float-not-f16-t32.cc | 102 {{F64, d22, d6, d1}, false, al, "F64 d22 d6 d1", "F64_d22_d6_d1"}, 104 {{F32, d15, d1, d6}, false, al, "F32 d15 d1 d6", "F32_d15_d1_d6"}, 110 {{F64, d4, d30, d6}, false, al, "F64 d4 d30 d6", "F64_d4_d30_d6"}, 117 {{F32, d29, d19, d6}, false, al, "F32 d29 d19 d6", "F32_d29_d19_d6"}, 126 {{F64, d19, d12, d6}, false, al, "F64 d19 d12 d6", "F64_d19_d12_d6"} [all...] |
/external/libavc/encoder/arm/ |
ime_distortion_metrics_a9q.s | 99 vld1.8 {d6, d7}, [r1], r3 102 vabdl.u8 q0, d6, d4 111 vld1.8 {d6, d7}, [r1], r3 114 vabal.u8 q0, d6, d4 181 vld1.8 {d6, d7}, [r1], r3 185 vabdl.u8 q0, d6, d4 194 vld1.8 {d6, d7}, [r1], r3 197 vabal.u8 q0, d6, d4 264 vld1.8 {d6, d7}, [r1], r3 269 vabdl.u8 q0, d6, d [all...] |
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
psn.d | 25 50: 09 f0 43 15 64 19 \[MMI\] lfetch.count.d6 \[r10\],63,-1024 50 d6: 00 00 00 02 00 00 nop.m 0x0 58 100: 0b 00 02 20 74 19 \[MMI\] lfetch.fault.d6 \[r16\];; 92 1b6: 00 ec 06 09 23 00 st1.d6 \[r65\]=r93 98 1d6: 00 e8 06 15 23 00 st2.d1 \[r65\]=r93 109 210: 08 00 76 83 8c 11 \[MMI\] st2.d6 \[r65\]=r93 125 266: 00 ec 06 29 23 00 st4.d6 \[r65\]=r93 142 2c0: 08 00 76 83 9c 11 \[MMI\] st8.d6 \[r65\]=r93 146 2d6: 00 e8 06 03 23 00 st16 \[r65\]=r93,ar.csd 160 320: 08 00 76 83 85 11 \[MMI\] st16.d6 \[r65\]=r93,ar.cs [all...] |
/external/libavc/common/arm/ |
ih264_inter_pred_filters_luma_vert_a9q.s | 126 vaddl.u8 q6, d4, d6 @ temp1 = src[2_0] + src[3_0] 137 vaddl.u8 q6, d6, d8 156 vaddl.u8 q10, d6, d0 168 vaddl.u8 q7, d6, d4 188 vaddl.u8 q7, d8, d6 @ temp = src[0_0] + src[5_0] 214 vld1.u32 d6, [r0], r2 216 vaddl.u8 q8, d1, d6 223 vaddl.u8 q5, d3, d6 228 vaddl.u8 q7, d5, d6 264 vld1.u32 d6[0], [r0], r [all...] |
ih264_weighted_pred_a9q.s | 138 vld1.32 d6[0], [r0], r2 @load row 3 in source 139 vld1.32 d6[1], [r0], r2 @load row 4 in source 142 vmovl.u8 q3, d6 @converting rows 3,4 to 16-bit 155 vqmovun.s16 d6, q3 @saturating rows 3,4 to unsigned 8-bit 159 vst1.32 d6[0], [r1], r3 @store row 3 in destination 160 vst1.32 d6[1], [r1], r3 @store row 4 in destination 169 vld1.8 d6, [r0], r2 @load row 2 in source 173 vmovl.u8 q3, d6 @converting row 2 to 16-bit 192 vqmovun.s16 d6, q3 @saturating row 2 to unsigned 8-bit 197 vst1.8 d6, [r1], r3 @store row 2 in destinatio [all...] |
/external/libmpeg2/common/arm/ |
impeg2_idct.s | 150 vld1.8 d6, [r2], r1 177 vaddw.u8 q10, q15, d6 182 vqmovun.s16 d6, q10 186 vst1.8 d6, [r3], r6 389 @// Row 1 First Half - D6 - y1 445 vld1.16 d6, [r0]! 447 vmull.s16 q12, d6, d0[1] @// y1 * cos1(part of b0) 449 vmull.s16 q13, d6, d0[3] @// y1 * cos3(part of b1) 451 vmull.s16 q14, d6, d1[1] @// y1 * sin3(part of b2) 453 vmull.s16 q15, d6, d1[3] @// y1 * sin1(part of b3 [all...] |
/external/libvpx/libvpx/vpx_dsp/arm/ |
idct8x8_add_neon.c | 25 uint8x8_t d0, d1, d2, d3, d4, d5, d6, d7; local 49 d6 = vld1_u8(dst); 59 d6_u16 = vaddw_u8(vreinterpretq_u16_s16(a6), d6); 68 d6 = vqmovun_s16(vreinterpretq_s16_u16(d6_u16)); 83 vst1_u8(dest, d6);
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/ |
zarch-z13.d | 54 .*: e7 f1 40 00 d6 61 [ ]*vmrh %v15,%v17,%v20,13 59 .*: e7 f1 40 00 d6 60 [ ]*vmrl %v15,%v17,%v20,13 64 .*: e7 f1 40 00 d6 94 [ ]*vpk %v15,%v17,%v20,13 68 .*: e7 f1 40 c0 d6 97 [ ]*vpks %v15,%v17,%v20,13,12 75 .*: e7 f1 40 c0 d6 95 [ ]*vpkls %v15,%v17,%v20,13,12 83 .*: e7 f1 40 00 d6 84 [ ]*vpdi %v15,%v17,%v20,13 116 .*: e7 f1 00 00 d4 d6 [ ]*vupl %v15,%v17,13 117 .*: e7 f1 00 00 04 d6 [ ]*vuplb %v15,%v17 118 .*: e7 f1 00 00 14 d6 [ ]*vuplhw %v15,%v17 119 .*: e7 f1 00 00 24 d6 [ ]*vuplf %v15,%v1 [all...] |
/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_neon_Blend.S | 91 vmull.u8 q3, d14, d6 117 vrshrn.u16 d6, q3, #8 175 vmull.u8 q0, d6, d16 177 vmull.u8 q1, d6, d18 179 vmull.u8 q2, d6, d20 181 vmull.u8 q3, d6, d22 207 vrshrn.u16 d6, q3, #8 220 vmull.u8 q3, d6, d22 246 vrshrn.u16 d6, q3, #8 275 vmull.u8 q8, d6, d1 [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
neont2-pairwise-encoding.s | 20 vpaddl.u32 d6, d15 33 @ CHECK: vpaddl.u32 d6, d15 @ encoding: [0xb8,0xff,0x8f,0x62] 46 vpadal.u16 d12, d6 59 @ CHECK: vpadal.u16 d12, d6 @ encoding: [0xb4,0xff,0x86,0xc6] 89 vpmax.u8 d6, d23, d14 97 @ CHECK: vpmax.u8 d6, d23, d14 @ encoding: [0x07,0xff,0x8e,0x6a]
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/system/core/libpixelflinger/ |
col32cb16blend_neon.S | 52 vld4.8 {d0[], d2[], d4[], d6[]}, [r1] // load color into four registers 57 // d6 = 8 equal alpha values 62 vshr.u8 d7, d6, #7 // extract top bit of alpha 63 vaddl.u8 q3, d6, d7 // add top bit into alpha
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/external/boringssl/src/crypto/curve25519/asm/ |
x25519-asm-arm.S | 70 vld1.8 {d6-d7},[r1] 72 vst1.8 {d6-d7},[r6,: 128] 186 vtrn.32 d4,d6 193 vtrn.32 d6,d0 198 vst1.8 d6,[r2,: 64] 265 vld1.8 {d6},[r7,: 64] 316 vld1.8 {d6-d7},[r4,: 128]! 338 vmlal.s32 q10,d6,d23 348 vmlal.s32 q1,d6,d1 351 vmull.s32 q14,d10,d6 [all...] |