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  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCFrameLowering.h 162 {PPC::R23, -36},
241 {PPC::R23, -68},
PPCRegisterInfo.cpp 108 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
134 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
  /prebuilts/go/darwin-x86/src/runtime/
asm_mips64x.s 24 MOVV $(-64*1024), R23
25 ADDV R23, R29, R1
287 MOVV $MAXSIZE, R23; \
288 SGTU R1, R23, R23; \
289 BNE R23, 3(PC); \
753 // g (R30) and REGTMP (R23) might be clobbered by load_g. They
755 MOVV R23, savedR23-16(SP)
764 MOVV savedR23-16(SP), R23
asm_mipsx.s 24 MOVW $(-64*1024), R23
25 ADD R23, R29, R1
287 MOVW $MAXSIZE, R23; \
288 SGTU R1, R23, R23; \
289 BNE R23, 3(PC); \
830 // g (R30), R3 and REGTMP (R23) might be clobbered by load_g. R30 and R23
832 MOVW R23, R8
841 MOVW R8, R23
    [all...]
rt0_linux_ppc64le.s 26 MOVD R23, 96(R1)
95 MOVD 96(R1), R23
  /prebuilts/go/linux-x86/src/runtime/
asm_mips64x.s 24 MOVV $(-64*1024), R23
25 ADDV R23, R29, R1
287 MOVV $MAXSIZE, R23; \
288 SGTU R1, R23, R23; \
289 BNE R23, 3(PC); \
753 // g (R30) and REGTMP (R23) might be clobbered by load_g. They
755 MOVV R23, savedR23-16(SP)
764 MOVV savedR23-16(SP), R23
asm_mipsx.s 24 MOVW $(-64*1024), R23
25 ADD R23, R29, R1
287 MOVW $MAXSIZE, R23; \
288 SGTU R1, R23, R23; \
289 BNE R23, 3(PC); \
830 // g (R30), R3 and REGTMP (R23) might be clobbered by load_g. R30 and R23
832 MOVW R23, R8
841 MOVW R8, R23
    [all...]
rt0_linux_ppc64le.s 26 MOVD R23, 96(R1)
95 MOVD 96(R1), R23
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
MBlazeRegisterInfo.cpp 61 MBlaze::R20, MBlaze::R21, MBlaze::R22, MBlaze::R23,
  /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/
operand_test.go 479 {"R23", "R23"},
612 {"R23", "R23"},
695 {"R23", "R23"},
  /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/
operand_test.go 479 {"R23", "R23"},
612 {"R23", "R23"},
695 {"R23", "R23"},
  /external/llvm/lib/Target/Hexagon/
HexagonFrameLowering.h 66 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },
  /external/llvm/lib/Target/Lanai/Disassembler/
LanaiDisassembler.cpp 159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
  /prebuilts/go/darwin-x86/src/hash/crc32/
crc32_ppc64le.s 81 MOVWZ 0(R19),R23 // tab[2][p[5]]
84 XOR R21,R23,R21 // xor done R23
87 ADD R10,R8,R23 // &tab[4][crc>>24]
89 MOVWZ 0(R23),R25 // tab[4][crc>>24]
  /prebuilts/go/linux-x86/src/hash/crc32/
crc32_ppc64le.s 81 MOVWZ 0(R19),R23 // tab[2][p[5]]
84 XOR R21,R23,R21 // xor done R23
87 ADD R10,R8,R23 // &tab[4][crc>>24]
89 MOVWZ 0(R23),R25 // tab[4][crc>>24]
  /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/
inst.go 86 R23
  /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/
inst.go 86 R23
  /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
SPURegisterInfo.cpp 77 case SPU::R23: return 23;
  /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/
DebugSupport.h 346 UINT64 R23;
  /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/
DebugSupport.h 312 UINT64 R23;
  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCInstrInfo.cpp 238 case R23:
525 (Reg >= Hexagon::R16 && Reg <= Hexagon::R23));
HexagonMCChecker.cpp 531 Register = Hexagon::R23;
HexagonMCDuplexInfo.cpp 677 case Hexagon::R23:
    [all...]
  /external/llvm/lib/Target/PowerPC/Disassembler/
PPCDisassembler.cpp 169 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
180 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
  /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/
DebugSupport.h 315 UINT64 R23;

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