1 //=- HexagonFrameLowering.h - Define frame lowering for Hexagon --*- C++ -*--=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H 11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H 12 13 #include "Hexagon.h" 14 #include "HexagonBlockRanges.h" 15 #include "llvm/Target/TargetFrameLowering.h" 16 17 namespace llvm { 18 19 class HexagonInstrInfo; 20 class HexagonRegisterInfo; 21 22 class HexagonFrameLowering : public TargetFrameLowering { 23 public: 24 explicit HexagonFrameLowering() 25 : TargetFrameLowering(StackGrowsDown, 8, 0, 1, true) {} 26 27 // All of the prolog/epilog functionality, including saving and restoring 28 // callee-saved registers is handled in emitPrologue. This is to have the 29 // logic for shrink-wrapping in one place. 30 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const 31 override; 32 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const 33 override {} 34 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 35 MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, 36 const TargetRegisterInfo *TRI) const override { 37 return true; 38 } 39 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 40 MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, 41 const TargetRegisterInfo *TRI) const override { 42 return true; 43 } 44 45 MachineBasicBlock::iterator 46 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 47 MachineBasicBlock::iterator I) const override; 48 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 49 RegScavenger *RS = nullptr) const override; 50 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 51 RegScavenger *RS) const override; 52 53 bool targetHandlesStackFrameRounding() const override { 54 return true; 55 } 56 int getFrameIndexReference(const MachineFunction &MF, int FI, 57 unsigned &FrameReg) const override; 58 bool hasFP(const MachineFunction &MF) const override; 59 60 const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries) 61 const override { 62 static const SpillSlot Offsets[] = { 63 { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 }, 64 { Hexagon::R19, -12 }, { Hexagon::R18, -16 }, { Hexagon::D9, -16 }, 65 { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 }, 66 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 }, 67 { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 }, 68 { Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 } 69 }; 70 NumEntries = array_lengthof(Offsets); 71 return Offsets; 72 } 73 74 bool assignCalleeSavedSpillSlots(MachineFunction &MF, 75 const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) 76 const override; 77 78 bool needsAligna(const MachineFunction &MF) const; 79 const MachineInstr *getAlignaInstr(const MachineFunction &MF) const; 80 81 void insertCFIInstructions(MachineFunction &MF) const; 82 83 private: 84 typedef std::vector<CalleeSavedInfo> CSIVect; 85 86 void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII, 87 unsigned SP, unsigned CF) const; 88 void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const; 89 void insertEpilogueInBlock(MachineBasicBlock &MBB) const; 90 bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI, 91 const HexagonRegisterInfo &HRI, bool &PrologueStubs) const; 92 bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, const CSIVect &CSI, 93 const HexagonRegisterInfo &HRI) const; 94 bool updateExitPaths(MachineBasicBlock &MBB, MachineBasicBlock *RestoreB, 95 BitVector &DoneT, BitVector &DoneF, BitVector &Path) const; 96 void insertCFIInstructionsAt(MachineBasicBlock &MBB, 97 MachineBasicBlock::iterator At) const; 98 99 void adjustForCalleeSavedRegsSpillCall(MachineFunction &MF) const; 100 101 bool expandCopy(MachineBasicBlock &B, MachineBasicBlock::iterator It, 102 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 103 SmallVectorImpl<unsigned> &NewRegs) const; 104 bool expandStoreInt(MachineBasicBlock &B, MachineBasicBlock::iterator It, 105 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 106 SmallVectorImpl<unsigned> &NewRegs) const; 107 bool expandLoadInt(MachineBasicBlock &B, MachineBasicBlock::iterator It, 108 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 109 SmallVectorImpl<unsigned> &NewRegs) const; 110 bool expandStoreVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It, 111 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 112 SmallVectorImpl<unsigned> &NewRegs) const; 113 bool expandLoadVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It, 114 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 115 SmallVectorImpl<unsigned> &NewRegs) const; 116 bool expandStoreVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It, 117 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 118 SmallVectorImpl<unsigned> &NewRegs) const; 119 bool expandLoadVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It, 120 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 121 SmallVectorImpl<unsigned> &NewRegs) const; 122 bool expandStoreVec(MachineBasicBlock &B, MachineBasicBlock::iterator It, 123 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 124 SmallVectorImpl<unsigned> &NewRegs) const; 125 bool expandLoadVec(MachineBasicBlock &B, MachineBasicBlock::iterator It, 126 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 127 SmallVectorImpl<unsigned> &NewRegs) const; 128 bool expandSpillMacros(MachineFunction &MF, 129 SmallVectorImpl<unsigned> &NewRegs) const; 130 131 unsigned findPhysReg(MachineFunction &MF, HexagonBlockRanges::IndexRange &FIR, 132 HexagonBlockRanges::InstrIndexMap &IndexMap, 133 HexagonBlockRanges::RegToRangeMap &DeadMap, 134 const TargetRegisterClass *RC) const; 135 void optimizeSpillSlots(MachineFunction &MF, 136 SmallVectorImpl<unsigned> &VRegs) const; 137 138 void findShrunkPrologEpilog(MachineFunction &MF, MachineBasicBlock *&PrologB, 139 MachineBasicBlock *&EpilogB) const; 140 141 void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI, 142 bool IsDef, bool IsKill) const; 143 bool shouldInlineCSR(llvm::MachineFunction &MF, const CSIVect &CSI) const; 144 bool useSpillFunction(MachineFunction &MF, const CSIVect &CSI) const; 145 bool useRestoreFunction(MachineFunction &MF, const CSIVect &CSI) const; 146 }; 147 148 } // End llvm namespace 149 150 #endif 151
