| /external/llvm/lib/CodeGen/ |
| AllocationOrder.cpp | 36 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
38 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix);
45 dbgs() << ' ' << PrintReg(Hints[I], TRI);
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| CriticalAntiDepBreaker.h | 36 const TargetRegisterInfo *TRI;
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| DeadMachineInstructionElim.cpp | 34 const TargetRegisterInfo *TRI;
103 TRI = MF.getSubtarget().getRegisterInfo();
151 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
167 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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| RegAllocBase.h | 61 const TargetRegisterInfo *TRI;
75 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
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| RegisterUsageInfo.cpp | 63 const TargetRegisterInfo *TRI;
83 TRI = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
86 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
88 OS << TRI->getName(PReg) << " ";
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| TargetFrameLoweringImpl.cpp | 63 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
66 // SavedRegs.size() == TRI.getNumRegs() after this call even if there are no
68 SavedRegs.resize(TRI.getNumRegs());
76 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF);
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| /external/llvm/lib/Target/AArch64/ |
| AArch64PBQPRegAlloc.h | 26 const TargetRegisterInfo *TRI;
|
| AArch64DeadRegisterDefinitionsPass.cpp | 38 const TargetRegisterInfo *TRI;
73 if (TRI->regsOverlap(Reg, MO.getReg()))
148 TRI = MF.getSubtarget().getRegisterInfo();
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| AArch64RegisterBankInfo.cpp | 28 AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)
34 addRegBankCoverage(AArch64::GPRRegBankID, AArch64::GPR64allRegClassID, TRI);
37 assert(RBGPR.covers(*TRI.getRegClass(AArch64::GPR32RegClassID)) &&
45 addRegBankCoverage(AArch64::FPRRegBankID, AArch64::QQQQRegClassID, TRI);
48 assert(RBFPR.covers(*TRI.getRegClass(AArch64::QQRegClassID)) &&
50 assert(RBFPR.covers(*TRI.getRegClass(AArch64::FPR64RegClassID)) &&
57 addRegBankCoverage(AArch64::CCRRegBankID, AArch64::CCRRegClassID, TRI);
60 assert(RBCCR.covers(*TRI.getRegClass(AArch64::CCRRegClassID)) &&
64 assert(verify(TRI) && "Invalid register bank information");
125 const TargetRegisterInfo &TRI = *STI.getRegisterInfo()
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| ProcessImplicitDefs.h | 29 const TargetRegisterInfo *TRI;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| AllocationOrder.cpp | 42 const TargetRegisterInfo &TRI = VRM.getTargetRegInfo();
45 TRI.getRawAllocationOrder(RC, HintPair.first, Hint,
60 Hint = TRI.ResolveRegAllocHint(HintPair.first, Hint,
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| CriticalAntiDepBreaker.h | 39 const TargetRegisterInfo *TRI;
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 28 const ARMBaseRegisterInfo &TRI;
39 const ARMBaseRegisterInfo &tri,
43 TRI(tri), STI(sti), LastMI(0), ITBlockSize(0) {}
|
| /external/llvm/include/llvm/CodeGen/ |
| LivePhysRegs.h | 44 const TargetRegisterInfo *TRI;
51 LivePhysRegs() : TRI(nullptr), LiveRegs() {}
54 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) {
55 assert(TRI && "Invalid TargetRegisterInfo pointer.");
56 LiveRegs.setUniverse(TRI->getNumRegs());
60 void init(const TargetRegisterInfo *TRI) {
61 assert(TRI && "Invalid TargetRegisterInfo pointer.");
62 this->TRI = TRI
[all...] |
| TailDuplicator.h | 32 const TargetRegisterInfo *TRI;
|
| /external/llvm/lib/CodeGen/GlobalISel/ |
| RegisterBank.cpp | 24 bool RegisterBank::verify(const TargetRegisterInfo &TRI) const {
26 assert(ContainedRegClasses.size() == TRI.getNumRegClasses() &&
27 "TRI does not match the initialization process?");
28 for (unsigned RCId = 0, End = TRI.getNumRegClasses(); RCId != End; ++RCId) {
29 const TargetRegisterClass &RC = *TRI.getRegClass(RCId);
40 const TargetRegisterClass &SubRC = *TRI.getRegClass(RCId);
75 void RegisterBank::dump(const TargetRegisterInfo *TRI) const {
76 print(dbgs(), /* IsForDebug */ true, TRI);
80 const TargetRegisterInfo *TRI) const {
90 if (!TRI || ContainedRegClasses.empty()
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 33 const TargetRegisterInfo *TRI;
|
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.cpp | 96 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
100 TRI->needsStackRealignment(MF);
105 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
107 return MFI->hasVarSizedObjects() && TRI->needsStackRealignment(MF);
112 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
121 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {
122 unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize();
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCQPXLoadSplat.cpp | 67 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
90 if (MI->modifiesRegister(SrcReg, TRI)) {
109 TRI->getSubRegIndex(SrcReg, MI->getOperand(0).getReg());
110 unsigned SplatSubReg = TRI->getSubReg(SplatReg, SubRegIndex);
115 MI->substituteRegister(SrcReg, SplatReg, 0, *TRI);
139 if (MI->modifiesRegister(SplatReg, TRI) ||
141 MI->readsRegister(SplatReg, TRI))) {
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyReplacePhysRegs.cpp | 67 const auto &TRI = *MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
83 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg);
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 34 const X86RegisterInfo *TRI;
82 const TargetRegisterInfo *TRI,
88 const TargetRegisterInfo *TRI) const override;
93 const TargetRegisterInfo *TRI) const override;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 33 const TargetRegisterInfo *TRI;
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| LivePhysRegs.h | 46 const TargetRegisterInfo *TRI = nullptr;
57 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) {
58 assert(TRI && "Invalid TargetRegisterInfo pointer.");
59 LiveRegs.setUniverse(TRI->getNumRegs());
63 void init(const TargetRegisterInfo &TRI) {
64 this->TRI = &TRI;
66 LiveRegs.setUniverse(TRI.getNumRegs())
[all...] |
| LiveRegUnits.h | 31 const TargetRegisterInfo *TRI = nullptr;
39 LiveRegUnits(const TargetRegisterInfo &TRI) {
40 init(TRI);
44 void init(const TargetRegisterInfo &TRI) {
45 this->TRI = &TRI;
47 Units.resize(TRI.getNumRegUnits());
58 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
65 for (MCRegUnitMaskIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
74 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit
[all...] |
| TailDuplicator.h | 35 const TargetRegisterInfo *TRI;
|
