1 //===-- RegAllocBase.h - basic regalloc interface and driver --*- C++ -*---===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the RegAllocBase class, which is the skeleton of a basic 11 // register allocation algorithm and interface for extending it. It provides the 12 // building blocks on which to construct other experimental allocators and test 13 // the validity of two principles: 14 // 15 // - If virtual and physical register liveness is modeled using intervals, then 16 // on-the-fly interference checking is cheap. Furthermore, interferences can be 17 // lazily cached and reused. 18 // 19 // - Register allocation complexity, and generated code performance is 20 // determined by the effectiveness of live range splitting rather than optimal 21 // coloring. 22 // 23 // Following the first principle, interfering checking revolves around the 24 // LiveIntervalUnion data structure. 25 // 26 // To fulfill the second principle, the basic allocator provides a driver for 27 // incremental splitting. It essentially punts on the problem of register 28 // coloring, instead driving the assignment of virtual to physical registers by 29 // the cost of splitting. The basic allocator allows for heuristic reassignment 30 // of registers, if a more sophisticated allocator chooses to do that. 31 // 32 // This framework provides a way to engineer the compile time vs. code 33 // quality trade-off without relying on a particular theoretical solver. 34 // 35 //===----------------------------------------------------------------------===// 36 37 #ifndef LLVM_LIB_CODEGEN_REGALLOCBASE_H 38 #define LLVM_LIB_CODEGEN_REGALLOCBASE_H 39 40 #include "llvm/CodeGen/LiveInterval.h" 41 #include "llvm/CodeGen/RegisterClassInfo.h" 42 43 namespace llvm { 44 45 template<typename T> class SmallVectorImpl; 46 class TargetRegisterInfo; 47 class VirtRegMap; 48 class LiveIntervals; 49 class LiveRegMatrix; 50 class Spiller; 51 52 /// RegAllocBase provides the register allocation driver and interface that can 53 /// be extended to add interesting heuristics. 54 /// 55 /// Register allocators must override the selectOrSplit() method to implement 56 /// live range splitting. They must also override enqueue/dequeue to provide an 57 /// assignment order. 58 class RegAllocBase { 59 virtual void anchor(); 60 protected: 61 const TargetRegisterInfo *TRI; 62 MachineRegisterInfo *MRI; 63 VirtRegMap *VRM; 64 LiveIntervals *LIS; 65 LiveRegMatrix *Matrix; 66 RegisterClassInfo RegClassInfo; 67 68 /// Inst which is a def of an original reg and whose defs are already all 69 /// dead after remat is saved in DeadRemats. The deletion of such inst is 70 /// postponed till all the allocations are done, so its remat expr is 71 /// always available for the remat of all the siblings of the original reg. 72 SmallPtrSet<MachineInstr *, 32> DeadRemats; 73 74 RegAllocBase() 75 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {} 76 77 virtual ~RegAllocBase() {} 78 79 // A RegAlloc pass should call this before allocatePhysRegs. 80 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat); 81 82 // The top-level driver. The output is a VirtRegMap that us updated with 83 // physical register assignments. 84 void allocatePhysRegs(); 85 86 // Include spiller post optimization and removing dead defs left because of 87 // rematerialization. 88 virtual void postOptimization(); 89 90 // Get a temporary reference to a Spiller instance. 91 virtual Spiller &spiller() = 0; 92 93 /// enqueue - Add VirtReg to the priority queue of unassigned registers. 94 virtual void enqueue(LiveInterval *LI) = 0; 95 96 /// dequeue - Return the next unassigned register, or NULL. 97 virtual LiveInterval *dequeue() = 0; 98 99 // A RegAlloc pass should override this to provide the allocation heuristics. 100 // Each call must guarantee forward progess by returning an available PhysReg 101 // or new set of split live virtual registers. It is up to the splitter to 102 // converge quickly toward fully spilled live ranges. 103 virtual unsigned selectOrSplit(LiveInterval &VirtReg, 104 SmallVectorImpl<unsigned> &splitLVRs) = 0; 105 106 // Use this group name for NamedRegionTimer. 107 static const char TimerGroupName[]; 108 109 /// Method called when the allocator is about to remove a LiveInterval. 110 virtual void aboutToRemoveInterval(LiveInterval &LI) {} 111 112 public: 113 /// VerifyEnabled - True when -verify-regalloc is given. 114 static bool VerifyEnabled; 115 116 private: 117 void seedLiveRegs(); 118 }; 119 120 } // end namespace llvm 121 122 #endif 123
