1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements an allocation order for virtual registers. 11 // 12 // The preferred allocation order for a virtual register depends on allocation 13 // hints and target hooks. The AllocationOrder class encapsulates all of that. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "AllocationOrder.h" 18 #include "llvm/CodeGen/MachineFunction.h" 19 #include "llvm/CodeGen/MachineRegisterInfo.h" 20 #include "llvm/CodeGen/RegisterClassInfo.h" 21 #include "llvm/CodeGen/VirtRegMap.h" 22 #include "llvm/Support/Debug.h" 23 #include "llvm/Support/raw_ostream.h" 24 25 using namespace llvm; 26 27 #define DEBUG_TYPE "regalloc" 28 29 // Compare VirtRegMap::getRegAllocPref(). 30 AllocationOrder::AllocationOrder(unsigned VirtReg, 31 const VirtRegMap &VRM, 32 const RegisterClassInfo &RegClassInfo, 33 const LiveRegMatrix *Matrix) 34 : Pos(0) { 35 const MachineFunction &MF = VRM.getMachineFunction(); 36 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo(); 37 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); 38 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); 39 rewind(); 40 41 DEBUG({ 42 if (!Hints.empty()) { 43 dbgs() << "hints:"; 44 for (unsigned I = 0, E = Hints.size(); I != E; ++I) 45 dbgs() << ' ' << PrintReg(Hints[I], TRI); 46 dbgs() << '\n'; 47 } 48 }); 49 #ifndef NDEBUG 50 for (unsigned I = 0, E = Hints.size(); I != E; ++I) 51 assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() && 52 "Target hint is outside allocation order."); 53 #endif 54 } 55
