1 //===- RegisterUsageInfo.cpp - Register Usage Informartion Storage --------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// This pass is required to take advantage of the interprocedural register 11 /// allocation infrastructure. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/CodeGen/RegisterUsageInfo.h" 16 #include "llvm/CodeGen/MachineOperand.h" 17 #include "llvm/IR/Module.h" 18 #include "llvm/Support/Debug.h" 19 #include "llvm/Support/raw_ostream.h" 20 21 using namespace llvm; 22 23 #define DEBUG_TYPE "ip-regalloc" 24 25 cl::opt<bool> DumpRegUsage( 26 "print-regusage", cl::init(false), cl::Hidden, 27 cl::desc("print register usage details collected for analysis.")); 28 29 INITIALIZE_PASS(PhysicalRegisterUsageInfo, "reg-usage-info", 30 "Register Usage Informartion Stroage", false, true) 31 32 char PhysicalRegisterUsageInfo::ID = 0; 33 34 void PhysicalRegisterUsageInfo::anchor() {} 35 36 bool PhysicalRegisterUsageInfo::doInitialization(Module &M) { 37 RegMasks.grow(M.size()); 38 return false; 39 } 40 41 bool PhysicalRegisterUsageInfo::doFinalization(Module &M) { 42 if (DumpRegUsage) 43 print(errs()); 44 45 RegMasks.shrink_and_clear(); 46 return false; 47 } 48 49 void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo( 50 const Function *FP, std::vector<uint32_t> RegMask) { 51 assert(FP != nullptr && "Function * can't be nullptr."); 52 RegMasks[FP] = std::move(RegMask); 53 } 54 55 const std::vector<uint32_t> * 56 PhysicalRegisterUsageInfo::getRegUsageInfo(const Function *FP) { 57 if (RegMasks.find(FP) != RegMasks.end()) 58 return &(RegMasks.find(FP)->second); 59 return nullptr; 60 } 61 62 void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const { 63 const TargetRegisterInfo *TRI; 64 65 typedef std::pair<const Function *, std::vector<uint32_t>> FuncPtrRegMaskPair; 66 67 SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector; 68 69 // Create a vector of pointer to RegMasks entries 70 for (const auto &RegMask : RegMasks) 71 FPRMPairVector.push_back(&RegMask); 72 73 // sort the vector to print analysis in alphabatic order of function name. 74 std::sort( 75 FPRMPairVector.begin(), FPRMPairVector.end(), 76 [](const FuncPtrRegMaskPair *A, const FuncPtrRegMaskPair *B) -> bool { 77 return A->first->getName() < B->first->getName(); 78 }); 79 80 for (const FuncPtrRegMaskPair *FPRMPair : FPRMPairVector) { 81 OS << FPRMPair->first->getName() << " " 82 << "Clobbered Registers: "; 83 TRI = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first)) 84 .getRegisterInfo(); 85 86 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { 87 if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg)) 88 OS << TRI->getName(PReg) << " "; 89 } 90 OS << "\n"; 91 } 92 } 93
