| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZInstrInfo.h | 78 const TargetRegisterInfo *TRI) const;
83 const TargetRegisterInfo *TRI) const;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86FrameLowering.h | 52 const TargetRegisterInfo *TRI) const;
57 const TargetRegisterInfo *TRI) const;
|
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| XCoreInstrInfo.h | 73 const TargetRegisterInfo *TRI) const;
79 const TargetRegisterInfo *TRI) const;
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| /external/llvm/lib/CodeGen/ |
| ImplicitNullChecks.cpp | 107 const TargetRegisterInfo *TRI = nullptr;
151 const TargetRegisterInfo &TRI;
156 explicit HazardDetector(const TargetRegisterInfo &TRI, AliasAnalysis &AA)
157 : TRI(TRI), hasSeenClobber(false), AA(AA) {}
236 if (!TRI.regsOverlap(Reg, MO.getReg()))
284 if (TRI.regsOverlap(Reg, MO.getReg()))
294 TRI = MF.getRegInfo().getTargetRegisterInfo();
310 static bool AnyAliasLiveIn(const TargetRegisterInfo *TRI,
312 for (MCRegAliasIterator AR(Reg, TRI, /*IncludeSelf*/ true); AR.isValid()
[all...] |
| InterferenceCache.h | 25 const TargetRegisterInfo *TRI;
113 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
116 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
121 const TargetRegisterInfo *TRI,
153 : TRI(nullptr), LIUArray(nullptr), MF(nullptr), PhysRegEntries(nullptr),
|
| LiveVariables.cpp | 197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
219 if (TRI->isSubRegister(Reg, DefReg)) {
220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true);
251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
263 for (MCSubRegIterator SS(SubReg, TRI); SS.isValid(); ++SS)
274 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
290 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
339 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
353 for (MCSubRegIterator SS(SubReg, TRI, /*IncludeSelf=*/true); SS.isValid();
369 PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true)
[all...] |
| VirtRegMap.cpp | 57 TRI = mf.getSubtarget().getRegisterInfo();
123 OS << '[' << PrintReg(Reg, TRI) << " -> "
124 << PrintReg(Virt2PhysMap[Reg], TRI) << "] "
125 << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n";
132 OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg]
133 << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n";
158 const TargetRegisterInfo *TRI;
214 TRI = MF->getSubtarget().getRegisterInfo();
341 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(SubRegIdx);
441 PhysReg = TRI->getSubReg(PhysReg, SubReg)
[all...] |
| RegisterCoalescer.cpp | 86 const TargetRegisterInfo* TRI;
278 static bool isMoveInstr(const TargetRegisterInfo &tri, const MachineInstr *MI,
288 DstSub = tri.composeSubRegIndices(MI->getOperand(0).getSubReg(),
320 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub))
338 Dst = TRI.getSubReg(Dst, DstSub);
345 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src));
361 NewRC = TRI.getCommonSuperRegClass(SrcRC, SrcSub, DstRC, DstSub,
368 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub);
372 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub);
375 NewRC = TRI.getCommonSubClass(DstRC, SrcRC)
[all...] |
| RegisterPressure.cpp | 57 const TargetRegisterInfo *TRI) {
61 dbgs() << TRI->getRegPressureSetName(i) << "=" << SetPressure[i] << '\n';
70 void RegisterPressure::dump(const TargetRegisterInfo *TRI) const {
72 dumpRegSetPressure(MaxSetPressure, TRI);
75 dbgs() << PrintVRegOrUnit(P.RegUnit, TRI);
83 dbgs() << PrintVRegOrUnit(P.RegUnit, TRI);
95 dumpRegSetPressure(CurrSetPressure, TRI);
97 P.dump(TRI);
100 void PressureDiff::dump(const TargetRegisterInfo &TRI) const {
105 dbgs() << sep << TRI.getRegPressureSetName(Change.getPSet()
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 32 const TargetRegisterInfo *TRI;
88 TRI = MF.getTarget().getRegisterInfo();
92 BitVector ReservedRegs = TRI->getReservedRegs(MF);
172 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
186 for (const unsigned *AliasSet = TRI->getAliasSet(Reg);
|
| LiveVariables.cpp | 193 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
215 if (TRI->isSubRegister(Reg, DefReg)) {
217 for (const unsigned *SubRegs = TRI->getSubRegisters(DefReg);
248 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
260 for (const unsigned *SS = TRI->getSubRegisters(SubReg); *SS; ++SS)
273 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
289 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
338 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
353 for (const unsigned *SS = TRI->getSubRegisters(SubReg); *SS; ++SS)
368 PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIFoldOperands.cpp | 100 const TargetRegisterInfo &TRI) {
113 Old.substVirtReg(New->getReg(), New->getSubReg(), TRI);
195 const SIInstrInfo *TII, const SIRegisterInfo &TRI,
213 TRI.getPhysRegClass(UseReg);
219 TRI.getRegClass(FoldDesc.OpInfo[0].RegClass);
241 TRI.getPhysRegClass(DestReg);
268 CopiesToReplace, TII, TRI, MRI);
303 const SIRegisterInfo &TRI = TII->getRegisterInfo();
361 CopiesToReplace, TII, TRI, MRI);
369 if (updateOperand(Fold, TRI)) {
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DbgValueHistoryCalculator.cpp | 152 const TargetRegisterInfo *TRI,
168 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
180 const TargetRegisterInfo *TRI,
182 BitVector ChangingRegs(TRI->getNumRegs());
183 collectChangingRegs(MF, TRI, ChangingRegs);
197 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
207 if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 34 const TargetRegisterInfo *TRI;
64 const TargetRegisterInfo *TRI) {
83 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
90 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
198 TrackDefUses(MI, Defs, Uses, TRI);
249 TrackDefUses(NMI, Defs, Uses, TRI);
281 TRI = STI.getRegisterInfo();
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 33 const TargetRegisterInfo *TRI;
58 const TargetRegisterInfo *TRI) {
78 for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
86 for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
181 TrackDefUses(MI, Defs, Uses, TRI);
227 TrackDefUses(NMI, Defs, Uses, TRI);
251 TRI = TM.getRegisterInfo();
|
| ARMHazardRecognizer.cpp | 20 const TargetRegisterInfo &TRI) {
30 return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI);
64 hasRAWHazard(DefMI, MI, TRI))) {
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64DeadRegisterDefinitionsPass.cpp | 38 const TargetRegisterInfo *TRI;
73 if (TRI->regsOverlap(Reg, MO.getReg()))
148 TRI = MF.getSubtarget().getRegisterInfo();
|
| AArch64StorePairSuppress.cpp | 31 const TargetRegisterInfo *TRI;
123 TRI = ST.getRegisterInfo();
148 if (TII->getMemOpBaseRegImmOfs(MI, BaseReg, Offset, TRI)) {
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/GlobalISel/ |
| InstructionSelector.h | 313 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
324 const TargetRegisterInfo &TRI,
338 const TargetRegisterInfo &TRI,
|
