| /external/mesa3d/src/intel/genxml/ |
| gen_pack_header.py | 313 def collect_dwords(self, dwords, start, dim):
317 field.collect_dwords(dwords, start + field.start, dim)
320 field.collect_dwords(dwords,
326 if not index in dwords:
327 dwords[index] = self.DWord()
333 dwords[index].fields.append(clone)
336 # assert dwords[index].address == None
337 dwords[index].address = field
339 # Coalesce all the dwords covered by this field. The two cases we
342 # completely covers multiple dwords
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_ioctl.c | 173 int dwords = (rmesa->radeon.cmdbuf.cs->section_ndw - rmesa->radeon.cmdbuf.cs->section_cdw); local
184 dwords -= 2;
188 cmd[1] |= (dwords + 3) << 16;
191 cmd[1] |= (dwords + 2) << 16;
195 rmesa->radeon.cmdbuf.cs->cdw += dwords;
196 rmesa->radeon.cmdbuf.cs->section_cdw += dwords;
|
| radeon_cmdbuf.h | 4 GLboolean rcommonEnsureCmdBufSpace(radeonContextPtr rmesa, int dwords, const char *caller);
31 * Prepare writing n dwords to the command buffer. Does not cause automatic
61 * Write n dwords from ptr to the command buffer.
69 * Finish writing dwords to the command buffer.
87 /** Single register write to command buffer; requires 2 dwords. */
93 * expects count dwords afterwards for register contents. */
|
| /external/syslinux/gpxe/src/net/infiniband/ |
| ib_cm.c | 382 conn, ntohl ( dgid->u.dwords[0] ), ntohl ( dgid->u.dwords[1] ),
383 ntohl ( dgid->u.dwords[2] ), ntohl ( dgid->u.dwords[3] ),
384 ntohl ( service_id->u.dwords[0] ),
385 ntohl ( service_id->u.dwords[1] ) );
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_compute.c | 144 uint32_t dwords = brw->gen < 8 ? 11 : 15; local
145 BEGIN_BATCH(dwords);
146 OUT_BATCH(GPGPU_WALKER << 16 | (dwords - 2) | indirect_flag);
|
| hsw_queryobj.c | 331 uint32_t dwords = (ptype == GL_INT || ptype == GL_UNSIGNED_INT) ? 1 : 2; local
334 BEGIN_BATCH(dwords * cmd_size);
335 for (int i = 0; i < dwords; i++) {
|
| gen7_sol_state.c | 295 const int dwords = brw->gen >= 8 ? 5 : 3; local
297 BEGIN_BATCH(dwords);
298 OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (dwords - 2));
301 if (dwords > 3) {
|
| intel_blit.c | 239 * for linear surfaces and DWords for tiled surfaces. So the maximum
716 * as a number of Dwords.
776 int dwords = ALIGN(src_size, 8) / 4; local
792 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
794 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
798 (3 * 4) + dwords * 4, BLT_RING);
835 OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
840 intel_batchbuffer_data(brw, src_bits, dwords * 4, BLT_RING);
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| fd2_emit.c | 69 unsigned size = align(cb->buffer_size, 4) / 4; /* size in dwords */
83 const uint32_t *dwords; local
86 dwords = cb->user_buffer;
89 dwords = fd_bo_map(rsc->bo);
92 dwords = (uint32_t *)(((uint8_t *)dwords) + cb->buffer_offset);
97 OUT_RING(ring, *(dwords++));
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/compiler-rt/builtins/ |
| int_types.h | 46 } dwords; typedef in typeref:union:__anon4064
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| EnablePaging64.S | 50 lret # topmost 2 dwords hold the address
|
| EnablePaging64.asm | 52 retf ; topmost 2 dwords hold the address
|
| /external/compiler-rt/lib/builtins/ |
| int_types.h | 46 } dwords; typedef in typeref:union:__anon17147
|
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_render.c | 186 * Check if the requested number of dwords is available in the CS and
190 * \param cs_dwords The number of dwords to reserve in CS.
288 * Check if the requested number of dwords is available in the CS and
293 * \param cs_dwords The number of dwords to reserve in CS.
343 /* Size of the vertex, in dwords. */
346 /* The number of dwords for this draw operation. */
347 unsigned dwords = 4 + info->count * vertex_size; local
349 /* Size of the vertex element, in dwords. */
353 * in dwords. */
362 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1)
973 unsigned dwords = 6; local
1117 unsigned dwords = 13 + vertex_size + local
[all...] |
| r300_emit.c | 1417 unsigned dwords = 0; local
1433 unsigned dwords = 0; local
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/ |
| EnablePaging64.asm | 50 retf ; topmost 2 dwords hold the address
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_parse.c | 314 const unsigned *dwords = (const unsigned *)tokens; local
322 debug_printf("0x%08x,\n", dwords[i]);
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| intel_blit.c | 528 int dwords = ALIGN(src_size, 8) / 4; local
544 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
546 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
551 dwords * 4);
576 OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
581 intel_batchbuffer_data(intel, src_bits, dwords * 4);
|
| /external/mesa3d/src/intel/vulkan/ |
| anv_cmd_buffer.c | 607 uint32_t dwords, uint32_t alignment)
613 dwords * 4, alignment);
615 for (uint32_t i = 0; i < dwords; i++)
621 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
689 cs_prog_data->push.cross_thread.dwords);
691 i < cs_prog_data->push.cross_thread.dwords;
703 unsigned src = cs_prog_data->push.cross_thread.dwords;
|
| gen8_cmd_buffer.c | 261 uint32_t dwords[GEN9_3DSTATE_WM_DEPTH_STENCIL_length]; local
275 GEN9_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, dwords, &wm_depth_stencil);
277 anv_batch_emit_merge(&cmd_buffer->batch, dwords,
|
| /external/syslinux/gpxe/src/drivers/net/phantom/ |
| phantom.c | 420 uint32_t dwords[2]; member in union:__anon37929
431 cache.dwords )) !=0 )
1431 } dwords; member in union:phantom_clp_data
1906 uint32_t dwords[3]; member in union:__anon37931
[all...] |
| /external/syslinux/gpxe/src/drivers/net/ |
| ipoib.c | 285 htonl ( mac->flags__qpn ), htonl ( mac->gid.u.dwords[0] ),
286 htonl ( mac->gid.u.dwords[1] ),
287 htonl ( mac->gid.u.dwords[2] ),
288 htonl ( mac->gid.u.dwords[3] ) );
|
| /external/syslinux/libinstaller/ |
| syslxmod.c | 143 dw = boot_image_len >> 2; /* COMPLETE dwords, excluding ADV */
146 set_32_sl(&patcharea->dwords, dw);
|
| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| disasm-a3xx.c | 829 static void print_instr(uint32_t *dwords, int level, int n)
831 instr_t *instr = (instr_t *)dwords;
836 printf("%s%04d[%08xx_%08xx] ", levels[level], n, dwords[1], dwords[0]);
870 int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, enum shader_t type)
877 print_instr(&dwords[i], level, i/2);
|
| /external/syslinux/gpxe/src/drivers/infiniband/ |
| linda.c | 120 * @v dwords Register buffer to read into
123 static void linda_readq ( struct linda *linda, uint32_t *dwords,
129 : : "r" ( dwords ), "r" ( addr ) : "memory" );
132 virt_to_phys ( addr ), dwords[1], dwords[0] );
135 linda_readq ( (_linda), (_ptr)->u.dwords, (_offset) )
145 * @v dwords Register buffer to write
148 static void linda_writeq ( struct linda *linda, const uint32_t *dwords,
153 virt_to_phys ( addr ), dwords[1], dwords[0] )
[all...] |
