/external/clang/test/SemaCXX/ |
function-extern-c.cpp | 36 extern "C" double f8(void);
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/external/compiler-rt/lib/tsan/rtl/ |
tsan_ppc_regs.h | 41 #define f8 8 macro
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/external/llvm/test/MC/ARM/ |
aligned-blx.s | 33 @ CHECK: ff f7 f8 ef blx _aligned
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/external/llvm/test/MC/Mips/ |
mips-reginfo-fp64.s | 51 # ceil.w.s - Reads $f8 and writes to $f10. 52 ceil.w.s $f10, $f8
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set-arch.s | 12 ldxc1 $f8, $2($4) 51 # CHECK: ldxc1 $f8, $2($4)
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/prebuilts/go/darwin-x86/test/fixedbugs/ |
issue6889.go | 19 f8 = f7 * 8 20 f9 = f8 * 9 18 f8 = f7 * 8 const
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/prebuilts/go/darwin-x86/test/ken/ |
robfunc.go | 45 func f8(a int) (x int, y float64) { func 83 r8, s8 = f8(1)
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/prebuilts/go/linux-x86/test/fixedbugs/ |
issue6889.go | 19 f8 = f7 * 8 20 f9 = f8 * 9 18 f8 = f7 * 8 const
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/prebuilts/go/linux-x86/test/ken/ |
robfunc.go | 45 func f8(a int) (x int, y float64) { func 83 r8, s8 = f8(1)
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/frv/ |
fr450-insn.d | 10 .*: 80 0d f8 00 lrai gr31,gr0,0x0,0x0,0x0 16 .*: 80 0d f8 40 lrad gr31,gr0,0x0,0x0,0x0
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allinsn.d | 195 000000f8 <umuli>: 196 f8: 84 68 20 00 umuli fp,0,fp 256 148: 82 f8 00 00 sethi hi\(0x0\),sp 387 000001f8 <nldhfu>: 388 1f8: 80 08 1e 41 nldhfu @\(sp,sp\),fr0 579 000002f8 <stfu>: 580 2f8: 80 0c 16 81 stfu fr0,@\(sp,sp\) 771 000003f8 <movgfq>: 772 3f8: 80 0c 05 c1 movgfq sp,fr0 802 420: a0 18 fe f8 beq icc0,0x0,0 <add [all...] |
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i860/ |
xp.s | 201 pfld.q 8192(%r6),%f8 209 pfld.q -512(%r12),%f8 216 pfld.q 256(%r2)++,%f8 224 pfld.q -16384(%r8)++,%f8 238 pfld.q %r0(%r5),%f8 246 pfld.q %r28(%r13),%f8 252 pfld.q %r7(%r2)++,%f8 260 pfld.q %r15(%r10)++,%f8
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iarith.d | 14 10: 00 f8 ae 81 addu %r31,%r13,%r14 25 3c: 00 f8 ae 91 adds %r31,%r13,%r14 36 68: 00 f8 ae 89 subu %r31,%r13,%r14 47 94: 00 f8 ae 99 subs %r31,%r13,%r14 72 f8: cd ab d7 96 adds -21555,%r22,%r23
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shift.d | 14 10: 00 f8 ae a1 shl %r31,%r13,%r14 25 3c: 00 f8 ae a9 shr %r31,%r13,%r14 36 68: 00 f8 ae b9 shra %r31,%r13,%r14 47 94: 00 f8 ae b1 shrd %r31,%r13,%r14 72 f8: cd ab d7 ae shr -21555,%r22,%r23
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branch.d | 22 30: 00 f8 00 40 bri %r31 34 60: 02 f8 00 4c calli %r31 78 f8: 00 00 00 a0 shl %r0,%r0,%r0
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/or1k/ |
allinsn.d | 40 4c: 07 ff ff f8 l\.jal 2c <l_jal> 44 54: 44 00 f8 00 l\.jr r31 54 74: 48 00 f8 00 l\.jalr r31 100 000000f8 <l_sys>: 101 f8: 20 00 00 00 l\.sys 0x0 183 1f8: 92 d0 86 a0 l\.lbs r22,-31072\(r16\) 238 2a4: e3 ff f8 08 l\.sll r31,r31,r31 258 2e4: e3 ff f8 48 l\.srl r31,r31,r31 263 2f8: e2 60 88 48 l\.srl r19,r0,r17 278 324: e3 ff f8 88 l\.sra r31,r31,r3 [all...] |
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/ppc/ |
astest2.d | 61 98: (41 a9 ff f8|f8 ff a9 41) bgt- cr2,90 <apfour\+0x14>
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/toolchain/binutils/binutils-2.27/ld/testsuite/ld-powerpc/ |
tlsopt5.d | 21 .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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/toolchain/binutils/binutils-2.27/ld/testsuite/ld-tilepro/ |
reloc.d | 13 100f8 .* 41 100f8: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; lw zero, zero }
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/sparc/ |
crypto.d | 15 14: 91 b1 26 06 aes_kexpand0 %f4, %f6, %f8 16 18: 94 c9 8f 08 aes_kexpand1 %f6, %f8, 0x7, %f10 17 1c: 94 c9 8d 08 aes_kexpand1 %f6, %f8, 0x6, %f10 18 20: 99 b2 26 2a aes_kexpand2 %f8, %f10, %f12 72 f8: 81 b0 29 23 montmul 3
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
r6.d | 12 0+0008 <[^>]*> 46083999 msubf.s \$f6,\$f7,\$f8 79 0+00f8 <[^>]*> 45bfffff bc1nez \$f31,000000f8 <[^>]*> 80 [ ]*f8: R_MIPS_PC16 external_label 152 0+01f8 <[^>]*> 7c432260 align a0,v0,v1,1 246 0+02f8 <[^>]*> 60028000 bnezalc v0,fffe02fc <[^>]*> 247 [ ]*2f8: R_MIPS_PC16 L0. 342 0+03f8 <[^>]*> 5c43ffff bltc v0,v1,000003f8 <[^>]*> 343 [ ]*3f8: R_MIPS_PC16 .L1. [all...] |
r6-removed.l | 139 .*:140: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f5,\$f6,\$f7,\$f8' 140 .*:141: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f6,\$f8,\$f10,\$f12' 141 .*:142: Error: opcode not supported on this processor: .* \(.*\) `madd.ps \$f6,\$f8,\$f10,\$f12' 146 .*:147: Error: opcode not supported on this processor: .* \(.*\) `movf.s \$f8,\$f9,\$fcc0' 147 .*:148: Error: opcode not supported on this processor: .* \(.*\) `movf.d \$f8,\$f10,\$fcc0' 148 .*:149: Error: opcode not supported on this processor: .* \(.*\) `movf.ps \$f8,\$f10,\$fcc0' 163 .*:164: Error: opcode not supported on this processor: .* \(.*\) `msub.s \$f5,\$f6,\$f7,\$f8' 164 .*:165: Error: opcode not supported on this processor: .* \(.*\) `msub.d \$f6,\$f8,\$f10,\$f12' 165 .*:166: Error: opcode not supported on this processor: .* \(.*\) `msub.ps \$f6,\$f8,\$f10,\$f12' 172 .*:173: Error: opcode not supported on this processor: .* \(.*\) `nmadd.s \$f5,\$f6,\$f7,\$f8' [all...] |
24k-triple-stores-1.d | 71 f8: f7a60020 sdc1 \$f6,32\(sp\) 93 150: 4d0d4009 sdxc1 \$f8,t5\(t0\) 100 16c: 4d0d400d suxc1 \$f8,t5\(t0\)
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/external/syslinux/gpxe/src/crypto/axtls/ |
aes.c | 53 #define inv_mix_col(x,f2,f4,f8,f9) (\ 56 (f8)=mul2(f4,f8), \ 57 (f9)=(x)^(f8), \ 58 (f8)=((f2)^(f4)^(f8)), \ 61 (f8)^=rot3(f2), \ 62 (f8)^=rot2(f4), \ 63 (f8)^rot1(f9))
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/external/webrtc/webrtc/modules/audio_processing/aec/ |
aec_core_mips.c | 345 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13; local 359 "mul.s %[f8], %[f0], %[f1] \n\t" 371 "sub.s %[f8], %[f8], %[f12] \n\t" 383 "nmsub.s %[f8], %[f8], %[f2], %[f3] \n\t" 392 "add.s %[f2], %[f2], %[f8] \n\t" 409 "mul.s %[f8], %[f0], %[f1] \n\t" 414 "sub.s %[f8], %[f8], %[f12] \n\t 465 float f0, f1, f2, f3, f4, f5, f6 ,f7, f8, f9, f10, f11, f12; local [all...] |