1 #as: -mcpu=fr450 2 #objdump: -dr 3 4 .*: file format elf32-frv(|fdpic) 5 6 Disassembly of section \.text: 7 8 00000000 <.*>: 9 # 10 .*: 80 0d f8 00 lrai gr31,gr0,0x0,0x0,0x0 11 .*: be 0c 08 00 lrai gr0,gr31,0x0,0x0,0x0 12 .*: 80 0c 08 20 lrai gr0,gr0,0x1,0x0,0x0 13 .*: 80 0c 08 10 lrai gr0,gr0,0x0,0x1,0x0 14 .*: 80 0c 08 08 lrai gr0,gr0,0x0,0x0,0x1 15 # 16 .*: 80 0d f8 40 lrad gr31,gr0,0x0,0x0,0x0 17 .*: be 0c 08 40 lrad gr0,gr31,0x0,0x0,0x0 18 .*: 80 0c 08 60 lrad gr0,gr0,0x1,0x0,0x0 19 .*: 80 0c 08 50 lrad gr0,gr0,0x0,0x1,0x0 20 .*: 80 0c 08 48 lrad gr0,gr0,0x0,0x0,0x1 21 # 22 .*: 80 0d f9 00 tlbpr gr31,gr0,0x0,0x0 23 .*: 80 0c 09 1f tlbpr gr0,gr31,0x0,0x0 24 .*: 9c 0c 09 00 tlbpr gr0,gr0,0x7,0x0 25 .*: 82 0c 09 00 tlbpr gr0,gr0,0x0,0x1 26 # 27 .*: 81 e1 e4 00 mqlclrhs fr30,fr0,fr0 28 .*: 81 e0 04 1e mqlclrhs fr0,fr30,fr0 29 .*: bd e0 04 00 mqlclrhs fr0,fr0,fr30 30 # 31 .*: 81 e1 e5 00 mqlmths fr30,fr0,fr0 32 .*: 81 e0 05 1e mqlmths fr0,fr30,fr0 33 .*: bd e0 05 00 mqlmths fr0,fr0,fr30 34 # 35 .*: 81 e1 e4 40 mqsllhi fr30,0x0,fr0 36 .*: 81 e0 04 7f mqsllhi fr0,0x3f,fr0 37 .*: bd e0 04 40 mqsllhi fr0,0x0,fr30 38 # 39 .*: 81 e1 e4 c0 mqsrahi fr30,0x0,fr0 40 .*: 81 e0 04 ff mqsrahi fr0,0x3f,fr0 41 .*: bd e0 04 c0 mqsrahi fr0,0x0,fr30 42
