| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-bitwise-encoding.s | 21 vorr.i32 d16, #0x1000000
22 vorr.i32 q8, #0x1000000
23 vorr.i32 q8, #0x0
25 @ FIXME: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
26 @ FIXME: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
27 @ FIXME: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2]
31 vbic.i32 d16, #0xFF000000
32 vbic.i32 q8, #0xFF000000
36 @ FIXME: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
37 @ FIXME: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xf3
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 77 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass);
86 // Use i32 for setcc operations results (slt, sgt, ...).
91 setOperationAction(ISD::BR_CC, MVT::i32, Expand);
92 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
93 setOperationAction(ISD::ADDC, MVT::i32, Expand);
94 setOperationAction(ISD::ADDE, MVT::i32, Expand);
95 setOperationAction(ISD::SUBC, MVT::i32, Expand);
96 setOperationAction(ISD::SUBE, MVT::i32, Expand);
101 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom);
102 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom)
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-mov-encoding.s | 6 vmov.i32 d16, #0x20
7 vmov.i32 d16, #0x2000
8 vmov.i32 d16, #0x200000
9 vmov.i32 d16, #0x20000000
10 vmov.i32 d16, #0x20FF
11 vmov.i32 d16, #0x20FFFF
17 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
18 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
19 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
20 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2
[all...] |
| neon-bitwise-encoding.s | 22 vorr.i32 d16, #0x1000000
23 vorr.i32 q8, #0x1000000
24 vorr.i32 q8, #0x0
26 @ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
27 @ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
28 @ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2]
38 vbic.i32 d16, #0xFF000000
39 vbic.i32 q8, #0xFF000000
40 vbic.i32 d16, #0x00FF0000
41 vbic.i32 q8, #0x00FF000
[all...] |
| /external/capstone/suite/MC/ARM/ |
| neon-mov-encoding.s.cs | 5 0x10,0x00,0xc2,0xf2 = vmov.i32 d16, #0x20
6 0x10,0x02,0xc2,0xf2 = vmov.i32 d16, #0x2000
7 0x10,0x04,0xc2,0xf2 = vmov.i32 d16, #0x200000
8 0x10,0x06,0xc2,0xf2 = vmov.i32 d16, #0x20000000
9 0x10,0x0c,0xc2,0xf2 = vmov.i32 d16, #0x20ff
10 0x10,0x0d,0xc2,0xf2 = vmov.i32 d16, #0x20ffff
15 0x50,0x00,0xc2,0xf2 = vmov.i32 q8, #0x20
16 0x50,0x02,0xc2,0xf2 = vmov.i32 q8, #0x2000
17 0x50,0x04,0xc2,0xf2 = vmov.i32 q8, #0x200000
18 0x50,0x06,0xc2,0xf2 = vmov.i32 q8, #0x2000000
[all...] |
| neon-mul-encoding.s.cs | 4 0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17
8 0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9
15 0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17
19 0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9
48 0x42,0x38,0xa3,0xf2 = vmul.i32 d3, d3, d2[0]
49 0x63,0x48,0xa4,0xf2 = vmul.i32 d4, d4, d3[1]
50 0x44,0x58,0xa5,0xf2 = vmul.i32 d5, d5, d4[0]
55 0x42,0x68,0xa6,0xf3 = vmul.i32 q3, q3, d2[0]
56 0x63,0x88,0xa8,0xf3 = vmul.i32 q4, q4, d3[1]
57 0x44,0xa8,0xaa,0xf3 = vmul.i32 q5, q5, d4[0
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 136 SDValue RetAddrOffsetNode = DAG.getConstant(RetAddrOffset, MVT::i32);
175 SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
176 SDValue Arg = DAG.getLoad(MVT::i32, dl, Chain, FIPtr,
188 SDValue HiVal = DAG.getCopyFromReg(Chain, dl, VRegHi, MVT::i32);
197 SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
198 LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr,
204 LoVal = DAG.getCopyFromReg(Chain, dl, loReg, MVT::i32);
214 SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
217 else if (VA.getLocVT() != MVT::i32) {
218 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg
[all...] |
| SparcISelDAGToDAG.cpp | 76 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
77 Offset = CurDAG->getTargetConstant(0, MVT::i32);
90 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
94 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), MVT::i32);
110 Offset = CurDAG->getTargetConstant(0, MVT::i32);
133 R2 = CurDAG->getRegister(SP::G0, MVT::i32);
156 TopPart = SDValue(CurDAG->getMachineNode(SP::SRAri, dl, MVT::i32, DivLHS,
157 CurDAG->getTargetConstant(31, MVT::i32)), 0);
159 TopPart = CurDAG->getRegister(SP::G0, MVT::i32);
162 CurDAG->getRegister(SP::G0, MVT::i32)), 0)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinISelDAGToDAG.cpp | 87 SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i32);
88 return CurDAG->SelectNodeTo(N, BF::ADDpp, MVT::i32, TFI,
89 CurDAG->getTargetConstant(0, MVT::i32));
101 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
102 Offset = CurDAG->getTargetConstant(0, MVT::i32);
111 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
112 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
171 MVT::i32,
173 DAG.getTargetConstant(BF::DRegClassID, MVT::i32));
|
| /prebuilts/go/darwin-x86/test/ken/ |
| interbasic.go | 80 var i32 int32
102 i32 = 3434
103 ia[7] = i32
121 i32 = int32(ia[1].(int))
122 if i32 != 12345 {
123 println(1, i32)
153 i32 = ia[7].(int32)
154 if i32 != 3434 {
155 println(7, i32)
|
| convert.go | 16 var i32 int32; var
212 i32 = 0; u32 = 0; i64 = 0; u64 = 0
229 i8 = int8(v); i32 = int32(i8); w = big(i32)
250 u8 = uint8(v); i32 = int32(u8); w = big(i32)
271 i16 = int16(v); i32 = int32(i16); w = big(i32)
292 u16 = uint16(v); i32 = int32(u16); w = big(i32)
[all...] |
| /prebuilts/go/linux-x86/test/ken/ |
| interbasic.go | 80 var i32 int32
102 i32 = 3434
103 ia[7] = i32
121 i32 = int32(ia[1].(int))
122 if i32 != 12345 {
123 println(1, i32)
153 i32 = ia[7].(int32)
154 if i32 != 3434 {
155 println(7, i32)
|
| convert.go | 16 var i32 int32; var
212 i32 = 0; u32 = 0; i64 = 0; u64 = 0
229 i8 = int8(v); i32 = int32(i8); w = big(i32)
250 u8 = uint8(v); i32 = int32(u8); w = big(i32)
271 i16 = int16(v); i32 = int32(i16); w = big(i32)
292 u16 = uint16(v); i32 = int32(u16); w = big(i32)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 70 addRegisterClass(MVT::i32, XCore::GRRegsRegisterClass);
82 // Use i32 for setcc operations results (slt, sgt, ...).
88 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
89 setOperationAction(ISD::ADDC, MVT::i32, Expand);
90 setOperationAction(ISD::ADDE, MVT::i32, Expand);
91 setOperationAction(ISD::SUBC, MVT::i32, Expand);
92 setOperationAction(ISD::SUBE, MVT::i32, Expand);
100 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom);
101 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom);
102 setOperationAction(ISD::MULHS, MVT::i32, Expand)
[all...] |
| /external/mesa3d/src/compiler/nir/ |
| nir_gs_count_vertices.c | 80 count = val->i32[0];
86 if (count != val->i32[0])
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 79 /// getI32Imm - Return a target constant of type i32 with the specified
82 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
131 Pred = CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(N), MVT::i32);
132 Reg = CurDAG->getRegister(ARM::CPSR, MVT::i32);
292 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
405 Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32,
408 MVT::i32));
409 N1 = CurDAG->getNode(ISD::AND, SDLoc(N1), MVT::i32,
411 CurDAG->getConstant(And_imm, SDLoc(Srl), MVT::i32));
412 N1 = CurDAG->getNode(ISD::SHL, SDLoc(N1), MVT::i32,
[all...] |
| /external/libopus/silk/ |
| resampler_structs.h | 41 opus_int32 i32[ SILK_RESAMPLER_MAX_FIR_ORDER ]; member in union:_silk_resampler_state_struct::__anon25608
|
| /external/mesa3d/src/mesa/state_tracker/ |
| st_nir_lower_tex_src_plane.c | 79 if (plane->i32[0] > 0) {
83 assume(((state->lower_3plane & (1 << y_samp)) && plane->i32[0] < 3) ||
84 (plane->i32[0] < 2));
87 state->sampler_map[y_samp][plane->i32[0] - 1];
|
| /prebuilts/ndk/r16/sources/third_party/shaderc/third_party/spirv-tools/source/ |
| text.h | 38 int32_t i32; member in union:spv_literal_t::value_t
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 62 addRegisterClass(MVT::i32, &Lanai::GPRRegClass);
70 setOperationAction(ISD::BR_CC, MVT::i32, Custom);
73 setOperationAction(ISD::SETCC, MVT::i32, Custom);
74 setOperationAction(ISD::SETCCE, MVT::i32, Custom);
75 setOperationAction(ISD::SELECT, MVT::i32, Expand);
76 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
78 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
79 setOperationAction(ISD::BlockAddress, MVT::i32, Custom);
80 setOperationAction(ISD::JumpTable, MVT::i32, Custom);
81 setOperationAction(ISD::ConstantPool, MVT::i32, Custom)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 62 /// i32.
64 return CurDAG->getTargetConstant(Imm, MVT::i32);
241 if (PPCLowering.getPointerTy() == MVT::i32) {
264 if (N->getValueType(0) == MVT::i32)
278 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
336 if (N->getValueType(0) != MVT::i32)
438 return CurDAG->getMachineNode(PPC::RLWIMI, dl, MVT::i32, Ops, 5);
451 if (LHS.getValueType() == MVT::i32) {
457 return SDValue(CurDAG->getMachineNode(PPC::CMPLWI, dl, MVT::i32, LHS,
461 return SDValue(CurDAG->getMachineNode(PPC::CMPWI, dl, MVT::i32, LHS
[all...] |
| /external/libyuv/files/unit_test/ |
| basictypes_test.cc | 31 int32 i32 = -1; local
39 EXPECT_EQ(4u, sizeof(i32));
47 EXPECT_GT(0, i32);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMSelectionDAGInfo.cpp | 52 EVT VT = MVT::i32;
67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
68 DAG.getConstant(SrcOff, MVT::i32)),
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
80 DAG.getConstant(DstOff, MVT::i32)),
106 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
107 DAG.getConstant(SrcOff, MVT::i32)),
128 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
129 DAG.getConstant(DstOff, MVT::i32)),
168 // Extend or truncate the argument to be an i32 value for the call
[all...] |
| ARMISelDAGToDAG.cpp | 86 /// getI32Imm - Return a target constant of type i32 with the specified
89 return CurDAG->getTargetConstant(Imm, MVT::i32);
291 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
409 MVT::i32);
436 MVT::i32);
453 OffImm = CurDAG->getTargetConstant(0, MVT::i32);
463 OffImm = CurDAG->getTargetConstant(0, MVT::i32);
478 OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
485 OffImm = CurDAG->getTargetConstant(0, MVT::i32);
510 MVT::i32);
[all...] |
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| LowLevel.cpp | 236 TestRegReg(cmp, eax, ecx, i32, 2, 0x3B, 0xC1);
237 TestRegReg(cmp, ecx, edx, i32, 2, 0x3B, 0xCA);
238 TestRegReg(cmp, edx, ebx, i32, 2, 0x3B, 0xD3);
239 TestRegReg(cmp, ebx, esp, i32, 2, 0x3B, 0xDC);
240 TestRegReg(cmp, esp, ebp, i32, 2, 0x3B, 0xE5);
241 TestRegReg(cmp, ebp, esi, i32, 2, 0x3B, 0xEE);
242 TestRegReg(cmp, esi, edi, i32, 2, 0x3B, 0xF7);
243 TestRegReg(cmp, edi, eax, i32, 2, 0x3B, 0xF8);
264 TestRegImm(cmp, eax, 5, i32, 3, 0x83, 0xF8, 0x05);
265 TestRegImm(cmp, ecx, 5, i32, 3, 0x83, 0xF9, 0x05)
[all...] |
