| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd.d | 81 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0
82 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\)
200 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0
201 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| opts-intel.d | 141 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd xmm6,xmm4
142 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s xmm6,xmm4
245 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd xmm6,xmm4
246 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s xmm6,xmm4
|
| opts.d | 140 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd %xmm4,%xmm6
141 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s %xmm4,%xmm6
244 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd %xmm4,%xmm6
245 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s %xmm4,%xmm6
|
| simd-intel.d | 61 [ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[eax\]
62 [ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[eax\],xmm0
154 [ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[eax\]
155 [ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[eax\],xmm0
|
| x86-64-opts-intel.d | 177 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd xmm6,xmm4
178 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s xmm6,xmm4
299 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd xmm6,xmm4
300 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s xmm6,xmm4
|
| x86-64-opts.d | 176 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd %xmm4,%xmm6
177 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s %xmm4,%xmm6
298 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd %xmm4,%xmm6
299 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s %xmm4,%xmm6
|
| x86-64-simd-intel.d | 81 [ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[rax\]
82 [ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[rax\],xmm0
200 [ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[rax\]
201 [ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[rax\],xmm0
|
| x86-64-simd-suffix.d | 81 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0
82 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\)
200 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0
201 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\)
|
| x86-64-simd.d | 80 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0
81 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\)
199 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0
200 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\)
|
| sse2avx.s | 444 movsd (%ecx),%xmm4
451 movsd %xmm4,(%ecx)
647 movsd %xmm4,%xmm6
1105 movsd xmm4,QWORD PTR [ecx]
1112 movsd QWORD PTR [ecx],xmm4
1308 movsd xmm6,xmm4
|
| x86-64-sse2avx.s | 444 movsd (%rcx),%xmm4
451 movsd %xmm4,(%rcx)
690 movsd %xmm4,%xmm6
1148 movsd xmm4,QWORD PTR [rcx]
1155 movsd QWORD PTR [rcx],xmm4
1394 movsd xmm6,xmm4
|
| /bionic/libm/x86_64/ |
| s_atan.S | 67 movsd %xmm0, (%rsp)
|
| s_log1p.S | 64 movsd %xmm0, 8(%rsp)
|
| /external/valgrind/memcheck/tests/x86/ |
| sse2_memory.stdout.exp | [all...] |
| /art/compiler/optimizing/ |
| intrinsics_x86.cc | 205 __ movsd(temp, input.AsFpuRegister<XmmRegister>());
224 __ movsd(output.AsFpuRegister<XmmRegister>(), temp1);
373 __ movsd(temp, codegen->LiteralInt64Address(
563 __ movsd(out, codegen->LiteralInt64Address(kDoubleNaN, method_address, constant_area));
571 __ movsd(out, Address(ESP, 0));
584 __ movsd(out, op2);
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/X86/ |
| x86-32-coverage.s | 1205 // CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5
1206 movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
1208 // CHECK: movsd %xmm5, %xmm5
1209 movsd %xmm5,%xmm5
1211 // CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8)
1212 movsd %xmm5,0xdeadbeef(%ebx,%ecx,8)
1214 // CHECK: movsd %xmm5, %xmm5
1215 movsd %xmm5,%xmm5
[all...] |
| /art/runtime/interpreter/mterp/out/ |
| mterp_x86.S | [all...] |
| /art/runtime/arch/x86_64/ |
| quick_entrypoints_x86_64.S | 596 movsd (%r11), REG_VAR(xmm_reg)
724 movsd %xmm0, (%r8) // Store the double floating point result.
817 movsd %xmm0, (%r8) // Store the double floating point result.
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.h | 411 void movsd(XmmRegister dst, const Address& src);
412 void movsd(const Address& dst, XmmRegister src);
413 void movsd(XmmRegister dst, XmmRegister src);
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 450 void movsd(XmmRegister dst, const Address& src);
451 void movsd(const Address& dst, XmmRegister src);
452 void movsd(XmmRegister dst, XmmRegister src);
[all...] |
| /external/llvm/test/MC/X86/ |
| x86-32-coverage.s | [all...] |
| /external/syslinux/core/ |
| pxelinux.asm | 237 rep movsd
251 rep movsd
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/ |
| Thunk16.asm | 222 rep movsd ; copy RegSet
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/X64/ |
| Thunk16.asm | 253 rep movsd ; copy RegSet
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| Thunk16.asm | 229 rep movsd ; copy RegSet
|
