| /external/tremolo/Tremolo/ |
| dpen.s | 235 STMFD r13!,{r4-r11,r14}
259 LDR r11,[r4,#28] @ r11= s->q_minp
262 SUBS r11,r7, r11 @ r11= add = point - s->q_minp
264 MOVGT r14,r14,ASR r11 @ r14= add = s->q_min >> add (if add >0)
265 RSBLT r11,r11,#0
266 MOVLT r14,r14,LSL r11 @ r14= add = s->q_min << -add (if add < 0
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_chroma_horz.s | 122 mov r11,#2
166 vld1.u32 {q0},[r12],r11 @vector load pu1_src
168 vld1.u32 {q1},[r12],r11 @vector load pu1_src
170 vld1.u32 {q2},[r12],r11 @vector load pu1_src
176 vld1.u32 {q4},[r4],r11 @vector load pu1_src
178 vld1.u32 {q5},[r4],r11 @vector load pu1_src
180 vld1.u32 {q6},[r4],r11 @vector load pu1_src
223 vld1.u32 {q0},[r12],r11 @vector load pu1_src
227 vld1.u32 {q1},[r12],r11 @vector load pu1_src
233 vld1.u32 {q2},[r12],r11 @vector load pu1_sr
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| syn_filt_opt.s | 52 LDRH r11, [r4], #2
61 STRH r11, [r5], #2
70 LDRH r11, [r4], #2
79 STRH r11, [r5], #2
93 LDRSH r11,[r0, #8] @ load a[4]
97 ORR r12, r9, r11, LSL #16 @ -a[4] -- -a[3]
104 LDRSH r11,[r0, #16] @ load a[8]
108 ORR r12, r9, r11, LSL #16 @ -a[8] -- -a[7]
115 LDRSH r11,[r0, #24] @ load a[12]
119 ORR r12, r9, r11, LSL #16 @ -a[12] -- -a[11
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/nios2/ |
| ldwm.s | 13 ldwm {r11},--(r23)
28 ldwm {r2,r7,r11},(r13)++
29 ldwm {r2,r7,r11},(r13)++,ret
30 ldwm {r2,r7,r11},(r13)++,writeback
31 ldwm {r2,r7,r11},(r13)++,ret,writeback
|
| ldwm.d | 19 0+0024 <[^>]*> c20005e8 ldwm \{r11\},--\(r23\)
34 0+0060 <[^>]*> c2210b68 ldwm \{r2,r7,r11\},\(r13\)\+\+
35 0+0064 <[^>]*> c2214b68 ldwm \{r2,r7,r11\},\(r13\)\+\+,ret
36 0+0068 <[^>]*> c2211b68 ldwm \{r2,r7,r11\},\(r13\)\+\+,writeback
37 0+006c <[^>]*> c2215b68 ldwm \{r2,r7,r11\},\(r13\)\+\+,writeback,ret
|
| /external/vixl/test/aarch32/ |
| test-assembler-negative-cond-rd-rn-operand-rm-shift-rs-a32.cc | 130 {{vs, r15, r6, r11, LSR, r12},
131 "vs, r15, r6, r11, LSR, r12",
151 {{lt, r2, r11, r15, LSL, r0},
152 "lt, r2, r11, r15, LSL, r0",
181 {{pl, r11, r15, r8, LSL, r4},
182 "pl, r11, r15, r8, LSL, r4",
199 {{cs, r11, r6, r15, ROR, r13},
200 "cs, r11, r6, r15, ROR, r13",
202 {{le, r0, r7, r15, ASR, r11},
203 "le, r0, r7, r15, ASR, r11",
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 115 {{vc, r8, r11, ASR, 13}, false, al, "vc r8 r11 ASR 13", "vc_r8_r11_ASR_13"},
118 {{pl, r2, r11, ASR, 14}, false, al, "pl r2 r11 ASR 14", "pl_r2_r11_ASR_14"},
119 {{al, r11, r10, LSR, 27},
122 "al r11 r10 LSR 27",
134 {{lt, r4, r11, LSR, 26}, false, al, "lt r4 r11 LSR 26", "lt_r4_r11_LSR_26"},
137 {{al, r10, r11, ASR, 31},
140 "al r10 r11 ASR 31"
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 118 {{al, r3, r11, LSR, 6}, false, al, "al r3 r11 LSR 6", "al_r3_r11_LSR_6"},
127 {{al, r11, r1, LSR, 12}, false, al, "al r11 r1 LSR 12", "al_r11_r1_LSR_12"},
140 {{al, r11, r9, LSR, 32}, false, al, "al r11 r9 LSR 32", "al_r11_r9_LSR_32"},
148 {{al, r8, r11, ASR, 3}, false, al, "al r8 r11 ASR 3", "al_r8_r11_ASR_3"},
199 {{al, r3, r11, LSR, 17}, false, al, "al r3 r11 LSR 17", "al_r3_r11_LSR_17"}
[all...] |
| /external/libhevc/decoder/arm/ |
| ihevcd_itrans_recon_dc_chroma.s | 60 push {r0-r11,lr}
114 mov r11,r1
127 vst2.8 {d2,d3},[r11],r3
128 vst2.8 {d4,d5},[r11],r3
129 vst2.8 {d6,d7},[r11],r3
130 vst2.8 {d8,d9},[r11],r3
132 vst2.8 {d10,d11},[r11],r3
133 vst2.8 {d12,d13},[r11],r3
134 vst2.8 {d14,d15},[r11],r3
135 vst2.8 {d16,d17},[r11]
[all...] |
| ihevcd_itrans_recon_dc_luma.s | 61 push {r0-r11,lr}
115 mov r11,r1
126 vst1.u32 {d2},[r11],r3
127 vst1.u32 {d3},[r11],r3
128 vst1.u32 {d4},[r11],r3
129 vst1.u32 {d5},[r11],r3
130 vst1.u32 {d6},[r11],r3
131 vst1.u32 {d7},[r11],r3
132 vst1.u32 {d8},[r11],r3
133 vst1.u32 {d9},[r11]
[all...] |
| ihevcd_fmt_conv_420sp_to_420p.s | 103 SUB r11,r5,r8 @// Dst Y increment
136 ADD r2, r2, r11
151 MOV r11,r8,LSR #1
152 SUB r11,r5,r11 @// Dst U and V increment
191 ADD r3, r3, r11
192 ADD r5, r5, r11
|
| /external/libxaac/decoder/armv7/ |
| ixheaacd_imdct_using_fft.s | 104 MOV r11 , r2
137 ADD r11, r11, r12 , LSL #3
138 VLD2.32 {d1[1], d3[1]}, [r11] , r1
139 ADD r11, r11, r1
140 VLD2.32 {d9[1], d11[1]}, [r11] , r1
141 SUB r11, r11, r1, LSL #1
157 VLD2.32 {d5[1], d7[1]}, [r11] , r
[all...] |
| ixheaacd_sbr_imdct_using_fft.s | 86 MOV r11 , r2
141 ADD r11, r11, r12 , LSL #3
142 VLD2.32 {d1[1], d3[1]}, [r11] , r1
143 ADD r11, r11, r1
144 VLD2.32 {d9[1], d11[1]}, [r11] , r1
145 SUB r11, r11, r1, LSL #1
161 VLD2.32 {d5[1], d7[1]}, [r11] , r
[all...] |
| ixheaacd_fft_15_ld.s | 32 LDRD r10, [r0] @ r10 = buf1a[8] and r11 = buf1a[9]
66 ADD r6, r5, r11 @ s1 = buf1a[3] + buf1a[9]
67 SUB r8, r5, r11 @ s4 = buf1a[3] - buf1a[9]
86 ADD r11, r7, r8 @ (s4 + s2)
87 SMULWT r11, r11, r10 @ t = mult32_shl((s4 + s2), C51)@
88 @LSL r11, r11, #1 @
89 MOV r11, r11, LSL #
[all...] |
| ixheaacd_mps_complex_fft_64_asm.s | 37 LDRD r10, [r1] @r10=x3r, r11=x3i
46 ADD r9, r9, r11 @x1i = x1i + x3i@
48 SUB r11, r9, r11, lsl#1 @x3i = x1i - (x3i << 1)@
54 ADD r6, r6, r11 @x2r = x2r + x3i@
56 SUB r10, r6, r11, lsl#1 @x3i = x2r - (x3i << 1)@
57 ADD r11, r7, r1, lsl#1 @x3r = x2i + (x3r << 1)@
59 STMIA r3!, {r4-r11}
88 LDRD r10, [r12] @r10=x3r, r11=x3i
97 @MOV r11,r11,ASR #
[all...] |
| /bionic/libc/arch-x86_64/bionic/ |
| setjmp.S | 78 xorq \reg,%r11
133 movq (%rsp),%r11
142 movq %r11,(_JB_PC * 8)(%rdi)
188 movq (_JB_PC * 8)(%r12),%r11
194 pushq %r11
197 popq %r11
205 movq %r11,0(%rsp)
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| pred_lt4_1_neon.s | 45 LDR r11, [r8]
46 ADD r11, r8
49 ADD r11, r11, r2, LSL #6 @ get inter4_2[k][]
51 VLD1.S16 {Q0, Q1}, [r11]!
52 VLD1.S16 {Q2, Q3}, [r11]!
81 MOV r11, #0x8000
|
| /external/libopus/celt/arm/ |
| celt_pitch_xcorr_arm_gnu.s | 56 @ preserved: r0-r3, r6-r11, d2, q4-q7, q9-q15
278 @ r10,r11 = opus_val16 y[4]
282 LDR r11, [r5], #4 @ Load y[2...3]
294 SMLABB r8, r12, r11, r8 @ sum[2] = MAC16_16(sum[2],x_0,y_2)
295 SMLABT r9, r12, r11, r9 @ sum[3] = MAC16_16(sum[3],x_0,y_3)
298 SMLATB r7, r12, r11, r7 @ sum[1] = MAC16_16(sum[1],x_1,y_2)
299 SMLATT r8, r12, r11, r8 @ sum[2] = MAC16_16(sum[2],x_1,y_3)
302 SMLABB r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],x_2,y_2)
303 SMLABT r7, r14, r11, r7 @ sum[1] = MAC16_16(sum[1],x_2,y_3)
306 SMLATT r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],x_3,y_3
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| x86-64-mwaitx-reg.l | 85 #r11
86 .*:[0-9]*: Error: .*r11.* 1 .*monitorx.*
87 .*:[0-9]*: Error: .*r11.* 2 .*monitorx.*
88 .*:[0-9]*: Error: .*r11.* 3 .*monitorx.*
89 .*:[0-9]*: Error: .*r11.* 1 .*mwaitx.*
90 .*:[0-9]*: Error: .*r11.* 2 .*mwaitx.*
91 .*:[0-9]*: Error: .*r11.* 3 .*mwaitx.*
|
| x86-64-mpx.d | 10 [ ]*[a-f0-9]+: f3 41 0f 1b 0b bndmk \(%r11\),%bnd1
17 [ ]*[a-f0-9]+: f3 41 0f 1b 4c 03 03 bndmk 0x3\(%r11,%rax,1\),%bnd1
19 [ ]*[a-f0-9]+: 66 41 0f 1a 0b bndmov \(%r11\),%bnd1
26 [ ]*[a-f0-9]+: 66 41 0f 1a 4c 03 03 bndmov 0x3\(%r11,%rax,1\),%bnd1
29 [ ]*[a-f0-9]+: 66 41 0f 1b 0b bndmov %bnd1,\(%r11\)
36 [ ]*[a-f0-9]+: 66 41 0f 1b 4c 03 03 bndmov %bnd1,0x3\(%r11,%rax,1\)
39 [ ]*[a-f0-9]+: f3 41 0f 1a 0b bndcl \(%r11\),%bnd1
41 [ ]*[a-f0-9]+: f3 41 0f 1a cb bndcl %r11,%bnd1
48 [ ]*[a-f0-9]+: f3 41 0f 1a 4c 03 03 bndcl 0x3\(%r11,%rax,1\),%bnd1
50 [ ]*[a-f0-9]+: f2 41 0f 1a 0b bndcu \(%r11\),%bnd
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i860/ |
| shift.s | 9 shl %r9,%r10,%r11
21 shr %r9,%r10,%r11
33 shra %r9,%r10,%r11
45 shrd %r9,%r10,%r11
58 shl 32767,%r10,%r11
70 shr 32767,%r10,%r11
82 shra 32767,%r10,%r11
|
| /external/llvm/test/MC/ARM/ |
| eh-directive-save.s | 138 .save {r4, r5, r6, r7, r8, r9, r10, r11}
139 push {r4, r5, r6, r7, r8, r9, r10, r11}
140 pop {r4, r5, r6, r7, r8, r9, r10, r11}
194 .save {r4, r5, r6, r7, r8, r9, r10, r11, r14}
195 push {r4, r5, r6, r7, r8, r9, r10, r11, r14}
196 pop {r4, r5, r6, r7, r8, r9, r10, r11, r14}
224 .save {r4, r5, r6, r7, r8, r9, r10, r11, r12, r14}
225 push {r4, r5, r6, r7, r8, r9, r10, r11, r12, r14}
226 pop {r4, r5, r6, r7, r8, r9, r10, r11, r12, r14}
238 .save {r4, r5, r6, r8, r9, r10, r11}
[all...] |
| /external/boringssl/src/crypto/fipsmodule/bn/asm/ |
| x86_64-mont.pl | 71 $hi0="%r11";
97 leaq OPENSSL_ia32cap_P(%rip),%r11
98 mov 8(%r11),%r11d
123 mov %rsp,%r11
136 sub %r10,%r11
137 and \$-4096,%r11
138 lea (%r10,%r11),%rsp
139 mov (%rsp),%r11
147 mov (%rsp),%r11
347 my @A=("%r10","%r11");
[all...] |
| /external/libavc/common/arm/ |
| ih264_padding_neon.s | 88 stmfd sp!, {r4-r11, lr} @stack stores the values of the arguments
108 ldmfd sp!, {r4-r11, pc} @Reload the registers from SP
168 stmfd sp!, {r4-r11, lr} @stack stores the values of the arguments
183 ldrb r11, [r0], r1
185 vdup.u8 q3, r11
194 ldrb r11, [r0], r1
197 vdup.u8 q3, r11
215 ldrb r11, [r0], r1
217 vdup.u8 q3, r11
228 ldrb r11, [r0], r
[all...] |
| /external/boringssl/win-x86_64/crypto/fipsmodule/ |
| rsaz-avx2.asm | 325 mov r11,QWORD[16+rsp]
351 add r11,rax
378 add r11,rax
386 add r11,r10
389 mov rax,r11
411 add r11,rax
416 shr r11,29
419 add rax,r11
502 mov r11,QWORD[16+rsp]
513 add r11,ra
[all...] |
