| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-operand-rn-ror-amount-a32.cc | 105 {{cc, r11, r3, ROR, 16}, false, al, "cc r11 r3 ROR 16", "cc_r11_r3_ROR_16"},
111 {{vs, r5, r11, ROR, 8}, false, al, "vs r5 r11 ROR 8", "vs_r5_r11_ROR_8"},
127 {{al, r11, r7, ROR, 8}, false, al, "al r11 r7 ROR 8", "al_r11_r7_ROR_8"},
128 {{ne, r12, r11, ROR, 0}, false, al, "ne r12 r11 ROR 0", "ne_r12_r11_ROR_0"},
132 {{ne, r3, r11, ROR, 0}, false, al, "ne r3 r11 ROR 0", "ne_r3_r11_ROR_0"}
[all...] |
| test-simulator-cond-rd-memop-rs-a32.cc | 80 __ Push(r11); \
87 __ Pop(r11); \
345 {{al, r11, r6, plus, r9, Offset},
346 "al r11 r6 plus r9 Offset",
390 {{al, r11, r10, plus, r3, Offset},
391 "al r11 r10 plus r3 Offset",
430 {{al, r0, r12, plus, r11, Offset},
431 "al r0 r12 plus r11 Offset",
465 {{al, r9, r11, plus, r4, Offset},
466 "al r9 r11 plus r4 Offset"
[all...] |
| test-assembler-cond-rd-rn-operand-const-a32.cc | 169 {{gt, r13, r11, 0x3fc00000},
172 "gt r13 r11 0x3fc00000",
184 {{cc, r10, r11, 0x00ab0000},
187 "cc r10 r11 0x00ab0000",
214 {{hi, r11, r9, 0x000000ab},
217 "hi r11 r9 0x000000ab",
279 {{cs, r11, r5, 0x000000ab},
282 "cs r11 r5 0x000000ab",
449 {{ls, r11, r0, 0x3fc00000},
452 "ls r11 r0 0x3fc00000"
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/i386-linux-gnu/asm/ |
| ptrace.h | 48 unsigned long r11; member in struct:pt_regs
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/x86_64-linux-gnu/asm/ |
| ptrace.h | 48 unsigned long r11; member in struct:pt_regs
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cr16/ |
| bal_test.s | 11 bal (r11,r10),*+0xcff122
|
| jcc_test.s | 17 jhi (r11,r10)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/crx/ |
| cmpbr_insn.s | 18 cmpbneb $2, r11, 0x2
38 cmpbgtb r10, r11, 07700
59 cmpbhsb r11, r12, 0402
89 cmpbnew $2, r11, 0x2
109 cmpbgtw r10, r11, 07700
130 cmpbhsw r11, r12, 0402
160 cmpbned $2, r11, 0x2
180 cmpbgtd r10, r11, 07700
201 cmpbhsd r11, r12, 0402
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| x86-64-rdseed-intel.d | 16 [ ]*[a-f0-9]+: 49 0f c7 fb rdseed r11
22 [ ]*[a-f0-9]+: 49 0f c7 fb rdseed r11
|
| x86-64-rdseed.d | 15 [ ]*[a-f0-9]+: 49 0f c7 fb rdseed %r11
21 [ ]*[a-f0-9]+: 49 0f c7 fb rdseed %r11
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sh/ |
| sh4a-dsp.s | 19 movua.l @r11+,r0
33 stc sgr,r11
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-powerpc/ |
| elfv2so.d | 59 .*: (7d 68 02 a6|a6 02 68 7d) mflr r11
60 .*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
62 .*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
63 .*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
65 .*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
68 .*: (e9 6b 00 08|08 00 6b e9) ld r11,8\(r11\)
|
| tlsso.d | 65 .* (7d 68 02 a6|a6 02 68 7d) mflr r11
66 .* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
68 .* (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
69 .* (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
70 .* (e8 4b 00 08|08 00 4b e8) ld r2,8\(r11\)
72 .* (e9 6b 00 10|10 00 6b e9) ld r11,16\(r11\)
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-x86-64/ |
| lea1a.d | 16 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
18 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__bss_start>
|
| lea1b.d | 16 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
18 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__bss_start>
|
| lea1c.d | 16 [ ]*[a-f0-9]+: 49 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11
18 [ ]*[a-f0-9]+: 49 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11
|
| lea1d.d | 16 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
18 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__bss_start>
|
| lea1e.d | 16 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
18 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__bss_start>
|
| load2.d | 15 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
17 [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__bss_start>
|
| pr19609-1h.d | 14 [ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
22 [ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
|
| pr19609-1i.d | 14 [ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
22 [ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
|
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| aes-armv4.S | 188 mov r11,r2
275 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
277 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
290 ldmia r11!,{r4,r5,r6,r7}
292 ldr r12,[r11,#240-16]
343 ldr r7,[r11],#16
347 ldr r4,[r11,#-12]
350 ldr r5,[r11,#-8]
352 ldr r6,[r11,#-4]
405 ldr r7,[r11,#0
[all...] |
| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| aes-armv4.S | 187 mov r11,r2
274 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
276 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
287 ldmia r11!,{r4,r5,r6,r7}
289 ldr r12,[r11,#240-16]
340 ldr r7,[r11],#16
344 ldr r4,[r11,#-12]
347 ldr r5,[r11,#-8]
349 ldr r6,[r11,#-4]
402 ldr r7,[r11,#0
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_luma_vert.s | 125 lsl r11, r3, #2
127 add r11, r11, #0xfffffff0
133 vst1.8 {d22,d23}, [r2], r11
134 vst1.8 {d22,d23}, [r5], r11
135 vst1.8 {d22,d23}, [r8], r11
136 vst1.8 {d22,d23}, [r10], r11
146 vst1.8 {d22,d23}, [r2], r11
147 vst1.8 {d22,d23}, [r5], r11
148 vst1.8 {d22,d23}, [r8], r11
[all...] |
| ihevc_inter_pred_chroma_horz_w16out.s | 122 mov r11, #2
153 @mov r11,#8
182 vld1.u32 {q0},[r12],r11 @vector load pu1_src
185 vld1.u32 {q1},[r12],r11 @vector load pu1_src
188 vld1.u32 {q2},[r12],r11 @vector load pu1_src
195 vld1.u32 {q4},[r4],r11 @vector load pu1_src
197 vld1.u32 {q5},[r4],r11 @vector load pu1_src
199 vld1.u32 {q6},[r4],r11 @vector load pu1_src
242 vld1.u32 {q0},[r12],r11 @vector load pu1_src
248 vld1.u32 {q1},[r12],r11 @vector load pu1_sr
[all...] |
