| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Norm_Corr_neon.s | 53 STMFD r13!, {r4 - r12, r14}
71 MOV r14, r1 @copy xn[] address
73 VLD1.S16 {Q0, Q1}, [r14]!
74 VLD1.S16 {Q2, Q3}, [r14]!
75 VLD1.S16 {Q4, Q5}, [r14]!
76 VLD1.S16 {Q6, Q7}, [r14]!
112 ADD r14, r13, #20 @copy of excf[]
116 VLD1.S16 {Q0, Q1}, [r14]! @ load 16 excf[]
117 VLD1.S16 {Q2, Q3}, [r14]! @ load 16 excf[]
137 VLD1.S16 {Q0, Q1}, [r14]! @ load 16 excf[
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-operand-rn-ror-amount-t32.cc | 158 {{al, r0, r14, ROR, 0}, false, al, "al r0 r14 ROR 0", "al_r0_r14_ROR_0"},
159 {{al, r0, r14, ROR, 8}, false, al, "al r0 r14 ROR 8", "al_r0_r14_ROR_8"},
160 {{al, r0, r14, ROR, 16}, false, al, "al r0 r14 ROR 16", "al_r0_r14_ROR_16"},
161 {{al, r0, r14, ROR, 24}, false, al, "al r0 r14 ROR 24", "al_r0_r14_ROR_24"},
218 {{al, r1, r14, ROR, 0}, false, al, "al r1 r14 ROR 0", "al_r1_r14_ROR_0"}
[all...] |
| test-assembler-cond-rd-operand-rn-t32.cc | 122 {{al, r0, r14}, false, al, "al r0 r14", "al_r0_r14"},
137 {{al, r1, r14}, false, al, "al r1 r14", "al_r1_r14"},
152 {{al, r2, r14}, false, al, "al r2 r14", "al_r2_r14"},
167 {{al, r3, r14}, false, al, "al r3 r14", "al_r3_r14"},
182 {{al, r4, r14}, false, al, "al r4 r14", "al_r4_r14"}
[all...] |
| test-assembler-cond-rd-rn-t32.cc | 115 {{al, r0, r14}, false, al, "al r0 r14", "al_r0_r14"},
130 {{al, r1, r14}, false, al, "al r1 r14", "al_r1_r14"},
145 {{al, r2, r14}, false, al, "al r2 r14", "al_r2_r14"},
160 {{al, r3, r14}, false, al, "al r3 r14", "al_r3_r14"},
175 {{al, r4, r14}, false, al, "al r4 r14", "al_r4_r14"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 107 {{al, r14, r13, r12, ROR, 24},
110 "al r14 r13 r12 ROR 24",
117 {{al, r11, r13, r14, ROR, 8},
120 "al r11 r13 r14 ROR 8",
137 {{al, r14, r4, r11, ROR, 16},
140 "al r14 r4 r11 ROR 16",
152 {{al, r10, r14, r10, ROR, 24},
155 "al r10 r14 r10 ROR 24",
187 {{al, r14, r6, r13, ROR, 16},
190 "al r14 r6 r13 ROR 16"
[all...] |
| test-assembler-cond-rd-memop-rs-a32.cc | 114 {{vs, r2, r6, plus, r14, Offset},
117 "vs r2 r6 plus r14 Offset",
124 {{ge, r14, r6, plus, r14, Offset},
127 "ge r14 r6 plus r14 Offset",
164 {{al, r9, r13, plus, r14, Offset},
167 "al r9 r13 plus r14 Offset",
199 {{eq, r14, r11, plus, r8, Offset},
202 "eq r14 r11 plus r8 Offset"
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 131 {{lt, r14, r0, LSR, 12}, false, al, "lt r14 r0 LSR 12", "lt_r14_r0_LSR_12"},
142 {{cs, r14, r11, ASR, 3}, false, al, "cs r14 r11 ASR 3", "cs_r14_r11_ASR_3"},
145 {{pl, r14, r2, ASR, 32}, false, al, "pl r14 r2 ASR 32", "pl_r14_r2_ASR_32"},
166 {{eq, r13, r14, ASR, 24},
169 "eq r13 r14 ASR 24",
172 {{gt, r2, r14, ASR, 17}, false, al, "gt r2 r14 ASR 17", "gt_r2_r14_ASR_17"}
[all...] |
| test-assembler-cond-rd-operand-rn-a32.cc | 119 {{le, r1, r14}, false, al, "le r1 r14", "le_r1_r14"},
121 {{cc, r8, r14}, false, al, "cc r8 r14", "cc_r8_r14"},
123 {{vc, r5, r14}, false, al, "vc r5 r14", "vc_r5_r14"},
131 {{cs, r9, r14}, false, al, "cs r9 r14", "cs_r9_r14"},
136 {{hi, r14, r3}, false, al, "hi r14 r3", "hi_r14_r3"}
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 120 {{al, r12, r14, LSR, 17},
123 "al r12 r14 LSR 17",
128 {{al, r14, r3, ASR, 31}, false, al, "al r14 r3 ASR 31", "al_r14_r3_ASR_31"},
130 {{al, r10, r14, ASR, 23},
133 "al r10 r14 ASR 23",
162 {{al, r14, r1, ASR, 12}, false, al, "al r14 r1 ASR 12", "al_r14_r1_ASR_12"},
177 {{al, r14, r12, ASR, 26},
180 "al r14 r12 ASR 26"
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/crx/ |
| arith_insn.d | 26 1a: 9e 03 andb \$0x10, r14
27 1c: fe 43 andb r15, r14
47 3c: ef 47 subb r14, r15
50 3e: 8e 08 subcb \$0x8, r14
67 60: de 50 adduw r13, r14
71 66: ee 11 01 80 addw \$0x8001, r14
90 86: 2e 15 movw \$0x2, r14
92 8c: ef 55 movw r14, r15
111 a8: ee 19 21 00 xorw \$0x21, r14
112 ac: fe 59 xorw r15, r14
[all...] |
| load_stor_insn.d | 23 28: 8e 32 09 f0 loadb 0x9\(r15\)\+, r14
27 36: ce 33 3f f7 loadb 0x3ffd6f\(r15,r7,1\), r14
44 64: 9e 32 08 20 loadw 0x8\(r2\)\+, r14
48 72: de 33 ff f7 loadw 0x3f99a9\(r15,r7,8\), r14
65 a2: ae 32 07 f0 loadd 0x7\(r15\)\+, r14
66 a6: a2 32 ce ef loadd 0xfce\(r14\)\+, r2
69 b0: ee 33 3f f7 loadd 0x3ffe51\(r15,r7,1\), r14
86 de: 8e 34 09 f0 storb r14, 0x9\(r15\)\+
90 ec: ce 35 3f f7 storb r14, 0x3ffd6f\(r15,r7,1\)
110 124: 9e 34 08 20 storw r14, 0x8\(r2\)\
[all...] |
| misc_insn.s | 38 macud r14 , r15
79 sextwd r14 , r15
97 getrfid r14
105 bswap r14 , r2
113 minsb r15 , r14
153 mulqb r14 , ra
173 minsw r15 , r14
213 mulqw r14 , ra
233 minsd r15 , r14
273 mulqd r14 , r
[all...] |
| /external/libxaac/decoder/armv7/ |
| ixheaacd_eld_decoder_sbr_pre_twiddle.s | 10 STMFD sp!, {r4-r12, r14}
37 SUB r14, r9, r7, LSL #1 @sub32(mult32x16in32_shl(Xim, cosine) , mult32x16in32_shl(Xre, sine))
39 STR r14, [r1], #4 @Store and increment pointer *pXim++ = im
60 SUB r14, r9, r7, LSL #1
63 STR r14, [r1], #4
|
| ixheaacd_lap1.s | 54 STMFD sp!, {r4-r9, r14}
86 STMFD sp!, {r4-r10, r14}
92 LSL r14, r6, r7
101 QADD r4, r4, r14
102 QADD r5, r5, r14
|
| /external/llvm/test/DebugInfo/SystemZ/ |
| eh_frame_personality.s | 12 stmg %r14, %r15, 112(%r15)
13 .cfi_offset %r14, -48
17 lmg %r14, %r15, 272(%r15)
18 br %r14
56 # DW_CFA_offset: r14 at cfa-48
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseMemoryLibOptDxe/Arm/ |
| CopyMem.S | 48 // Save the input parameters in extra registers (r11 = destination, r14 = source, r12 = length)
52 mov r14, r1
83 // r10 = dest_end, r14 = source_end
85 add r14, r12, r1
96 tst r14, #0xF
103 sub r3, r14, #1
110 sub r14, r14, #1
115 // r10 = dest_end, r14 = source_end
122 sub r14, r14, #32
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| x86-64-mwaitx-reg.l | 109 #r14
110 .*:[0-9]*: Error: .*r14.* 1 .*monitorx.*
111 .*:[0-9]*: Error: .*r14.* 2 .*monitorx.*
112 .*:[0-9]*: Error: .*r14.* 3 .*monitorx.*
113 .*:[0-9]*: Error: .*r14.* 1 .*mwaitx.*
114 .*:[0-9]*: Error: .*r14.* 2 .*mwaitx.*
115 .*:[0-9]*: Error: .*r14.* 3 .*mwaitx.*
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i860/ |
| shift.s | 10 shl %r31,%r13,%r14
22 shr %r31,%r13,%r14
34 shra %r31,%r13,%r14
46 shrd %r31,%r13,%r14
59 shl -32768,%r13,%r14
71 shr -32768,%r13,%r14
83 shra -32768,%r13,%r14
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Norm_Corr_opt.s | 53 STMFD r13!, {r4 - r12, r14}
71 MOV r14, r1 @copy xn[] address
77 LDR r9, [r14], #4
78 LDR r10, [r14], #4
79 LDR r11, [r14], #4
80 LDR r12, [r14], #4
108 ADD r14, r13, #20 @copy of excf[]
112 LDR r11, [r14], #4 @load excf[i], excf[i+1]
118 LDR r11, [r14], #4 @load excf[i+2], excf[i+3]
152 MOV r14, r
[all...] |
| /external/libavc/encoder/arm/ |
| ih264e_evaluate_intra4x4_modes_a9q.s | 119 stmfd sp!, {r4-r12, r14} @store register values to stack
205 mov r14, #1
208 addne r14, r14, #1
211 addne r14, r14, #1
214 moveq r14, #0
216 lsr r4, r4, r14
249 mov r14, #0
250 vdup.32 q13 , r14
[all...] |
| /external/boringssl/win-x86_64/crypto/fipsmodule/ |
| x86_64-mont.asm | 50 push r14
93 xor r14,r14
151 lea r14,[1+r14]
155 mov rbx,QWORD[r14*8+r12]
219 lea r14,[1+r14]
220 cmp r14,r9
223 xor r14,r1
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arc/ |
| nps400-7.d | 17 30: 5e90 5280 d953 8446 mov3b r14,r14,r12,0x1,0,0x6,0x7,0x3,0x2,0x14,0x2,0x15
19 40: 5e90 39c0 8c34 204e mov3b r14,r14,r12,0x8,0x2,0xe,0x8,0x1,0x2,0xe,0,0x3
25 70: 58d0 38c3 3671 2814 mov4b r0,r0,r14,0xa,0x3,0x14,0x2,0x2,0,0x6,0x1,0x7,0xe,0,0x3
26 78: 58d0 e3e2 58b6 048b mov4b r0,r0,r14,0x1,0,0xb,0xc,0x3,0x4,0x1f,0x2,0xb,0x18,0x1,0x2
27 80: 58d0 2068 e3fa 97c8 mov4b r0,r0,r14,0x5,0x1,0x8,0x15,0,0x1e,0x3,0x3,0x1f,0x8,0x2,0x8
28 88: 58d0 91a4 8deb 3ecd mov4b r0,r0,r14,0xf,0x2,0xd,0x16,0x1,0x16,0xd,0,0x1e,0x4,0x3,0x4
30 98: 5dd1 9064 1c31 0441 mov4bcl r13,r14,0x1,0x2,0x1,0x2,0x3,0x2,0x3,0,0x3,0x4,0x1,0x4
|
| nps400-1.s | 6 movb.cl r0, r14, 4, 5, 6
15 movbi r14, r14, 6, 8, 4
47 rflt 0,r14,r13
63 \mnem r13,r14,0x3f
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mn10300/ |
| am33_2.s | 12 sub r14,r15
13 subc r15,r14
27 ror r14
55 dmach r13,r14
56 dmachu r15,r14
|
| /external/boringssl/linux-x86_64/crypto/fipsmodule/ |
| aes-x86_64.S | 20 movl 0(%r14,%rsi,8),%r10d
21 movl 0(%r14,%rdi,8),%r11d
22 movl 0(%r14,%rbp,8),%r12d
27 xorl 3(%r14,%rsi,8),%r10d
28 xorl 3(%r14,%rdi,8),%r11d
29 movl 0(%r14,%rbp,8),%r8d
34 xorl 3(%r14,%rsi,8),%r12d
36 xorl 3(%r14,%rbp,8),%r8d
45 xorl 2(%r14,%rsi,8),%r10d
46 xorl 2(%r14,%rdi,8),%r11
[all...] |
