| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 239 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
406 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 60 MVT::SimpleValueType VecTys[2] = {MVT::v2i16, MVT::v4i8};
878 if ((Ty != MVT::v2i16) && (Ty != MVT::v4i8))
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 130 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand);
131 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand);
132 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v4i8, Expand);
186 setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom);
[all...] |
| R600ISelLowering.cpp | 151 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i8, Expand);
[all...] |
| SIISelLowering.cpp | 121 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i8, Custom);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 64 case MVT::v4i8:
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 559 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote);
560 setOperationAction(ISD::SINT_TO_FP, MVT::v4i8, Promote);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 633 // It is legal to extload from v4i8 to v4i16 or v4i32.
634 for (MVT Ty : {MVT::v8i8, MVT::v4i8, MVT::v2i8, MVT::v4i16, MVT::v2i16,
[all...] |
