| /art/disassembler/ |
| disassembler_mips.cc | 370 { kITypeMask | (0x7 << 18), (59u << kOpcodeShift) | (6 << 18), "ldpc", "S0" },
452 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xe, "addv", "Vkmn" },
453 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xe, "subv", "Vkmn" },
454 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x11, "asub_s", "Vkmn" },
455 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x11, "asub_u", "Vkmn" },
456 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x12, "mulv", "Vkmn" },
457 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x12, "div_s", "Vkmn" },
458 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x12, "div_u", "Vkmn" },
459 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x12, "mod_s", "Vkmn" },
460 { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x12, "mod_u", "Vkmn" }
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_sq.h | 34 #define S_SQ_CF_WORD1_POP_COUNT(x) (((unsigned)(x) & 0x7) << 0)
35 #define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7)
43 #define S_SQ_CF_WORD1_COUNT(x) (((unsigned)(x) & 0x7) << 10)
44 #define G_SQ_CF_WORD1_COUNT(x) (((x) >> 10) & 0x7)
161 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((unsigned)(x) & 0x7) << 0)
162 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7)
164 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((unsigned)(x) & 0x7) << 3)
165 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7)
167 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((unsigned)(x) & 0x7) << 6)
168 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7)
[all...] |
| r700_sq.h | 34 #define S_SQ_CF_WORD1_POP_COUNT(x) (((unsigned)(x) & 0x7) << 0)
35 #define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7)
43 #define S_SQ_CF_WORD1_COUNT(x) (((unsigned)(x) & 0x7) << 10)
44 #define G_SQ_CF_WORD1_COUNT(x) (((x) >> 10) & 0x7)
158 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((unsigned)(x) & 0x7) << 0)
159 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7)
161 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((unsigned)(x) & 0x7) << 3)
162 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7)
164 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((unsigned)(x) & 0x7) << 6)
165 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7)
[all...] |
| /external/mesa3d/src/gallium/drivers/virgl/ |
| virgl_protocol.h | 124 #define VIRGL_OBJ_BLEND_S2_RT_RGB_FUNC(x) (((x) & 0x7) << 1)
127 #define VIRGL_OBJ_BLEND_S2_RT_ALPHA_FUNC(x) (((x) & 0x7) << 14)
138 #define VIRGL_OBJ_DSA_S0_DEPTH_FUNC(x) (((x) & 0x7) << 2)
140 #define VIRGL_OBJ_DSA_S0_ALPHA_FUNC(x) (((x) & 0x7) << 9)
144 #define VIRGL_OBJ_DSA_S1_STENCIL_FUNC(x) (((x) & 0x7) << 1)
145 #define VIRGL_OBJ_DSA_S1_STENCIL_FAIL_OP(x) (((x) & 0x7) << 4)
146 #define VIRGL_OBJ_DSA_S1_STENCIL_ZPASS_OP(x) (((x) & 0x7) << 7)
147 #define VIRGL_OBJ_DSA_S1_STENCIL_ZFAIL_OP(x) (((x) & 0x7) << 10)
222 #define VIRGL_OBJ_SHADER_SO_OUTPUT_NUM_COMPONENTS(x) (((x) & 0x7) << 10)
223 #define VIRGL_OBJ_SHADER_SO_OUTPUT_BUFFER(x) (((x) & 0x7) << 13
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_intra_pred_luma_mode2.s | 139 add x7,x6,x3
147 add x9,x7,x3
164 st1 {v17.8b},[x7],x5
175 st1 {v21.8b},[x7],x5
205 add x7, x6, x3
215 add x9, x7, x3
233 st1 {v17.8b},[x7],x5
237 st1 {v21.8b},[x7],x5
254 add x7,x6,x3
267 st1 {v7.s}[0],[x7]
[all...] |
| ihevc_weighted_pred_bi.s | 128 // x7 => off0
135 // x7 => wd
173 mov x19,x7 // off0 52
188 mov x7,x19 //load off0
192 add x5,x7,x9 //off0 + off1
196 mov x7,x26 //load wd
203 lsl x9,x7,#1
213 cmp x7,#0 //check wd == 0
284 subs x7,x7,#4 //decrement wd by 4 and check for
[all...] |
| ihevc_sao_edge_offset_class3_chroma.s | 60 //x7 => wd
91 mov x21,x7 // *pu1_avail 0x34
100 SUB x9,x7,#2 //wd - 2
105 MOV x9,x7 //Move width to x9 for loop count
127 SUB x14,x7,#2 //[wd - 2]
129 SUB x11,x7,#1 //[wd - 1]
178 SUB x14,x7,#3 //[wd - 1 - 2]
326 MOV x6,x7 //move wd to x6 loop_count
328 CMP x7,#16 //Compare wd with 16
335 CMP x6,x7 //col == w
[all...] |
| ihevc_sao_edge_offset_class2_chroma.s | 60 //x7 => wd
92 mov x21,x7 // *pu1_avail 0x34
101 SUB x9,x7,#2 //wd - 2
107 MOV x9,x7 //Move width to x9 for loop count
217 SUB x10,x7,#2 //wd - 2
336 MOV x6,x7 //move wd to x6 loop_count
338 CMP x7,#16 //Compare wd with 16
347 CMP x6,x7 //col == wd
384 SUB x7,x7,x6 //(wd - col
[all...] |
| ihevc_inter_pred_luma_copy_w16out.s | 72 // x7 => ht
95 mov x7,x16 //loads ht
96 cmp x7,#0 //ht condition(ht == 0)
133 subs x7,x7,#4 //ht + 4
155 mul x7, x7, x4
157 sub x7,x7,#4 //subtract one for epilog
189 subs x7,x7,#4 //ht -
[all...] |
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| itrans8_dspr2.c | 615 int x0, x1, x2, x3, x4, x5, x6, x7; local
624 x7 = input[6];
626 if (!(x0 | x1 | x2 | x3 | x4 | x5 | x6 | x7)) {
639 s6 = cospi_26_64 * x6 + cospi_6_64 * x7;
640 s7 = cospi_6_64 * x6 - cospi_26_64 * x7;
649 x7 = ROUND_POWER_OF_TWO((s3 - s7), DCT_CONST_BITS);
658 s6 = -cospi_24_64 * x6 + cospi_8_64 * x7;
659 s7 = cospi_8_64 * x6 + cospi_24_64 * x7;
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| system.d | 22 38: d50320ff hint #0x7
143 21c: d52bf7e7 sysl x7, #3, C15, C7, #7
183 2bc: d50337df isb #0x7
196 2ec: f8be58e0 prfm pldl1keep, \[x7,w30,uxtw #3\]
201 2fc: f8be58e1 prfm pldl1strm, \[x7,w30,uxtw #3\]
206 30c: f8be58e2 prfm pldl2keep, \[x7,w30,uxtw #3\]
211 31c: f8be58e3 prfm pldl2strm, \[x7,w30,uxtw #3\]
216 32c: f8be58e4 prfm pldl3keep, \[x7,w30,uxtw #3\]
221 33c: f8be58e5 prfm pldl3strm, \[x7,w30,uxtw #3\]
226 34c: f8be58e6 prfm #0x06, \[x7,w30,uxtw #3\
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| avx2-intel.d | 15 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7
16 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[ecx\],0x7
17 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7
18 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[ecx\],0x7
36 [ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd ymm2,ymm6,ymm4,0x7
37 [ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
38 [ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 ymm2,ymm6,ymm4,0x7
39 [ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
40 [ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 ymm6,ymm4,xmm4,0x7
41 [ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7
[all...] |
| avx2.d | 14 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2
15 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%ecx\),%ymm6
16 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2
17 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%ecx\),%ymm6
35 [ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd \$0x7,%ymm4,%ymm6,%ymm2
36 [ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%ecx\),%ymm6,%ymm2
37 [ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 \$0x7,%ymm4,%ymm6,%ymm2
38 [ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%ecx\),%ymm6,%ymm2
39 [ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 \$0x7,%xmm4,%ymm4,%ymm6
40 [ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%ecx\),%ymm4,%ymm
[all...] |
| x86-64-avx2-intel.d | 15 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7
16 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[rcx\],0x7
17 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7
18 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[rcx\],0x7
36 [ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd ymm2,ymm6,ymm4,0x7
37 [ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
38 [ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 ymm2,ymm6,ymm4,0x7
39 [ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
40 [ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 ymm6,ymm4,xmm4,0x7
41 [ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7
[all...] |
| x86-64-avx2.d | 14 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2
15 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%rcx\),%ymm6
16 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2
17 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%rcx\),%ymm6
35 [ ]*[a-f0-9]+: c4 e3 4d 02 d4 07 vpblendd \$0x7,%ymm4,%ymm6,%ymm2
36 [ ]*[a-f0-9]+: c4 e3 4d 02 11 07 vpblendd \$0x7,\(%rcx\),%ymm6,%ymm2
37 [ ]*[a-f0-9]+: c4 e3 4d 46 d4 07 vperm2i128 \$0x7,%ymm4,%ymm6,%ymm2
38 [ ]*[a-f0-9]+: c4 e3 4d 46 11 07 vperm2i128 \$0x7,\(%rcx\),%ymm6,%ymm2
39 [ ]*[a-f0-9]+: c4 e3 5d 38 f4 07 vinserti128 \$0x7,%xmm4,%ymm4,%ymm6
40 [ ]*[a-f0-9]+: c4 e3 5d 38 31 07 vinserti128 \$0x7,\(%rcx\),%ymm4,%ymm
[all...] |
| /external/libavc/common/ |
| ih264_resi_trans_quant.c | 125 WORD32 x0, x1, x2, x3, x4, x5, x6, x7; local
137 x7 = pu1_src[3] - pu1_pred[3];
140 x0 = x4 + x7;
143 x3 = x4 - x7;
164 x7 = pi2_out_tmp[12];
167 x0 = x4 + x7;
170 x3 = x4 - x7;
273 WORD32 x0, x1, x2, x3, x4, x5, x6, x7; local
285 x7 = pu1_src[6] - pu1_pred[6];
288 x0 = x4 + x7;
422 WORD32 x0,x1,x2,x3,x4,x5,x6,x7,i4_value; local
550 WORD32 x0, x1, x2, x3, x4, x5, x6, x7; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| i915_reg.h | 45 #define PRIM3D_RECTLIST (0x7<<18)
72 #define BFO_STENCIL_TEST_MASK (0x7<<11)
74 #define BFO_STENCIL_FAIL_MASK (0x7<<8)
76 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5)
78 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2)
246 #define BLENDFUNC_MASK 0x7
250 #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16))
397 #define REG_TYPE_MASK 0x7
427 #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
586 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7
[all...] |
| /prebuilts/go/darwin-x86/src/vendor/golang_org/x/net/route/ |
| zsys_netbsd.go | 31 sysCTL_MACHDEP = 0x7
50 sysRTM_MISS = 0x7
81 sysRTAX_BRD = 0x7
|
| /prebuilts/go/linux-x86/src/vendor/golang_org/x/net/route/ |
| zsys_netbsd.go | 31 sysCTL_MACHDEP = 0x7
50 sysRTM_MISS = 0x7
81 sysRTAX_BRD = 0x7
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/ |
| dram_spec_timing.h | 215 #define DDR3_CL(n) (((((n) - 4) & 0x7) << 4)\
217 #define DDR3_WR(n) (((n) & 0x7) << 9)
235 #define DDR3_MR2_CWL(n) ((((n) - 5) & 0x7) << 3)
279 #define LPDDR2_DS_120 (0x7)
282 #define LPDDR2_TREF_MASK (0x7)
347 #define LPDDR3_RL9_WL5 (0x7)
389 #define LPDDR3_TREF_MASK (0x7)
399 #define LPDDR3_HT_EXED (0x7)
430 #define LPDDR4_RL36_NRTP16 (0x7)
438 #define LPDDR4_RL40_NRTP16 (0x7)
[all...] |
| /external/mesa3d/src/mesa/math/ |
| m_copy_tmp.h | 58 COPY_FUNC( 0x7 )
77 _mesa_copy_tab[0x7] = TAG2(copy, 0x7);
|
| /external/pdfium/fxbarcode/qrcode/ |
| BC_QRCoderBitVector.cpp | 38 return (value >> (7 - (index & 0x7))) & 1;
51 int32_t numBitsInLastByte = m_sizeInBits & 0x7;
66 if ((m_sizeInBits & 0x7) == 0 && numBitsLeft >= 8) {
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-aarch64/ |
| erratum843419.s | 9 mov x7, 13
21 mov x7, 13
27 str x7, [x0,12]
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/ |
| D05Mcfg.aslc | 77 0x7, //End Bus Number
91 0x7, //Segment Group Number
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/IScsiInitiatorName/ |
| IScsiInitiatorName.h | 28 0x59324945, 0xec44, 0x4c0d, {0xb1, 0xcd, 0x9d, 0xb1, 0x39, 0xdf, 0x7, 0xc } \
|
