| /device/linaro/bootloader/edk2/MdePkg/Library/BaseIoLibIntrinsic/ |
| IoHighLevel.c | 27 Reads an 8-bit I/O port, performs a bitwise OR, and writes the
28 result back to the 8-bit I/O port.
30 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
32 result to the 8-bit I/O port specified by Port. The value written to the I/O
33 port is returned. This function must guarantee that all I/O read and write
36 If 8-bit I/O port operations are not supported, then ASSERT().
38 @param Port The I/O port to write.
[all...] |
| IoLibIpf.c | 23 Translates I/O port address to memory address.
25 This function translates I/O port address to memory address by adding the 64MB
26 aligned I/O Port space to the I/O address.
27 If I/O Port space base is not 64MB aligned, then ASSERT ().
29 @param Port The I/O port to read.
36 IN UINTN Port
42 Address = MAP_PORT_BASE_TO_MEM (Port);
46 // Make sure that the I/O Port space base is 64MB aligned.
55 Reads an 8-bit I/O port.
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/DxeIoLibCpuIo2/ |
| IoHighLevel.c | 22 Reads an 8-bit I/O port, performs a bitwise OR, and writes the
23 result back to the 8-bit I/O port.
25 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
27 result to the 8-bit I/O port specified by Port. The value written to the I/O
28 port is returned. This function must guarantee that all I/O read and write
31 If 8-bit I/O port operations are not supported, then ASSERT().
33 @param Port The I/O port to write.
[all...] |
| IoLib.c | 52 Reads the I/O port specified by Port with registers width specified by Width.
56 @param Port The base address of the I/O operation.
66 IN UINTN Port,
73 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
82 Writes the I/O port specified by Port with registers width and value specified by Width
86 @param Port The base address of the I/O operation.
89 @param Data The value to write to the I/O port.
97 IN UINTN Port,
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/DxeIoLibEsal/ |
| IoHighLevel.c | 18 Reads an 8-bit I/O port, performs a bitwise OR, and writes the
19 result back to the 8-bit I/O port.
21 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
23 result to the 8-bit I/O port specified by Port. The value written to the I/O
24 port is returned. This function must guarantee that all I/O read and write
27 If 8-bit I/O port operations are not supported, then ASSERT().
29 @param Port The I/O port to write.
[all...] |
| IoLib.c | 20 Reads the I/O port specified by Port with registers width specified by Width.
24 @param Port The base address of the I/O operation.
34 IN UINTN Port,
48 Port,
62 Writes the I/O port specified by Port with registers width and value specified by Width
66 @param Port The base address of the I/O operation.
69 @param Data The value to write to the I/O port.
77 IN UINTN Port,
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/PeiIoLibCpuIo/ |
| IoHighLevel.c | 27 Reads an 8-bit I/O port, performs a bitwise OR, and writes the
28 result back to the 8-bit I/O port.
30 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
32 result to the 8-bit I/O port specified by Port. The value written to the I/O
33 port is returned. This function must guarantee that all I/O read and write
36 If 8-bit I/O port operations are not supported, then ASSERT().
38 @param Port The I/O port to write.
[all...] |
| IoLib.c | 24 Reads an 8-bit I/O port.
26 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
30 If 8-bit I/O port operations are not supported, then ASSERT().
32 @param Port The I/O port to read.
40 IN UINTN Port
50 return CpuIo->IoRead8 (PeiServices, CpuIo, (UINT64) Port);
54 Writes an 8-bit I/O port.
56 Writes the 8-bit I/O port specified by Port with the value specified by Value
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/SmmIoLibSmmCpuIo2/ |
| IoHighLevel.c | 27 Reads an 8-bit I/O port, performs a bitwise OR, and writes the
28 result back to the 8-bit I/O port.
30 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
32 result to the 8-bit I/O port specified by Port. The value written to the I/O
33 port is returned. This function must guarantee that all I/O read and write
36 If 8-bit I/O port operations are not supported, then ASSERT().
38 @param Port The I/O port to write.
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseS3IoLib/ |
| S3IoLib.c | 27 Saves an I/O port value to the boot script.
29 This internal worker function saves an I/O port value in the S3 script
34 @param Width The width of I/O port.
35 @param Port The I/O port to write.
42 IN UINTN Port,
50 Port,
58 Saves an 8-bit I/O port value to the boot script.
60 This internal worker function saves an 8-bit I/O port value in the S3 script
65 @param Port The I/O port to write.
[all...] |
| /device/linaro/bootloader/edk2/OvmfPkg/XenBusDxe/ |
| EventChannel.c | 25 IN evtchn_port_t Port
31 Send.port = Port;
41 OUT evtchn_port_t *Port
56 *Port = Parameter.port;
64 IN evtchn_port_t Port
70 return XenEventChannelNotify (Private->Dev, Port);
77 IN evtchn_port_t Port
82 Close.port = Port;
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Library/I2CLib/ |
| I2CLib.c | 40 I2C_Disable(UINT32 Socket,UINT8 Port)
47 UINTN Base = GetI2cBase(Socket, Port);
82 I2C_Enable(UINT32 Socket,UINT8 Port)
87 UINTN Base = GetI2cBase(Socket, Port);
106 void I2C_SetTarget(UINT32 Socket,UINT8 Port,UINT32 I2cDeviceAddr)
109 UINTN Base = GetI2cBase(Socket, Port);
122 I2CInit(UINT32 Socket, UINT32 Port, SPEED_MODE SpeedMode)
132 UINTN Base = GetI2cBase(Socket, Port);
134 if((Socket >= MAX_SOCKET) || (Port >= I2C_PORT_MAX) || (SpeedMode >= SPEED_MODE_MAX)){
139 Status = I2C_Disable(Socket,Port);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/ |
| PcieKernelApi.h | 273 extern int pcie_mode_get(UINT32 Port, PCIE_PORT_INFO *port_info);
275 extern int pcie_port_ctrl(UINT32 Port, UINT32 port_ctrl);
277 extern int pcie_link_speed_set(UINT32 Port, PCIE_PORT_GEN speed);
279 extern int pcie_port_cfg_set(UINT32 Port, pcie_cfg_params_s *cfg_params);
281 extern int pcie_port_cfg_get(UINT32 Port, pcie_cfg_params_s *cfg_params);
284 extern int pcie_dma_chan_ctl(UINT32 Port,UINT32 channel,UINT32 control);
286 extern int pcie_dma_chan_attribu_set(UINT32 Port,UINT32 channel, pcie_dma_channel_attrs_s *dma_attribute);
288 extern int pcie_dma_cur_status_get(UINT32 Port, UINT32 channel, pcie_dma_channel_status_e *dma_channel_status);
290 extern int pcie_dma_int_enable(UINT32 Port, UINT32 channel, pcie_dma_int_type_e int_type);
292 extern int pcie_dma_int_mask(UINT32 Port, UINT32 channel, pcie_dma_int_type_e int_type);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Drivers/PcieInitDxe/ |
| PcieKernelApi.h | 275 extern int pcie_mode_get(UINT32 Port, PCIE_PORT_INFO *port_info);
277 extern int pcie_port_ctrl(UINT32 Port, UINT32 port_ctrl);
279 extern int pcie_link_speed_set(UINT32 Port, PCIE_PORT_GEN speed);
281 extern int pcie_port_cfg_set(UINT32 Port, pcie_cfg_params_s *cfg_params);
283 extern int pcie_port_cfg_get(UINT32 Port, pcie_cfg_params_s *cfg_params);
286 extern int pcie_dma_chan_ctl(UINT32 Port,UINT32 channel,UINT32 control);
288 extern int pcie_dma_chan_attribu_set(UINT32 Port,UINT32 channel, pcie_dma_channel_attrs_s *dma_attribute);
290 extern int pcie_dma_cur_status_get(UINT32 Port, UINT32 channel, pcie_dma_channel_status_e *dma_channel_status);
292 extern int pcie_dma_int_enable(UINT32 Port, UINT32 channel, pcie_dma_int_type_e int_type);
294 extern int pcie_dma_int_mask(UINT32 Port, UINT32 channel, pcie_dma_int_type_e int_type);
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/DxeIoLibCpuIo/ |
| IoLib.c | 60 Reads the I/O port specified by Port with registers width specified by Width.
64 @param Port The base address of the I/O operation.
74 IN UINTN Port,
81 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
90 Writes the I/O port specified by Port with registers width and value specified by Width
94 @param Port The base address of the I/O operation.
97 @param Data The value to write to the I/O port.
105 IN UINTN Port,
[all...] |
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Library/DxeIoLibCpuIo/ |
| IoLib.c | 57 Reads the I/O port specified by Port with registers width specified by Width.
61 @param Port The base address of the I/O operation.
71 IN UINTN Port,
78 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
87 Writes the I/O port specified by Port with registers width and value specified by Width
91 @param Port The base address of the I/O operation.
94 @param Data The value to write to the I/O port.
102 IN UINTN Port,
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseIoLibIntrinsic/ |
| IoLibIcc.c | 210 Reads an 8-bit I/O port.
212 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
216 If 8-bit I/O port operations are not supported, then ASSERT().
218 @param Port The I/O port to read.
226 IN UINTN Port
232 mov dx, word ptr [Port]
241 Writes an 8-bit I/O port.
243 Writes the 8-bit I/O port specified by Port with the value specified by Value
[all...] |
| IoLibMsc.c | 37 int _inp (unsigned short port);
38 unsigned short _inpw (unsigned short port);
39 unsigned long _inpd (unsigned short port);
40 int _outp (unsigned short port, int databyte );
41 unsigned short _outpw (unsigned short port, unsigned short dataword );
42 unsigned long _outpd (unsigned short port, unsigned long dataword );
62 Reads an 8-bit I/O port.
64 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
68 If 8-bit I/O port operations are not supported, then ASSERT().
[all...] |
| IoLibIpf.c | 30 Reads a 8-bit I/O port.
32 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
36 @param Port The I/O port to read.
44 IN UINT64 Port
50 // Add the 64MB aligned IO Port space to the IO address
52 Address = MAP_PORT_BASE_TO_MEM (Port);
59 Reads a 16-bit I/O port.
61 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Pp2Dxe/ |
| Pp2Dxe.c | 246 PP2DXE_PORT *Port = &Pp2Context->Port;
249 Mvpp2ClsPortConfig(Port);
250 Mvpp2ClsOversizeRxqSet(Port);
251 MvGop110PortEventsMask(Port);
252 MvGop110PortEnable(Port);
255 Mvpp2EgressEnable(Port);
256 Mvpp2IngressEnable(Port);
270 Rxq = &Pp2Context->Port.Rxqs[Queue];
277 Mvpp2RxqHwInit(&Pp2Context->Port, Rxq);
[all...] |
| Mvpp2Lib.c | 164 /* Update Mask for single Port in Tcam sw entry */
182 /* Update Port map in Tcam sw entry */
198 /* Obtain Port map from Tcam sw entry */
653 /* Set port to promiscuous mode */
666 /* Entry exist - update port only */
691 /* Update port Mask */
716 /* Entry exist - update port only */
744 /* Update port Mask */
773 /* Entry exist - update port only */
807 /* Update port Mask */
[all...] |
| /prebuilts/go/darwin-x86/src/net/ |
| ipsock_test.go | 12 var testInetaddr = func(ip IPAddr) Addr { return &TCPAddr{IP: ip.IP, Port: 5682, Zone: ip.Zone} }
30 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
31 addrList{&TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682}},
32 addrList{&TCPAddr{IP: IPv6loopback, Port: 5682}},
42 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
43 addrList{&TCPAddr{IP: IPv6loopback, Port: 5682}},
44 addrList{&TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682}},
54 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
56 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
57 &TCPAddr{IP: IPv4(192, 168, 0, 1), Port: 5682}
[all...] |
| /prebuilts/go/linux-x86/src/net/ |
| ipsock_test.go | 12 var testInetaddr = func(ip IPAddr) Addr { return &TCPAddr{IP: ip.IP, Port: 5682, Zone: ip.Zone} }
30 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
31 addrList{&TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682}},
32 addrList{&TCPAddr{IP: IPv6loopback, Port: 5682}},
42 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
43 addrList{&TCPAddr{IP: IPv6loopback, Port: 5682}},
44 addrList{&TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682}},
54 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
56 &TCPAddr{IP: IPv4(127, 0, 0, 1), Port: 5682},
57 &TCPAddr{IP: IPv4(192, 168, 0, 1), Port: 5682}
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Usb/UsbBusDxe/ |
| UsbEnumer.h | 45 // Get the port status. This function is required to
46 // ACK the port change bits although it will return
47 // the port changes in PortState. Bus enumeration code
48 // doesn't need to ACK the port change bits.
54 IN UINT8 Port,
62 IN UINT8 Port
69 IN UINT8 Port,
77 IN UINT8 Port,
85 IN UINT8 Port
|
| /external/tensorflow/tensorflow/core/grappler/ |
| graph_view.h | 31 struct Port {
35 bool operator==(const Port& other) const {
39 struct InputPort : public Port {};
40 struct OutputPort : public Port {};
43 std::size_t operator()(const Port& port) const {
44 return reinterpret_cast<std::size_t>(port.node) + port.port_id;
51 // Get the specified input port. Note that the special '-1' port_id can be
55 // Get the specified output port. Note that the special '-1' port_id can b
[all...] |
