/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
SparcInstrInfo.cpp | 167 if (Opcode != SP::BCOND && Opcode != SP::FBCOND) 237 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); 258 && I->getOpcode() != SP::BCOND
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/toolchain/binutils/binutils-2.27/bfd/ |
elf32-crx.c | 953 * bal/bcond:32 -> bal/bcond:16 2 bytes 954 * bcond:16 -> bcond:8 2 bytes [all...] |
elf32-cr16.c | [all...] |
/art/compiler/utils/mips64/ |
assembler_mips64.cc | [all...] |
/art/compiler/utils/mips/ |
assembler_mips.cc | [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16InstrInfo.td | [all...] |
/external/llvm/lib/Target/Sparc/ |
LeonPasses.cpp | 547 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND)) 552 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND)) 595 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND)) 600 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND)) [all...] |
SparcInstrInfo.cpp | 147 return Opc == SP::FBCOND || Opc == SP::BCOND; 262 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); 283 && I->getOpcode() != SP::BCOND
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SparcInstrAliases.td | 68 (BCOND brtarget:$imm, condVal)>;
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SparcISelLowering.cpp | [all...] |
/prebuilts/go/darwin-x86/src/cmd/internal/obj/mips/ |
asm0.go | 1057 func BCOND(x uint32, y uint32) uint32 { [all...] |
/prebuilts/go/linux-x86/src/cmd/internal/obj/mips/ |
asm0.go | 1057 func BCOND(x uint32, y uint32) uint32 { [all...] |
/toolchain/binutils/binutils-2.27/opcodes/ |
cr16-dis.c | 308 /* Adjust mask for bcond with 32-bit size instruction. */ 332 /* Adjust mask for bcond with 32-bit size instruction */
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tic4x-dis.c | 514 case 'P': /* Displacement 0--15 (used by Bcond and BcondD). */
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/external/capstone/arch/Sparc/ |
SparcGenAsmWriter.inc | 93 1194492U, // BCOND 852 // BCOND, BCONDA, BPFCC, BPFCCA, BPFCCANT, BPFCCNT, BPICC, BPICCA, BPICCA... 919 // BCOND, BPFCC, FBCOND [all...] |
/external/kernel-headers/original/uapi/asm-mips/asm/ |
inst.h | 141 * rt field of bcond opcodes.
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/system/core/libpixelflinger/codeflinger/ |
mips64_disassem.c | 57 /* 0 */ "spec", "bcond", "j", "jal", "beq", "bne", "blez", "bgtz",
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mips_disassem.c | 70 /* 0 */ "spec", "bcond","j ", "jal", "beq", "bne", "blez", "bgtz",
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/toolchain/binutils/binutils-2.27/include/opcode/ |
ns32k.h | 51 p : displacement - pc relative addressing br bcond bsr cxp
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/toolchain/binutils/binutils-2.27/gas/config/ |
tc-rx.c | [all...] |
/toolchain/binutils/binutils-2.27/ld/testsuite/ |
ChangeLog-2010 | 636 * ld-arm/arm-elf.exp (armelftests): Add cortex-a8-fix-blx-bcond.s. 637 * ld-arm/cortex-a8-fix-blx-bcond.s: New. 638 * ld-arm/cortex-a8-fix-blx-bcond.d: New. [all...] |
/toolchain/binutils/binutils-2.27/ld/testsuite/ld-arm/ |
arm-elf.exp | [all...] |
/prebuilts/go/darwin-x86/pkg/darwin_amd64/cmd/internal/obj/ |
mips.a | 218 OP x·2 y·3 SP ? ? BCOND |