| /external/llvm/test/CodeGen/SPARC/ |
| 2011-01-11-CC.ll | 146 ; V8: addxcc
147 ; V8: addxcc
148 ; V8: addxcc
157 ; V9: addxcc
158 ; V9: addxcc
159 ; V9: addxcc
167 ; SPARC64: addxcc
168 ; SPARC64: addxcc
169 ; SPARC64: addxcc
|
| 32abi.ll | 193 ; CHECK-BE-NEXT: addxcc %i0, 0, %i0
195 ; CHECK-BE-NEXT: addxcc %i3, %i0, %i0
198 ; CHECK-BE-NEXT: addxcc %i5, %i0, %i0
200 ; CHECK-BE-NEXT: addxcc %g3, %i0, %i0
202 ; CHECK-BE-NEXT: addxcc %i0, 0, %i0
208 ; CHECK-LE-NEXT: addxcc %i1, 0, %i1
210 ; CHECK-LE-NEXT: addxcc %i4, %i1, %i1
213 ; CHECK-LE-NEXT: addxcc %g4, %i1, %i1
215 ; CHECK-LE-NEXT: addxcc %g3, %i1, %i1
217 ; CHECK-LE-NEXT: addxcc %i1, 0, %i
[all...] |
| basictest.ll | 90 ; CHECK: addxcc %o2, 0, %o4
|
| /external/llvm/test/MC/Sparc/ |
| sparc-alu-instructions.s | 16 ! CHECK: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
17 addxcc %g1, %g2, %g3
|
| sparcv9-instructions.s | 11 ! V9: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
|
| /external/capstone/suite/MC/Sparc/ |
| sparc-alu-instructions.s.cs | 7 0x86,0xc0,0x40,0x02 = addxcc %g1, %g2, %g3
|
| /external/llvm/test/MC/Disassembler/Sparc/ |
| sparc.txt | 18 # CHECK: addxcc %g1, %g2, %g3
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/frv/ |
| allinsn.s | 206 .global addxcc
207 addxcc: label
208 addxcc sp,sp,sp,icc0
|
| allinsn.d | 159 000000c8 <addxcc>:
160 c8: 82 00 10 c1 addxcc sp,sp,sp,icc0
|
| /toolchain/binutils/binutils-2.27/include/ |
| longlong.h | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrAliases.td | 484 def : MnemonicAlias<"addccc", "addxcc">, Requires<[HasV9]>;
|
| SparcInstrInfo.td | 710 defm ADDE : F3_12<"addxcc", 0b011000, adde, IntRegs, i32, simm13Op>;
[all...] |
| /external/capstone/arch/Sparc/ |
| SparcMapping.c | [all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| frv-desc.c | [all...] |
| sparc-opc.c | [all...] |
| frv-opc.c | [all...] |
| /toolchain/binutils/binutils-2.27/cpu/ |
| frv.cpu | [all...] |
