/external/llvm/test/CodeGen/AArch64/ |
arm64-fminv.ll | 6 %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in) 12 ; CHECK: fminv s0, v0.4s 13 %min = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %in) 20 %min = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> %in) 24 declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>) 25 declare float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float>) 26 declare double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double>)
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arm64-neon-across.ll | 7 declare float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float>) 439 ; CHECK: fminv s{{[0-9]+}}, {{v[0-9]+}}.4s 441 %0 = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %a)
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/external/llvm/test/MC/AArch64/ |
neon-across.s | 96 fminv h0, v1.4h 100 fminv h0, v1.8h 104 fminv s0, v1.4s 109 // CHECK: fminv h0, v1.4h // encoding: [0x20,0xf8,0xb0,0x0e] 113 // CHECK: fminv h0, v1.8h // encoding: [0x20,0xf8,0xb0,0x4e] 117 // CHECK: fminv s0, v1.4s // encoding: [0x20,0xf8,0xb0,0x6e]
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fullfp16-neon-neg.s | 78 fminv h0, v1.8h
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neon-diagnostics.s | [all...] |
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
advsimd-across.s | 44 .irp op, fmaxnmv, fminnmv, fmaxv, fminv
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advsimd-across.d | 46 98: 6eb0fbe7 fminv s7, v31.4s
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advsimd-fp16.s | 204 across_lanes fminv
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advsimd-fp16.d | 490 [0-9a-f]+: 6eb0f841 fminv s1, v2.4s 491 [0-9a-f]+: 0eb0f841 fminv h1, v2.4h 492 [0-9a-f]+: 4eb0f841 fminv h1, v2.8h 493 [0-9a-f]+: 0eb0f800 fminv h0, v0.4h 494 [0-9a-f]+: 4eb0f800 fminv h0, v0.8h
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illegal.s | 37 fminv d7, v31.2d
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/external/capstone/suite/MC/AArch64/ |
neon-across.s.cs | 40 0x20,0xf8,0xb0,0x6e = fminv s0, v1.4s
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/external/clang/test/CodeGen/ |
aarch64-neon-across.c | 376 // CHECK: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> [[TMP1]]) #2
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/prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
tables.go | 139 FMINV 608 FMINV: "FMINV", [all...] |
/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
tables.go | 139 FMINV 608 FMINV: "FMINV", [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64SchedCyclone.td | 453 "FMINS","FMIND","FMINv",
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AArch64SchedVulcan.td | 530 "^FMINv", "^FMINNMv")>;
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/toolchain/binutils/binutils-2.27/opcodes/ |
aarch64-tbl.h | 1238 /* e.g. FMINV <V><d>, <Vn>.<T>. */ 1244 /* e.g. FMINV <V><d>, <Vn>.<T>. */ [all...] |
ChangeLog-2015 | 82 fminnmv, fminv to the Adv.SIMD across lanes group. [all...] |
aarch64-dis-2.c | [all...] |
/prebuilts/vndk/v27/x86/arch-x86-x86/shared/vndk-core/ |
libvixl-arm64.so | |
/prebuilts/vndk/v27/x86_64/arch-x86-x86_64/shared/vndk-core/ |
libvixl-arm64.so | |
/external/vixl/doc/aarch64/ |
supported-instructions-aarch64.md | [all...] |
/external/vixl/src/aarch64/ |
macro-assembler-aarch64.h | [all...] |
assembler-aarch64.h | [all...] |
/external/valgrind/none/tests/arm64/ |
fp_and_simd.c | [all...] |