| /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/v2/ |
| gicv2_helpers.c | 90 void gicv2_spis_configure_defaults(uintptr_t gicd_base)
94 num_ints = gicd_read_typer(gicd_base);
103 gicd_write_igroupr(gicd_base, index, ~0U);
107 gicd_write_ipriorityr(gicd_base,
113 gicd_write_icfgr(gicd_base, index, 0);
120 void gicv2_secure_spis_configure(uintptr_t gicd_base,
133 gicd_clr_igroupr(gicd_base, irq_num);
136 gicd_set_ipriorityr(gicd_base,
141 gicd_set_itargetsr(gicd_base, irq_num,
142 gicv2_get_cpuif_id(gicd_base));
[all...] |
| gicv2_main.c | 76 assert(driver_data->gicd_base);
81 gicv2_secure_ppi_sgi_setup_props(driver_data->gicd_base,
87 gicv2_secure_ppi_sgi_setup(driver_data->gicd_base,
104 assert(driver_data->gicd_base);
107 ctlr = gicd_read_ctlr(driver_data->gicd_base);
108 gicd_write_ctlr(driver_data->gicd_base,
112 gicv2_spis_configure_defaults(driver_data->gicd_base);
117 gicv2_secure_spis_configure_props(driver_data->gicd_base,
125 gicv2_secure_spis_configure(driver_data->gicd_base,
132 gicd_write_ctlr(driver_data->gicd_base, ctlr | CTLR_ENABLE_G0_BIT)
[all...] |
| gicv2_private.h | 17 void gicv2_spis_configure_defaults(uintptr_t gicd_base);
19 void gicv2_secure_spis_configure(uintptr_t gicd_base,
22 void gicv2_secure_ppi_sgi_setup(uintptr_t gicd_base,
26 void gicv2_secure_spis_configure_props(uintptr_t gicd_base,
29 void gicv2_secure_ppi_sgi_setup_props(uintptr_t gicd_base,
|
| /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/v3/ |
| gicv3_main.c | 63 assert(plat_driver_data->gicd_base);
107 gic_version = gicd_read_pidr2(plat_driver_data->gicd_base);
116 gicv2_compat = gicd_read_ctlr(plat_driver_data->gicd_base);
161 assert(gicv3_driver_data->gicd_base);
170 gicd_clr_ctlr(gicv3_driver_data->gicd_base,
177 gicd_set_ctlr(gicv3_driver_data->gicd_base,
181 gicv3_spis_configure_defaults(gicv3_driver_data->gicd_base);
187 gicv3_driver_data->gicd_base,
197 gicv3_secure_spis_configure(gicv3_driver_data->gicd_base,
206 gicv3_secure_spis_configure(gicv3_driver_data->gicd_base,
691 uintptr_t gicd_base = gicv3_driver_data->gicd_base; local
755 uintptr_t gicd_base = gicv3_driver_data->gicd_base; local
[all...] |
| gicv3_helpers.c | 339 void gicv3_spis_configure_defaults(uintptr_t gicd_base)
343 num_ints = gicd_read_typer(gicd_base);
352 gicd_write_igroupr(gicd_base, index, ~0U);
356 gicd_write_ipriorityr(gicd_base,
365 gicd_write_icfgr(gicd_base, index, 0);
372 void gicv3_secure_spis_configure(uintptr_t gicd_base,
389 gicd_clr_igroupr(gicd_base, irq_num);
393 gicd_set_igrpmodr(gicd_base, irq_num);
395 gicd_clr_igrpmodr(gicd_base, irq_num);
398 gicd_set_ipriorityr(gicd_base,
[all...] |
| gicv3_private.h | 86 void gicv3_spis_configure_defaults(uintptr_t gicd_base);
89 void gicv3_secure_spis_configure(uintptr_t gicd_base,
101 unsigned int gicv3_secure_spis_configure_props(uintptr_t gicd_base,
120 static inline void gicd_wait_for_pending_write(uintptr_t gicd_base)
122 while (gicd_read_ctlr(gicd_base) & GICD_CTLR_RWP_BIT)
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| tegra_gic.c | 64 static void tegra_gic_pcpu_distif_setup(uint32_t gicd_base)
68 assert(gicd_base != 0U);
72 gicd_write_ipriorityr(gicd_base, index,
82 gicd_write_igroupr(gicd_base, 0, ~sec_ppi_sgi_mask);
90 static void tegra_gic_distif_setup(uint32_t gicd_base)
101 num_ints = gicd_read_typer(gicd_base) & IT_LINES_NO_MASK;
104 gicd_write_igroupr(gicd_base, index, 0xFFFFFFFFU);
109 gicd_write_ipriorityr(gicd_base, index,
123 gicd_clr_igroupr(gicd_base, irq_num);
126 mmio_write_8((uint64_t)gicd_base
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/ |
| uniphier_gicv3.c | 59 .gicd_base = 0x5fe00000,
68 .gicd_base = 0x5fe00000,
77 .gicd_base = 0x5fe00000,
|
| /device/linaro/bootloader/arm-trusted-firmware/include/drivers/arm/ |
| arm_gic.h | 16 uintptr_t gicd_base,
|
| gicv2.h | 128 * The 'gicd_base' field contains the base address of the Distributor interface
155 uintptr_t gicd_base; member in struct:gicv2_driver_data
|
| gicv3.h | 253 * The 'gicd_base' field contains the base address of the Distributor interface
307 uintptr_t gicd_base; member in struct:gicv3_driver_data
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/ |
| plat_mt_gic.c | 17 .gicd_base = BASE_GICD_BASE,
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/qemu/include/ |
| plat_macros.S | 22 mov_imm x16, GICD_BASE
|
| platform_def.h | 200 #define GICD_BASE 0x8000000
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/ |
| rockchip_gicv2.c | 36 .gicd_base = PLAT_RK_GICD_BASE,
|
| rockchip_gicv3.c | 42 .gicd_base = PLAT_RK_GICD_BASE,
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/ |
| arm_gicv2.c | 34 .gicd_base = PLAT_ARM_GICD_BASE,
|
| arm_gicv3.c | 62 .gicd_base = PLAT_ARM_GICD_BASE,
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/include/ |
| hi3798cv200.h | 77 #define GICD_BASE (0xF1001000)
|
| platform_def.h | 71 #define PLAT_ARM_GICD_BASE GICD_BASE
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/ |
| Madt.c | 38 #define GICD_BASE (FixedPcdGet64 (PcdGicDistributorBase))
93 GICD_BASE, /* UINT64 PhysicalBaseAddress */ \
240 GicD->PhysicalBaseAddress = GICD_BASE;
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/qemu/ |
| qemu_bl31_setup.c | 146 .gicd_base = GICD_BASE,
|
| /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/ |
| arm_gic.c | 281 uintptr_t gicd_base,
289 assert(gicd_base);
293 g_gicd_base = gicd_base;
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| hikey_bl31_setup.c | 62 .gicd_base = PLAT_ARM_GICD_BASE,
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| hikey960_bl31_setup.c | 56 .gicd_base = GICD_REG_BASE,
|
