| /external/llvm/test/MC/AArch64/ |
| neon-simd-ldst-one-elem.s | 29 ld2r { v0.16b, v1.16b }, [x0]
30 ld2r { v15.8h, v16.8h }, [x15]
31 ld2r { v31.4s, v0.4s }, [sp]
32 ld2r { v0.2d, v1.2d }, [x0]
33 ld2r { v0.8b, v1.8b }, [x0]
34 ld2r { v15.4h, v16.4h }, [x15]
35 ld2r { v31.2s, v0.2s }, [sp]
36 ld2r { v31.1d, v0.1d }, [sp]
37 // CHECK: ld2r { v0.16b, v1.16b }, [x0] // encoding: [0x00,0xc0,0x60,0x4d]
38 // CHECK: ld2r { v15.8h, v16.8h }, [x15] // encoding: [0xef,0xc5,0x60,0x4d
[all...] |
| arm64-simd-ldst.s | 904 ld2r: label
[all...] |
| /external/capstone/suite/MC/AArch64/ |
| neon-simd-ldst-one-elem.s.cs | 10 0x00,0xc0,0x60,0x4d = ld2r {v0.16b, v1.16b}, [x0]
11 0xef,0xc5,0x60,0x4d = ld2r {v15.8h, v16.8h}, [x15]
12 0xff,0xcb,0x60,0x4d = ld2r {v31.4s, v0.4s}, [sp]
13 0x00,0xcc,0x60,0x4d = ld2r {v0.2d, v1.2d}, [x0]
14 0x00,0xc0,0x60,0x0d = ld2r {v0.8b, v1.8b}, [x0]
15 0xef,0xc5,0x60,0x0d = ld2r {v15.4h, v16.4h}, [x15]
16 0xff,0xcb,0x60,0x0d = ld2r {v31.2s, v0.2s}, [sp]
17 0xff,0xcf,0x60,0x0d = ld2r {v31.1d, v0.1d}, [sp]
74 0x00,0xc0,0xff,0x4d = ld2r {v0.16b, v1.16b}, [x0], #2
75 0xef,0xc5,0xff,0x4d = ld2r {v15.8h, v16.8h}, [x15], #
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| neon-vfp-reglist.d | 163 26c: 0d60c000 ld2r {v0.8b, v1.8b}, \[x0\]
167 27c: 4d60c000 ld2r {v0.16b, v1.16b}, \[x0\]
171 28c: 0d60c400 ld2r {v0.4h, v1.4h}, \[x0\]
175 29c: 4d60c400 ld2r {v0.8h, v1.8h}, \[x0\]
179 2ac: 0d60c800 ld2r {v0.2s, v1.2s}, \[x0\]
183 2bc: 4d60c800 ld2r {v0.4s, v1.4s}, \[x0\]
187 2cc: 0d60cc00 ld2r {v0.1d, v1.1d}, \[x0\]
191 2dc: 4d60cc00 ld2r {v0.2d, v1.2d}, \[x0\]
|
| neon-vfp-reglist-post.d | 225 364: 0dffc000 ld2r {v0.8b, v1.8b}, \[x0\], #2
229 374: 4dffc000 ld2r {v0.16b, v1.16b}, \[x0\], #2
241 3a4: 0dffc400 ld2r {v0.4h, v1.4h}, \[x0\], #4
245 3b4: 4dffc400 ld2r {v0.8h, v1.8h}, \[x0\], #4
257 3e4: 0dffc800 ld2r {v0.2s, v1.2s}, \[x0\], #8
261 3f4: 4dffc800 ld2r {v0.4s, v1.4s}, \[x0\], #8
273 424: 0dffcc00 ld2r {v0.1d, v1.1d}, \[x0\], #16
277 434: 4dffcc00 ld2r {v0.2d, v1.2d}, \[x0\], #16
301 494: 0de7c000 ld2r {v0.8b, v1.8b}, \[x0\], x7
305 4a4: 4de7c000 ld2r {v0.16b, v1.16b}, \[x0\], x
[all...] |
| illegal.l | 82 [^:]*:122: Error: .*`ld2r {v1.4s,v2.4s,v3.4s},\[x3\]'
87 [^:]*:128: Error: .*`ld2r {v1.4s,v2.4s,v3.4s},\[x3\],x4'
92 [^:]*:134: Error: .*`ld2r {v1.4s,v2.4s},\[x3\],#4'
293 [^:]*:322: Error: .*`ld2r {v0.4h,v2.4h},\[x0\],#4'
296 [^:]*:322: Error: .*`ld2r {v0.8h,v2.8h},\[x0\],#4'
305 [^:]*:337: Error: .*`ld2r {v0.2s,v2.2s},\[x0\],#8'
308 [^:]*:337: Error: .*`ld2r {v0.4s,v2.4s},\[x0\],#8'
317 [^:]*:352: Error: .*`ld2r {v0.1d,v2.1d},\[x0\],#16'
320 [^:]*:352: Error: .*`ld2r {v0.2d,v2.2d},\[x0\],#16'
346 [^:]*:373: Error: .*`ld2r {v0.8b,v2.8b},\[x0\],x7
[all...] |
| illegal.s | 122 ld2r {v1.4s, v2.4s, v3.4s}, [x3]
128 ld2r {v1.4s, v2.4s, v3.4s}, [x3], x4
134 ld2r {v1.4s, v2.4s}, [x3], #4
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 418 { AArch64::LD2Rv16b, "ld2r", ".16b", 0, false, 0 },
419 { AArch64::LD2Rv8h, "ld2r", ".8h", 0, false, 0 },
420 { AArch64::LD2Rv4s, "ld2r", ".4s", 0, false, 0 },
421 { AArch64::LD2Rv2d, "ld2r", ".2d", 0, false, 0 },
422 { AArch64::LD2Rv8b, "ld2r", ".8b", 0, false, 0 },
423 { AArch64::LD2Rv4h, "ld2r", ".4h", 0, false, 0 },
424 { AArch64::LD2Rv2s, "ld2r", ".2s", 0, false, 0 },
425 { AArch64::LD2Rv1d, "ld2r", ".1d", 0, false, 0 },
426 { AArch64::LD2Rv16b_POST, "ld2r", ".16b", 1, false, 2 },
427 { AArch64::LD2Rv8h_POST, "ld2r", ".8h", 1, false, 4 }
[all...] |
| /external/valgrind/none/tests/arm64/ |
| memory.c | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-ld1.ll | 557 ; CHECK: ld2r.8b { v0, v1 }, [x0]
559 %tmp2 = call %struct.__neon_int8x8x2_t @llvm.aarch64.neon.ld2r.v8i8.p0i8(i8* %A)
581 declare %struct.__neon_int8x8x2_t @llvm.aarch64.neon.ld2r.v8i8.p0i8(i8*) nounwind readonly
588 ; CHECK: ld2r.16b { v0, v1 }, [x0]
590 %tmp2 = call %struct.__neon_int8x16x2_t @llvm.aarch64.neon.ld2r.v16i8.p0i8(i8* %A)
612 declare %struct.__neon_int8x16x2_t @llvm.aarch64.neon.ld2r.v16i8.p0i8(i8*) nounwind readonly
619 ; CHECK: ld2r.4h { v0, v1 }, [x0]
621 %tmp2 = call %struct.__neon_int16x4x2_t @llvm.aarch64.neon.ld2r.v4i16.p0i16(i16* %A)
643 declare %struct.__neon_int16x4x2_t @llvm.aarch64.neon.ld2r.v4i16.p0i16(i16*) nounwind readonly
650 ; CHECK: ld2r.8h { v0, v1 }, [x0
[all...] |
| arm64-indexed-vector-ldst.ll | [all...] |
| fp16-vector-load-store.ll | 224 declare { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2r.v4f16.p0f16(half*)
227 declare { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2r.v8f16.p0f16(half*)
234 ; CHECK: ld2r { v0.4h, v1.4h }, [x0]
236 %0 = tail call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2r.v4f16.p0f16(half* %a)
261 ; CHECK: ld2r { v0.8h, v1.8h }, [x0]
263 %0 = tail call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2r.v8f16.p0f16(half* %a)
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-advsimd.txt | 1074 # CHECK: ld2r.8b { v1, v2 }, [x1]
1075 # CHECK: ld2r.8b { v1, v2 }, [x1], x2
1076 # CHECK: ld2r.16b { v1, v2 }, [x1]
1077 # CHECK: ld2r.16b { v1, v2 }, [x1], x2
1078 # CHECK: ld2r.4h { v1, v2 }, [x1]
1079 # CHECK: ld2r.4h { v1, v2 }, [x1], x2
1080 # CHECK: ld2r.8h { v1, v2 }, [x1]
1081 # CHECK: ld2r.8h { v1, v2 }, [x1], x2
1082 # CHECK: ld2r.2s { v1, v2 }, [x1]
1083 # CHECK: ld2r.2s { v1, v2 }, [x1], x
[all...] |
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| test-disasm-aarch64.cc | [all...] |
| test-assembler-aarch64.cc | [all...] |
| /external/vixl/test/test-trace-reference/ |
| log-disasm | [all...] |
| log-disasm-colour | [all...] |
| log-all | [all...] |
| /external/clang/test/CodeGen/ |
| aarch64-neon-ldst-one.c | 309 // CHECK: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0i8(i8* %a)
327 // CHECK: [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0i16(i16* [[TMP2]])
345 // CHECK: [[VLD2:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0i32(i32* [[TMP2]])
363 // CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* [[TMP2]])
379 // CHECK: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0i8(i8* %a)
397 // CHECK: [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0i16(i16* [[TMP2]])
415 // CHECK: [[VLD2:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0i32(i32* [[TMP2]])
433 // CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* [[TMP2]])
451 // CHECK: [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0i16(i16* [[TMP2]])
469 // CHECK: [[VLD2:%.*]] = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0f32(float* [[TMP2]]
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| tables.go | 173 LD2R
642 LD2R: "LD2R",
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| tables.go | 173 LD2R
642 LD2R: "LD2R",
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64SchedKryoDetails.td | [all...] |
| /prebuilts/vndk/v27/arm/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm64.so | |
| /prebuilts/vndk/v27/arm64/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm64.so | |
