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  /external/llvm/test/CodeGen/PowerPC/
pr12757.ll 7 %0 = tail call i64 asm sideeffect "mffs $0", "=f"() nounwind
13 ; CHECK: mffs
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ppc/
common.s 111 mffs 30
112 mffs. 31
power9.s 376 mffs 25
377 mffs. 25
476.s 299 mffs 30
300 mffs. 31
a2.s 332 mffs. 20
333 mffs 20
common.d 119 1b0: (ff c0 04 8e|8e 04 c0 ff) mffs f30
120 1b4: (ff e0 04 8f|8f 04 e0 ff) mffs. f31
  /external/valgrind/none/tests/ppc32/
xlc_dbl_u32.c 20 " mffs %f3\n"
power5+_round.c 63 asm("fcmpu 1, %1, %2\n\t" "mffs %0\n":"=f"(fpscr.d)
99 "mffs %1\n" \
test_dfp1.c 74 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
149 __asm__ __volatile__ ("mffs %0" : "=f"(f14));
452 __asm__ __volatile__ ("mffs %0" : "=f"(f14));
test_dfp2.c 52 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
427 __asm__ __volatile__ ("mffs %0" : "=f"(f14));
test_dfp5.c 82 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
  /external/valgrind/none/tests/ppc64/
test_dfp1.c 74 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
149 __asm__ __volatile__ ("mffs %0" : "=f"(f14));
452 __asm__ __volatile__ ("mffs %0" : "=f"(f14));
test_dfp2.c 52 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
427 __asm__ __volatile__ ("mffs %0" : "=f"(f14));
test_isa_3_0.c 182 /* Also used to control DRM,RM values for mffs* functions. */
3814 unsigned int integer, altivec, altivec_quad, altivec_double, dfp, bcd, misc, mffs, member in struct:insn_sel_flags_t_struct
    [all...]
test_dfp5.c 82 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
  /external/llvm/test/MC/PowerPC/
ppc64-encoding-fp.s 359 # CHECK-BE: mffs 2 # encoding: [0xfc,0x40,0x04,0x8e]
360 # CHECK-LE: mffs 2 # encoding: [0x8e,0x04,0x40,0xfc]
361 mffs 2
362 # CHECK-BE: mffs. 7 # encoding: [0xfc,0xe0,0x04,0x8f]
363 # CHECK-LE: mffs. 7 # encoding: [0x8f,0x04,0xe0,0xfc]
364 mffs. 7
  /external/llvm/test/MC/Disassembler/PowerPC/
ppc64-encoding-fp.txt 321 # CHECK: mffs 2
324 # CHECK: mffs. 7
  /external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/
ebb_handler.S 144 mffs f0
  /external/capstone/suite/MC/PowerPC/
ppc64-encoding-fp.s.cs 108 0xfc,0x40,0x04,0x8e = mffs 2
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCSchedule.td 253 // mffs IntMFFS
PPCISelLowering.h 142 /// OUTFLAG = MFFS F8RC - This moves the FPSCR (not modelled) into the
144 MFFS,
  /external/valgrind/auxprogs/
ppcfround.c 143 "mffs %%f4\n\t" \
  /external/v8/src/ppc/
disasm-ppc.cc 1016 case MFFS: {
1017 Format(instr, "mffs'. 'Dt");
    [all...]
  /prebuilts/gcc/darwin-x86/host/i686-apple-darwin-4.2.1/include/gcc/darwin/4.2/
ppc_intrinsics.h 408 __asm__ ("mffs %0"
923 __asm__ volatile ("mffs %0"
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.h 202 /// F8RC = MFFS - This moves the FPSCR (not modeled) into the register.
203 MFFS,
    [all...]

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