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Searched
full:reg_d0
(Results
1 - 6
of
6
) sorted by null
/art/compiler/utils/arm/
managed_register_arm_test.cc
356
ArmManagedRegister
reg_D0
= ArmManagedRegister::FromDRegister(D0);
357
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::NoRegister()));
358
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::FromCoreRegister(R0)));
359
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::FromCoreRegister(R1)));
360
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::FromSRegister(S0)));
361
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::FromSRegister(S31)));
362
EXPECT_TRUE(
reg_D0
.Equals(ArmManagedRegister::FromDRegister(D0)));
363
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::FromDRegister(D1)));
364
EXPECT_TRUE(!
reg_D0
.Equals(ArmManagedRegister::FromRegisterPair(R0_R1)));
[
all
...]
/art/compiler/utils/arm64/
managed_register_arm64_test.cc
353
Arm64ManagedRegister
reg_D0
= Arm64ManagedRegister::FromDRegister(D0);
354
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::NoRegister()));
355
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::FromXRegister(X0)));
356
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::FromWRegister(W1)));
357
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::FromSRegister(S0)));
358
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::FromSRegister(S0)));
359
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::FromSRegister(S31)));
360
EXPECT_TRUE(
reg_D0
.Equals(Arm64ManagedRegister::FromDRegister(D0)));
361
EXPECT_TRUE(!
reg_D0
.Equals(Arm64ManagedRegister::FromDRegister(D1)));
[
all
...]
/external/swiftshader/third_party/subzero/src/
IceInstARM32.def
63
X(Reg_DREG_First, =
Reg_d0
) \
IceRegistersARM32.def
72
X(
Reg_d0
, 0, "d0", 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d0, q0, s0, s1)) \
IceTargetLoweringARM32.cpp
[
all
...]
/toolchain/binutils/binutils-2.27/opcodes/
i386-dis.c
715
REG_D0
,
[
all
...]
Completed in 814 milliseconds