| /external/mesa3d/src/mesa/x86/ |
| 3dnow_xform2.S | 46 MOV_L ( CONST(4), REGOFF(V4F_SIZE, ECX) )
47 OR_B ( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, ECX) )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(V4F_START, ECX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
63 PUNPCKLDQ ( REGOFF(16, ECX), MM0 ) /* m10 | m00 */
65 MOVD ( REGOFF(4, ECX), MM1 ) /* | m01 *
[all...] |
| 3dnow_xform4.S | 46 MOV_L ( CONST(4), REGOFF(V4F_SIZE, ECX) )
47 OR_B ( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, ECX) )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(V4F_START, ECX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
67 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
70 MOVQ ( REGOFF(8, EAX), MM4 ) /* x3 | x2 *
[all...] |
| 3dnow_xform3.S | 46 MOV_L ( CONST(4), REGOFF(V4F_SIZE, ECX) )
47 OR_B ( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, ECX) )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(V4F_START, ECX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
67 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
70 MOVD ( REGOFF(8, EAX), MM2 ) /* | x2 *
[all...] |
| x86_xform2.S | 41 #define SRC0 REGOFF(0, ESI)
42 #define SRC1 REGOFF(4, ESI)
43 #define SRC2 REGOFF(8, ESI)
44 #define SRC3 REGOFF(12, ESI)
45 #define DST0 REGOFF(0, EDI)
46 #define DST1 REGOFF(4, EDI)
47 #define DST2 REGOFF(8, EDI)
48 #define DST3 REGOFF(12, EDI)
49 #define MAT0 REGOFF(0, EDX)
50 #define MAT1 REGOFF(4, EDX
[all...] |
| 3dnow_xform1.S | 46 MOV_L ( CONST(4), REGOFF(V4F_SIZE, ECX) )
47 OR_B ( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, ECX) )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(4, ECX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
63 MOVQ ( REGOFF(8, ECX), MM1 ) /* m03 | m02 */
65 MOVQ ( REGOFF(48, ECX), MM2 ) /* m31 | m30 *
[all...] |
| sse_xform1.S | 40 #define S(i) REGOFF(i * 4, ESI)
41 #define D(i) REGOFF(i * 4, EDI)
42 #define M(i) REGOFF(i * 4, EDX)
54 MOV_L( REGOFF(OFFSET_SOURCE+8, ESP), ESI ) /* ptr to source GLvector4f */
55 MOV_L( REGOFF(OFFSET_DEST+8, ESP), EDI ) /* ptr to dest GLvector4f */
58 MOV_L( REGOFF(V4F_COUNT, ESI), ECX ) /* source count */
63 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
64 OR_L( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, EDI) ) /* set dest flags */
66 MOV_L( ECX, REGOFF(V4F_COUNT, EDI) ) /* set dest count */
67 MOV_L( CONST(4), REGOFF(V4F_SIZE, EDI) ) /* set dest size *
[all...] |
| sse_xform3.S | 40 #define S(i) REGOFF(i * 4, ESI)
41 #define D(i) REGOFF(i * 4, EDI)
42 #define M(i) REGOFF(i * 4, EDX)
54 MOV_L( REGOFF(OFFSET_SOURCE+8, ESP), ESI ) /* ptr to source GLvector4f */
55 MOV_L( REGOFF(OFFSET_DEST+8, ESP), EDI ) /* ptr to dest GLvector4f */
58 MOV_L( REGOFF(V4F_COUNT, ESI), ECX ) /* source count */
63 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
64 OR_L( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, EDI) ) /* set dest flags */
66 MOV_L( ECX, REGOFF(V4F_COUNT, EDI) ) /* set dest count */
67 MOV_L( CONST(4), REGOFF(V4F_SIZE, EDI) ) /* set dest size *
[all...] |
| x86_xform3.S | 41 #define SRC0 REGOFF(0, ESI)
42 #define SRC1 REGOFF(4, ESI)
43 #define SRC2 REGOFF(8, ESI)
44 #define SRC3 REGOFF(12, ESI)
45 #define DST0 REGOFF(0, EDI)
46 #define DST1 REGOFF(4, EDI)
47 #define DST2 REGOFF(8, EDI)
48 #define DST3 REGOFF(12, EDI)
49 #define MAT0 REGOFF(0, EDX)
50 #define MAT1 REGOFF(4, EDX
[all...] |
| x86_xform4.S | 41 #define SRC0 REGOFF(0, ESI)
42 #define SRC1 REGOFF(4, ESI)
43 #define SRC2 REGOFF(8, ESI)
44 #define SRC3 REGOFF(12, ESI)
45 #define DST0 REGOFF(0, EDI)
46 #define DST1 REGOFF(4, EDI)
47 #define DST2 REGOFF(8, EDI)
48 #define DST3 REGOFF(12, EDI)
49 #define MAT0 REGOFF(0, EDX)
50 #define MAT1 REGOFF(4, EDX
[all...] |
| sse_xform2.S | 40 #define S(i) REGOFF(i * 4, ESI)
41 #define D(i) REGOFF(i * 4, EDI)
42 #define M(i) REGOFF(i * 4, EDX)
54 MOV_L( REGOFF(OFFSET_SOURCE+8, ESP), ESI ) /* ptr to source GLvector4f */
55 MOV_L( REGOFF(OFFSET_DEST+8, ESP), EDI ) /* ptr to dest GLvector4f */
58 MOV_L( REGOFF(V4F_COUNT, ESI), ECX ) /* source count */
63 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
64 OR_L( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, EDI) ) /* set dest flags */
66 MOV_L( ECX, REGOFF(V4F_COUNT, EDI) ) /* set dest count */
67 MOV_L( CONST(4), REGOFF(V4F_SIZE, EDI) ) /* set dest size *
[all...] |
| sse_xform4.S | 35 #define SRC(i) REGOFF(i * 4, ESI)
36 #define DST(i) REGOFF(i * 4, EDI)
37 #define MAT(i) REGOFF(i * 4, EDX)
54 MOV_L( REGOFF(V4F_COUNT, ESI), ECX )
59 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
60 OR_L( CONST(VEC_SIZE_4), REGOFF(V4F_FLAGS, EDI) ) /* set dest flags */
62 MOV_L( ECX, REGOFF(V4F_COUNT, EDI) ) /* set dest count */
63 MOV_L( CONST(4), REGOFF(V4F_SIZE, EDI) )/* set dest size */
65 MOV_L( REGOFF(V4F_START, ESI), ESI ) /* ptr to first source vertex */
66 MOV_L( REGOFF(V4F_START, EDI), EDI ) /* ptr to first dest vertex *
[all...] |
| clip_args.h | 53 #define ARG_SOURCE REGOFF(FRAME_OFFSET+OFFSET_SOURCE, ESP)
54 #define ARG_DEST REGOFF(FRAME_OFFSET+OFFSET_DEST, ESP)
55 #define ARG_CLIP REGOFF(FRAME_OFFSET+OFFSET_CLIP, ESP)
56 #define ARG_OR REGOFF(FRAME_OFFSET+OFFSET_OR, ESP)
57 #define ARG_AND REGOFF(FRAME_OFFSET+OFFSET_AND, ESP)
|
| norm_args.h | 51 #define ARG_MAT REGOFF(FRAME_OFFSET+OFFSET_MAT, ESP)
52 #define ARG_SCALE REGOFF(FRAME_OFFSET+OFFSET_SCALE, ESP)
53 #define ARG_IN REGOFF(FRAME_OFFSET+OFFSET_IN, ESP)
54 #define ARG_LENGTHS REGOFF(FRAME_OFFSET+OFFSET_LENGTHS, ESP)
55 #define ARG_DEST REGOFF(FRAME_OFFSET+OFFSET_DEST, ESP)
|
| x86_cliptest.S | 36 #define SRC0 REGOFF(0, ESI)
37 #define SRC1 REGOFF(4, ESI)
38 #define SRC2 REGOFF(8, ESI)
39 #define SRC3 REGOFF(12, ESI)
40 #define DST0 REGOFF(0, EDI)
41 #define DST1 REGOFF(4, EDI)
42 #define DST2 REGOFF(8, EDI)
43 #define DST3 REGOFF(12, EDI)
44 #define MAT0 REGOFF(0, EDX)
45 #define MAT1 REGOFF(4, EDX
[all...] |
| sse_normal.S | 40 #define M(i) REGOFF(i * 4, EDX)
41 #define S(i) REGOFF(i * 4, ESI)
42 #define D(i) REGOFF(i * 4, EDI)
43 #define STRIDE REGOFF(12, ESI)
59 MOV_L ( REGOFF(MATRIX_INV, EDX), EDX) /* matrix->inv */
61 MOV_L ( REGOFF(V4F_COUNT, ESI), ECX ) /* source count */
67 MOV_L ( ECX, REGOFF(V4F_COUNT, EDI) ) /* set dest-count */
70 MOV_L( REGOFF(V4F_START, ESI), ESI ) /* ptr to first source vertex */
72 MOV_L( REGOFF(V4F_START, EDI), EDI ) /* ptr to first dest vertex */
121 MOV_L ( REGOFF(MATRIX_INV, EDX), EDX) /* matrix->inv *
[all...] |
| common_x86_asm.S | 77 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
83 MOV_L (REGOFF(16, ESP), EDI) /* *eax */
85 MOV_L (REGOFF(20, ESP), EDI) /* *ebx */
87 MOV_L (REGOFF(24, ESP), EDI) /* *ecx */
89 MOV_L (REGOFF(28, ESP), EDI) /* *edx */
101 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
114 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
128 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
142 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
189 STMXCSR ( REGOFF( -4, EBP )
[all...] |
| mmx_blendtmp.h | 25 MOV_L ( REGOFF(12, EBP), ECX ) /* n */
29 MOV_L ( REGOFF(16, EBP), EBX ) /* mask */
30 MOV_L ( REGOFF(20, EBP), EDI ) /* rgba */
31 MOV_L ( REGOFF(24, EBP), ESI ) /* dest */
|
| xform_args.h | 47 #define ARG_DEST REGOFF(FRAME_OFFSET+OFFSET_DEST, ESP)
48 #define ARG_MATRIX REGOFF(FRAME_OFFSET+OFFSET_MATRIX, ESP)
49 #define ARG_SOURCE REGOFF(FRAME_OFFSET+OFFSET_SOURCE, ESP)
|
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MvMdioDxe/ |
| MvMdioDxe.c | 55 INTN RegOff
63 if (RegOff > MVEBU_PHY_REG_MASK) {
64 DEBUG((DEBUG_ERROR, "Invalid register offset %d\n", RegOff));
119 IN UINT32 RegOff,
127 Status = MdioCheckParam (PhyAddr, RegOff);
142 | (RegOff << MVEBU_SMI_REG_ADDR_OFFS);
172 IN UINT32 RegOff,
181 RegOff,
193 IN UINT32 RegOff,
200 RegOff,
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/Marvell/Include/Protocol/ |
| Mdio.h | 47 IN UINT32 RegOff,
56 IN UINT32 RegOff,
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 207 unsigned RegOff = getMemOffReg();
208 if (RegOff)
209 Inst.addOperand(MCOperand::CreateReg(RegOff));
296 unsigned RegOff = getMemOffReg();
297 if (RegOff)
298 OS << "R" << getMBlazeRegisterNumbering(RegOff);
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/mips/ |
| obj0.go | 534 var regOff int16
536 regOff = 1 // load odd register first
540 p.To.Reg = reg + regOff
541 q.To.Reg = reg + 1 - regOff
545 p.From.Reg = reg + regOff
546 q.From.Reg = reg + 1 - regOff
1103 s.soffset = c.regoff(&p.To)
1151 s.soffset = c.regoff(&p.To)
1166 s.soffset = c.regoff(&p.To)
1222 s.soffset = c.regoff(&p.From
[all...] |
| /prebuilts/go/linux-x86/src/cmd/internal/obj/mips/ |
| obj0.go | 534 var regOff int16
536 regOff = 1 // load odd register first
540 p.To.Reg = reg + regOff
541 q.To.Reg = reg + 1 - regOff
545 p.From.Reg = reg + regOff
546 q.From.Reg = reg + 1 - regOff
1103 s.soffset = c.regoff(&p.To)
1151 s.soffset = c.regoff(&p.To)
1166 s.soffset = c.regoff(&p.To)
1222 s.soffset = c.regoff(&p.From
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/ppc64/ |
| asm9.go | 3473 func (c *ctxt9) regoff(a *obj.Addr) int32 { func
[all...] |
| /prebuilts/go/linux-x86/src/cmd/internal/obj/ppc64/ |
| asm9.go | 3473 func (c *ctxt9) regoff(a *obj.Addr) int32 { func
[all...] |
