| /external/llvm/test/CodeGen/Mips/ |
| dagcombine_crash.ll | 8 ; CHECK: sltiu ${{[0-9]*}}, ${{[0-9]*}}, 42
9 ; CHECK: sltiu ${{[0-9]*}}, ${{[0-9]*}}, 23
|
| seteqz.ll | 14 ; 16: sltiu ${{[0-9]+}}, 1
21 ; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 1
|
| setultk.ll | 17 ; 16: sltiu ${{[0-9]+}}, 10 # 16 bit inst
|
| seteq.ll | 17 ; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 1
|
| setcc-se.ll | 6 ; CHECK: sltiu ${{[0-9]+}}, $4, 1
92 ; CHECK: sltiu $[[R0:[0-9]+]], $4, 32767
125 ; CHECK: sltiu $[[R0:[0-9]+]], $4, -32768
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips16-absolute-reloc-2.s | 27 sltiu $2, bar
|
| bgeu.d | 17 [0-9a-f]+ <[^>]*> sltiu at,a0,2
24 [0-9a-f]+ <[^>]*> sltiu at,a0,-32768
|
| bltu.d | 17 [0-9a-f]+ <[^>]*> sltiu at,a0,2
24 [0-9a-f]+ <[^>]*> sltiu at,a0,-32768
|
| mips16-macro.d | 91 [ 0-9a-f]+: f010 5800 sltiu \$16,-32768
93 [ 0-9a-f]+: f7ef 591f sltiu \$17,32767
99 [ 0-9a-f]+: f010 5c00 sltiu \$4,-32768
101 [ 0-9a-f]+: f7ef 5d1f sltiu \$5,32767
107 [ 0-9a-f]+: f010 5800 sltiu \$16,-32768
109 [ 0-9a-f]+: f7ef 591f sltiu \$17,32767
115 [ 0-9a-f]+: f010 5c00 sltiu \$4,-32768
117 [ 0-9a-f]+: f7ef 5d1f sltiu \$5,32767
|
| mipsr6@bgeu.d | 21 [0-9a-f]+ <[^>]*> sltiu at,a0,2
30 [0-9a-f]+ <[^>]*> sltiu at,a0,-32768
|
| mipsr6@bltu.d | 21 [0-9a-f]+ <[^>]*> sltiu at,a0,2
30 [0-9a-f]+ <[^>]*> sltiu at,a0,-32768
|
| octeon.s | 77 seq $30,$25,512 # xori $30,$25,512;sltiu $30,$30,1
78 seq $2,$12,-777 # daddiu $2,$12,777;sltiu $2,$2,1
|
| micromips@bgeu.d | 21 [0-9a-f]+ <[^>]*> b024 0002 sltiu at,a0,2
30 [0-9a-f]+ <[^>]*> b024 8000 sltiu at,a0,-32768
|
| micromips@bltu.d | 21 [0-9a-f]+ <[^>]*> b024 0002 sltiu at,a0,2
30 [0-9a-f]+ <[^>]*> b024 8000 sltiu at,a0,-32768
|
| octeon.d | 71 .*: 2fde0001 sltiu \$30,\$30,1
73 .*: 2c420001 sltiu \$2,\$2,1
|
| /external/valgrind/none/tests/mips64/ |
| arithmetic_instruction.c | 14 SLTI, SLTIU, SLTU, SUB,
314 case SLTIU:
317 TEST2("sltiu $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1);
318 TEST2("sltiu $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3);
319 TEST2("sltiu $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1);
320 TEST2("sltiu $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1);
321 TEST2("sltiu $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1);
322 TEST2("sltiu $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3);
323 TEST2("sltiu $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1);
324 TEST2("sltiu $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1)
[all...] |
| /external/llvm/test/CodeGen/Mips/Fast-ISel/ |
| br1.ll | 25 ; CHECK: sltiu $[[REG2:[0-9]+]], $[[REG1]], 1
|
| /external/llvm/test/MC/Mips/ |
| do_switch1.s | 30 sltiu $1, $2, 4
|
| do_switch2.s | 31 sltiu $1, $3, 4
|
| do_switch3.s | 31 sltiu $4, $1, 4
|
| /frameworks/native/opengl/libagl/arch-mips/ |
| fixed_asm.S | 45 sltiu $t3,$t1,32 /* t3=1 if t1<32, else t3=0. t1>=32 means the float value is too small. */
|
| /external/llvm/lib/Target/Mips/ |
| MipsCondMov.td | 199 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>,
204 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>,
232 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>,
244 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32, SLT, SLTu, SLTi, SLTiu>,
251 defm : MovzPats0<GPR32, FGR64, MOVZ_I_D64, SLT, SLTu, SLTi, SLTiu>,
|
| /toolchain/binutils/binutils-2.27/binutils/testsuite/binutils-all/mips/ |
| mips16-undecoded.d | 47 [0-9a-f]+ <[^>]*> f008 5a11 sltiu v0,16401
48 [0-9a-f]+ <[^>]*> f008 5a11 sltiu v0,16401
49 [0-9a-f]+ <[^>]*> f008 5a31 sltiu v0,16401
50 [0-9a-f]+ <[^>]*> f008 5a51 sltiu v0,16401
51 [0-9a-f]+ <[^>]*> f008 5a91 sltiu v0,16401
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/iq2000/ |
| allinsn.s | 86 .global sltiu
87 sltiu: label
88 sltiu %0,%0,0
|
| /external/capstone/suite/MC/Mips/ |
| micromips-alu-instructions-EB.s.cs | 16 0xb0,0x63,0x00,0x67 = sltiu $3, $3, 103
|
