| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| ldst-exclusive.d | 50 a8: 880ffce1 stlxr w15, w1, \[x7\]
51 ac: 880ffce1 stlxr w15, w1, \[x7\]
52 b0: 880ffce1 stlxr w15, w1, \[x7\]
53 b4: c80ffce1 stlxr w15, x1, \[x7\]
54 b8: c80ffce1 stlxr w15, x1, \[x7\]
55 bc: c80ffce1 stlxr w15, x1, \[x7\]
|
| ldst-exclusive.s | 112 .irp op, stlxrb, stlxrh, stlxr
116 SR64 stlxr
|
| /prebuilts/go/darwin-x86/src/runtime/internal/atomic/ |
| atomic_arm64.s | 58 STLXR R1, (R0), R3
79 STLXR R2, (R0), R3
107 STLXR R2, (R0), R3
|
| /prebuilts/go/darwin-x86/src/sync/atomic/ |
| asm_arm64.s | 28 STLXR R1, (R0), R3
68 STLXR R2, (R0), R3
101 STLXR R2, (R0), R3
|
| /prebuilts/go/linux-x86/src/runtime/internal/atomic/ |
| atomic_arm64.s | 58 STLXR R1, (R0), R3
79 STLXR R2, (R0), R3
107 STLXR R2, (R0), R3
|
| /prebuilts/go/linux-x86/src/sync/atomic/ |
| asm_arm64.s | 28 STLXR R1, (R0), R3
68 STLXR R2, (R0), R3
101 STLXR R2, (R0), R3
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-ldxr-stxr.ll | 236 %res = call i32 @llvm.aarch64.stlxr.p0i8(i64 %extval, i8* %addr)
246 %res = call i32 @llvm.aarch64.stlxr.p0i16(i64 %extval, i16* %addr)
254 ; CHECK: stlxr w0, w1, [x2]
256 %res = call i32 @llvm.aarch64.stlxr.p0i32(i64 %extval, i32* %addr)
262 ; CHECK: stlxr w0, x1, [x2]
263 %res = call i32 @llvm.aarch64.stlxr.p0i64(i64 %val, i64* %addr)
267 declare i32 @llvm.aarch64.stlxr.p0i8(i64, i8*) nounwind
268 declare i32 @llvm.aarch64.stlxr.p0i16(i64, i16*) nounwind
269 declare i32 @llvm.aarch64.stlxr.p0i32(i64, i32*) nounwind
270 declare i32 @llvm.aarch64.stlxr.p0i64(i64, i64*) nounwin
[all...] |
| cmpxchg-idioms.ll | 11 ; CHECK: stlxr [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x0]
66 ; CHECK: stlxr [[STATUS:w[0-9]+]], w2, [x0]
|
| cmpxchg-O0.ll | 39 ; CHECK: stlxr [[STATUS:w[3-9]]], w2, [x0]
54 ; CHECK: stlxr [[STATUS:w[3-9]]], x2, [x0]
|
| arm64-atomic.ll | 47 ; CHECK-NEXT: stlxr [[SCRATCH_REG:w[0-9]+]], w2, [x[[ADDR]]
82 ; CHECK-NOT: stlxr [[SCRATCH2_REG]], [[SCRATCH2_REG]]
83 ; CHECK: stlxr [[SCRATCH_REG:w[0-9]+]], [[SCRATCH2_REG]], [x0]
97 ; CHECK: stlxr [[SCRATCH_REG:w[0-9]+]], [[SCRATCH2_REG]], [x[[ADDR]]]
110 ; CHECK-NOT: stlxr [[SCRATCH2_REG]], [[SCRATCH2_REG]]
111 ; CHECK: stlxr [[SCRATCH_REG:w[0-9]+]], [[SCRATCH2_REG]], [x0]
|
| atomic-ops.ll | 67 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
167 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
227 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
327 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
387 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
464 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], w0, [x[[ADDR]]]
581 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
655 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
751 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
775 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]
[all...] |
| /external/ltp/include/ |
| tst_atomic.h | 238 " stlxr %w1, %w0, %2 \n"
248 /* We are using load and store exclusive (ldaxr & stlxr) instructions to try
262 " stlxr %w[tmp], %w[ret], %[v] \n"
278 " stlxr %w[tmp], %w[i], %[v] \n"
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 197 "STLXR",
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 197 "STLXR",
|
| /external/clang/test/CodeGen/ |
| builtins-arm-exclusive.c | 277 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i8(i64 4, i8* %addr)
284 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i16(i64 42, i16* [[ADDR16]])
291 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 42, i32* [[ADDR32]])
304 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 42, i64* [[ADDR64]])
313 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 1076754509, i32* [[TMP5]])
327 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 4614256650576692846, i64* [[TMP5]])
338 // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 [[INTVAL]], i64* [[TMP5]])
|
| /external/vixl/ |
| README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
|
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/ |
| arm64.go | 69 // constant) is one of the STLXR-like instructions that require special
|
| /prebuilts/go/linux-x86/src/cmd/asm/internal/arch/ |
| arm64.go | 69 // constant) is one of the STLXR-like instructions that require special
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/arm64/ |
| ssa.go | 356 // STLXR Rarg1, (Rarg0), Rtmp
387 // STLXR Rout, (Rarg0), Rtmp
424 // STLXR Rarg2, (Rarg0), Rtmp
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/ |
| ARM64Ops.go | 469 // STLXR Rarg1, (Rarg0), Rtmp
478 // STLXR Rout, (Rarg0), Rtmp
494 // STLXR Rarg2, (Rarg0), Rtmp
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/arm64/ |
| ssa.go | 356 // STLXR Rarg1, (Rarg0), Rtmp
387 // STLXR Rout, (Rarg0), Rtmp
424 // STLXR Rarg2, (Rarg0), Rtmp
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/gen/ |
| ARM64Ops.go | 469 // STLXR Rarg1, (Rarg0), Rtmp
478 // STLXR Rout, (Rarg0), Rtmp
494 // STLXR Rarg2, (Rarg0), Rtmp
|
| /external/llvm/test/MC/AArch64/ |
| arm64-memory.s | 524 stlxr w8, x7, [x1]
525 stlxr w8, w7, [x1]
531 ; CHECK: stlxr w8, x7, [x1] ; encoding: [0x27,0xfc,0x08,0xc8]
532 ; CHECK: stlxr w8, w7, [x1] ; encoding: [0x27,0xfc,0x08,0x88]
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| tables.go | 363 STLXR
832 STLXR: "STLXR",
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| tables.go | 363 STLXR
832 STLXR: "STLXR",
[all...] |
