1 /* ldst-exclusive.s Test file for AArch64 load-store exclusive 2 instructions. 3 4 Copyright (C) 2011-2016 Free Software Foundation, Inc. 5 Contributed by ARM Ltd. 6 7 This file is part of GAS. 8 9 GAS is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3 of the license, or 12 (at your option) any later version. 13 14 GAS is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; see the file COPYING3. If not, 21 see <http://www.gnu.org/licenses/>. */ 22 23 24 /* <mnemonic> <Wt>, [<Xn|SP>]{,#0}] */ 25 .macro LR32 op 26 \op w1, [x7] 27 \op w1, [x7, #0] 28 \op w1, [x7, 0] 29 .endm 30 31 /* <mnemonic> <Xt>, [<Xn|SP>]{,#0}] */ 32 .macro LR64 op 33 \op x1, [x7] 34 \op x1, [x7, #0] 35 \op x1, [x7, 0] 36 .endm 37 38 /* <mnemonic> <Ws>, <Wt>, [<Xn|SP>]{,#0}] */ 39 .macro SR32 op 40 \op w15, w1, [x7] 41 \op w15, w1, [x7, #0] 42 \op w15, w1, [x7, 0] 43 .endm 44 45 /* <mnemonic> <Ws>, <Xt>, [<Xn|SP>]{,#0}] */ 46 .macro SR64 op 47 \op w15, x1, [x7] 48 \op w15, x1, [x7, #0] 49 \op w15, x1, [x7, 0] 50 .endm 51 52 /* <mnemonic> <Wt1>, <Wt2>, [<Xn|SP>]{,#0}] */ 53 .macro LP32 op 54 \op w1, w2, [x7] 55 \op w1, w2, [x7, #0] 56 \op w1, w2, [x7, 0] 57 .endm 58 59 /* <mnemonic> <Xt1>, <Xt2>, [<Xn|SP>]{,#0}] */ 60 .macro LP64 op 61 \op x1, x2, [x7] 62 \op x1, x2, [x7, #0] 63 \op x1, x2, [x7, 0] 64 .endm 65 66 /* <mnemonic> <Ws>, <Wt1>, <Wt2>, [<Xn|SP>]{,#0}] */ 67 .macro SP32 op 68 \op w15, w1, w2, [x7] 69 \op w15, w1, w2, [x7, #0] 70 \op w15, w1, w2, [x7, 0] 71 .endm 72 73 /* <mnemonic> <Ws>, <Xt1>, <Xt2>, [<Xn|SP>]{,#0}] */ 74 .macro SP64 op 75 \op w15, x1, x2, [x7] 76 \op w15, x1, x2, [x7, #0] 77 \op w15, x1, x2, [x7, 0] 78 .endm 79 80 /* <mnemonic> <Wt>, [<Xn|SP>]{,#0}] */ 81 .macro SL32 op 82 \op w1, [x7] 83 \op w1, [x7, #0] 84 \op w1, [x7, 0] 85 .endm 86 87 /* <mnemonic> <Xt>, [<Xn|SP>]{,#0}] */ 88 .macro SL64 op 89 \op x1, [x7] 90 \op x1, [x7, #0] 91 \op x1, [x7, 0] 92 .endm 93 94 func: 95 .irp op, stxrb, stxrh, stxr 96 SR32 \op 97 .endr 98 99 SR64 stxr 100 101 .irp op, ldxrb, ldxrh, ldxr 102 LR32 \op 103 .endr 104 105 LR64 ldxr 106 107 SP32 stxp 108 SP64 stxp 109 LP32 ldxp 110 LP64 ldxp 111 112 .irp op, stlxrb, stlxrh, stlxr 113 SR32 \op 114 .endr 115 116 SR64 stlxr 117 118 .irp op, ldaxrb, ldaxrh, ldaxr 119 LR32 \op 120 .endr 121 122 LR64 ldaxr 123 124 SP32 stlxp 125 SP64 stlxp 126 LP32 ldaxp 127 LP64 ldaxp 128 129 .irp op, stlrb, stlrh, stlr 130 SL32 \op 131 .endr 132 133 SL64 stlr 134 135 .irp op, ldarb, ldarh, ldar 136 LR32 \op 137 .endr 138 139 LR64 ldar 140
