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      1 /*
      2  * Copyright (C) 2014 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #ifndef ART_COMPILER_UTILS_MIPS64_CONSTANTS_MIPS64_H_
     18 #define ART_COMPILER_UTILS_MIPS64_CONSTANTS_MIPS64_H_
     19 
     20 #include <iosfwd>
     21 
     22 #include <android-base/logging.h>
     23 
     24 #include "arch/mips64/registers_mips64.h"
     25 #include "base/macros.h"
     26 #include "globals.h"
     27 
     28 namespace art {
     29 namespace mips64 {
     30 
     31 // Constants used for the decoding or encoding of the individual fields of instructions.
     32 enum InstructionFields {
     33   kOpcodeShift = 26,
     34   kOpcodeBits = 6,
     35   kRsShift = 21,
     36   kRsBits = 5,
     37   kRtShift = 16,
     38   kRtBits = 5,
     39   kRdShift = 11,
     40   kRdBits = 5,
     41   kShamtShift = 6,
     42   kShamtBits = 5,
     43   kFunctShift = 0,
     44   kFunctBits = 6,
     45 
     46   kFmtShift = 21,
     47   kFmtBits = 5,
     48   kFtShift = 16,
     49   kFtBits = 5,
     50   kFsShift = 11,
     51   kFsBits = 5,
     52   kFdShift = 6,
     53   kFdBits = 5,
     54 
     55   kMsaOperationShift = 23,
     56   kMsaELMOperationShift = 22,
     57   kMsa2ROperationShift = 18,
     58   kMsa2RFOperationShift = 17,
     59   kDfShift = 21,
     60   kDfMShift = 16,
     61   kDf2RShift = 16,
     62   kDfNShift = 16,
     63   kWtShift = 16,
     64   kWtBits = 5,
     65   kWsShift = 11,
     66   kWsBits = 5,
     67   kWdShift = 6,
     68   kWdBits = 5,
     69   kS10Shift = 16,
     70   kI10Shift = 11,
     71   kS10MinorShift = 2,
     72 
     73   kBranchOffsetMask = 0x0000ffff,
     74   kJumpOffsetMask = 0x03ffffff,
     75   kMsaMajorOpcode = 0x1e,
     76   kMsaDfMByteMask = 0x70,
     77   kMsaDfMHalfwordMask = 0x60,
     78   kMsaDfMWordMask = 0x40,
     79   kMsaDfMDoublewordMask = 0x00,
     80   kMsaDfNByteMask = 0x00,
     81   kMsaDfNHalfwordMask = 0x20,
     82   kMsaDfNWordMask = 0x30,
     83   kMsaDfNDoublewordMask = 0x38,
     84   kMsaS10Mask = 0x3ff,
     85 };
     86 
     87 enum ScaleFactor {
     88   TIMES_1 = 0,
     89   TIMES_2 = 1,
     90   TIMES_4 = 2,
     91   TIMES_8 = 3
     92 };
     93 
     94 class Instr {
     95  public:
     96   static const uint32_t kBreakPointInstruction = 0x0000000D;
     97 
     98   bool IsBreakPoint() {
     99     return ((*reinterpret_cast<const uint32_t*>(this)) & 0xFC00003F) == kBreakPointInstruction;
    100   }
    101 
    102   // Instructions are read out of a code stream. The only way to get a
    103   // reference to an instruction is to convert a pointer. There is no way
    104   // to allocate or create instances of class Instr.
    105   // Use the At(pc) function to create references to Instr.
    106   static Instr* At(uintptr_t pc) { return reinterpret_cast<Instr*>(pc); }
    107 
    108  private:
    109   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
    110 };
    111 
    112 }  // namespace mips64
    113 }  // namespace art
    114 
    115 #endif  // ART_COMPILER_UTILS_MIPS64_CONSTANTS_MIPS64_H_
    116