1 /* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #include "asm_support_arm.S" 18 19 .section .text 20 // These functions are used to check for the CPU's support for the sdiv and 21 // ARMv8-A instructions at runtime. They will either return the value 1 or will 22 // cause an invalid instruction trap (SIGILL signal), for which the signal handler 23 // (bad_instr_handle(), in instruction_set_features_arm.cc) must arrange to set 24 // the r0 register to 0 and move the pc forward by 4 bytes (to skip the invalid 25 // instruction). 26 // Note: For ARM T32, instructions can be either 16b or 32b, but bad_instr_handle() 27 // deals only with 32b instructions for now. 28 29 ENTRY artCheckForArmSdivInstruction 30 mov r1,#1 31 // Depending on the architecture, the assembler will not allow an 32 // sdiv instruction, so we will have to output the bytes directly. 33 34 // The T32 encoding for sdiv r0,r1,r1 is two 16bit words: 0xfb91 0xf0f1, with little endianness. 35 .byte 0x91,0xfb 36 .byte 0xf1,0xf0 37 38 // If the divide worked, r0 will have the value #1 (result of sdiv). 39 // It will have 0 otherwise (set by the signal handler) 40 // the value is just returned from this function. 41 bx lr 42 END artCheckForArmSdivInstruction 43 44 ENTRY artCheckForArmv8AInstructions 45 // Depending on the architecture, the assembler will not allow a 46 // `vrint` instruction, so we will have to output the bytes directly. 47 48 // Move `true` into the result register. The signal handler will set it to 0 49 // if execution of the instruction below fails 50 mov r0,#1 51 52 // Store S0 in the caller saved R1. If the instruction below succeeds, S0 will 53 // be clobbered but it will not be caller saved (ARM still uses soft FP). 54 vmov r1, s0 55 56 // The T32 encoding for vrinta.f32.f32 s0,s0 is two 16bit words: 0xfeb8,0x0a40, with little 57 // endianness. 58 .byte 0xb8,0xfe 59 .byte 0x40,0x0a 60 61 // Restore S0 (see above comment). 62 vmov s0, r1 63 64 bx lr 65 END artCheckForArmv8AInstructions 66
