1 /* 2 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 3 * 32-bit shift distance. 4 */ 5 /* shl-long/2addr vA, vB */ 6 mov r3, rINST, lsr #12 @ r3<- B 7 ubfx r9, rINST, #8, #4 @ r9<- A 8 GET_VREG r2, r3 @ r2<- vB 9 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs 10 VREG_INDEX_TO_ADDR r9, r9 @ r9<- &fp[A] 11 and r2, r2, #63 @ r2<- r2 & 0x3f 12 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 13 mov r1, r1, asl r2 @ r1<- r1 << r2 14 rsb r3, r2, #32 @ r3<- 32 - r2 15 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2)) 16 subs ip, r2, #32 @ ip<- r2 - 32 17 FETCH_ADVANCE_INST 1 @ advance rPC, load rINST 18 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32) 19 mov r0, r0, asl r2 @ r0<- r0 << r2 20 GET_INST_OPCODE ip @ extract opcode from rINST 21 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1 22 GOTO_OPCODE ip @ jump to next instruction 23
