1 /* 2 * This file was generated automatically by gen-mterp.py for 'x86_64'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7 /* File: x86_64/header.S */ 8 /* 9 * Copyright (C) 2016 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24 /* 25 Art assembly interpreter notes: 26 27 First validate assembly code by implementing ExecuteXXXImpl() style body (doesn't 28 handle invoke, allows higher-level code to create frame & shadow frame. 29 30 Once that's working, support direct entry code & eliminate shadow frame (and 31 excess locals allocation. 32 33 Some (hopefully) temporary ugliness. We'll treat rFP as pointing to the 34 base of the vreg array within the shadow frame. Access the other fields, 35 dex_pc_, method_ and number_of_vregs_ via negative offsets. For now, we'll continue 36 the shadow frame mechanism of double-storing object references - via rFP & 37 number_of_vregs_. 38 39 */ 40 41 /* 42 x86_64 ABI general notes: 43 44 Caller save set: 45 rax, rdx, rcx, rsi, rdi, r8-r11, st(0)-st(7) 46 Callee save set: 47 rbx, rbp, r12-r15 48 Return regs: 49 32-bit in eax 50 64-bit in rax 51 fp on xmm0 52 53 First 8 fp parameters came in xmm0-xmm7. 54 First 6 non-fp parameters came in rdi, rsi, rdx, rcx, r8, r9. 55 Other parameters passed on stack, pushed right-to-left. On entry to target, first 56 param is at 8(%esp). Traditional entry code is: 57 58 Stack must be 16-byte aligned to support SSE in native code. 59 60 If we're not doing variable stack allocation (alloca), the frame pointer can be 61 eliminated and all arg references adjusted to be esp relative. 62 */ 63 64 /* 65 Mterp and x86_64 notes: 66 67 Some key interpreter variables will be assigned to registers. 68 69 nick reg purpose 70 rPROFILE rbp countdown register for jit profiling 71 rPC r12 interpreted program counter, used for fetching instructions 72 rFP r13 interpreted frame pointer, used for accessing locals and args 73 rINSTw bx first 16-bit code of current instruction 74 rINSTbl bl opcode portion of instruction word 75 rINSTbh bh high byte of inst word, usually contains src/tgt reg names 76 rIBASE r14 base of instruction handler table 77 rREFS r15 base of object references in shadow frame. 78 79 Notes: 80 o High order 16 bits of ebx must be zero on entry to handler 81 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit 82 o eax and ecx are scratch, rINSTw/ebx sometimes scratch 83 84 Macros are provided for common operations. Each macro MUST emit only 85 one instruction to make instruction-counting easier. They MUST NOT alter 86 unspecified registers or condition codes. 87 */ 88 89 /* 90 * This is a #include, not a %include, because we want the C pre-processor 91 * to expand the macros into assembler assignment statements. 92 */ 93 #include "asm_support.h" 94 #include "interpreter/cfi_asm_support.h" 95 96 /* 97 * Handle mac compiler specific 98 */ 99 #if defined(__APPLE__) 100 #define MACRO_LITERAL(value) $(value) 101 #define FUNCTION_TYPE(name) 102 #define SIZE(start,end) 103 // Mac OS' symbols have an _ prefix. 104 #define SYMBOL(name) _ ## name 105 #else 106 #define MACRO_LITERAL(value) $value 107 #define FUNCTION_TYPE(name) .type name, @function 108 #define SIZE(start,end) .size start, .-end 109 #define SYMBOL(name) name 110 #endif 111 112 .macro PUSH _reg 113 pushq \_reg 114 .cfi_adjust_cfa_offset 8 115 .cfi_rel_offset \_reg, 0 116 .endm 117 118 .macro POP _reg 119 popq \_reg 120 .cfi_adjust_cfa_offset -8 121 .cfi_restore \_reg 122 .endm 123 124 /* 125 * Instead of holding a pointer to the shadow frame, we keep rFP at the base of the vregs. So, 126 * to access other shadow frame fields, we need to use a backwards offset. Define those here. 127 */ 128 #define OFF_FP(a) (a - SHADOWFRAME_VREGS_OFFSET) 129 #define OFF_FP_NUMBER_OF_VREGS OFF_FP(SHADOWFRAME_NUMBER_OF_VREGS_OFFSET) 130 #define OFF_FP_DEX_PC OFF_FP(SHADOWFRAME_DEX_PC_OFFSET) 131 #define OFF_FP_LINK OFF_FP(SHADOWFRAME_LINK_OFFSET) 132 #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) 133 #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) 134 #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) 135 #define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) 136 #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) 137 #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) 138 139 /* Frame size must be 16-byte aligned. 140 * Remember about 8 bytes for return address + 6 * 8 for spills. 141 */ 142 #define FRAME_SIZE 8 143 144 /* Frame diagram while executing ExecuteMterpImpl, high to low addresses */ 145 #define IN_ARG3 %rcx 146 #define IN_ARG2 %rdx 147 #define IN_ARG1 %rsi 148 #define IN_ARG0 %rdi 149 /* Spill offsets relative to %esp */ 150 #define SELF_SPILL (FRAME_SIZE - 8) 151 /* Out Args */ 152 #define OUT_ARG3 %rcx 153 #define OUT_ARG2 %rdx 154 #define OUT_ARG1 %rsi 155 #define OUT_ARG0 %rdi 156 #define OUT_32_ARG3 %ecx 157 #define OUT_32_ARG2 %edx 158 #define OUT_32_ARG1 %esi 159 #define OUT_32_ARG0 %edi 160 #define OUT_FP_ARG1 %xmm1 161 #define OUT_FP_ARG0 %xmm0 162 163 /* During bringup, we'll use the shadow frame model instead of rFP */ 164 /* single-purpose registers, given names for clarity */ 165 #define rSELF SELF_SPILL(%rsp) 166 #define rPC %r12 167 #define CFI_DEX 12 // DWARF register number of the register holding dex-pc (rPC). 168 #define CFI_TMP 5 // DWARF register number of the first argument register (rdi). 169 #define rFP %r13 170 #define rINST %ebx 171 #define rINSTq %rbx 172 #define rINSTw %bx 173 #define rINSTbh %bh 174 #define rINSTbl %bl 175 #define rIBASE %r14 176 #define rREFS %r15 177 #define rPROFILE %ebp 178 179 #define MTERP_LOGGING 0 180 181 /* 182 * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must 183 * be done *before* something throws. 184 * 185 * It's okay to do this more than once. 186 * 187 * NOTE: the fast interpreter keeps track of dex pc as a direct pointer to the mapped 188 * dex byte codes. However, the rest of the runtime expects dex pc to be an instruction 189 * offset into the code_items_[] array. For effiency, we will "export" the 190 * current dex pc as a direct pointer using the EXPORT_PC macro, and rely on GetDexPC 191 * to convert to a dex pc when needed. 192 */ 193 .macro EXPORT_PC 194 movq rPC, OFF_FP_DEX_PC_PTR(rFP) 195 .endm 196 197 /* 198 * Refresh handler table. 199 * IBase handles uses the caller save register so we must restore it after each call. 200 * Also it is used as a result of some 64-bit operations (like imul) and we should 201 * restore it in such cases also. 202 * 203 */ 204 .macro REFRESH_IBASE_REG self_reg 205 movq THREAD_CURRENT_IBASE_OFFSET(\self_reg), rIBASE 206 .endm 207 .macro REFRESH_IBASE 208 movq rSELF, rIBASE 209 REFRESH_IBASE_REG rIBASE 210 .endm 211 212 /* 213 * Refresh rINST. 214 * At enter to handler rINST does not contain the opcode number. 215 * However some utilities require the full value, so this macro 216 * restores the opcode number. 217 */ 218 .macro REFRESH_INST _opnum 219 movb rINSTbl, rINSTbh 220 movb $\_opnum, rINSTbl 221 .endm 222 223 /* 224 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC. 225 */ 226 .macro FETCH_INST 227 movzwq (rPC), rINSTq 228 .endm 229 230 /* 231 * Remove opcode from rINST, compute the address of handler and jump to it. 232 */ 233 .macro GOTO_NEXT 234 movzx rINSTbl,%eax 235 movzbl rINSTbh,rINST 236 shll MACRO_LITERAL(7), %eax 237 addq rIBASE, %rax 238 jmp *%rax 239 .endm 240 241 /* 242 * Advance rPC by instruction count. 243 */ 244 .macro ADVANCE_PC _count 245 leaq 2*\_count(rPC), rPC 246 .endm 247 248 /* 249 * Advance rPC by instruction count, fetch instruction and jump to handler. 250 */ 251 .macro ADVANCE_PC_FETCH_AND_GOTO_NEXT _count 252 ADVANCE_PC \_count 253 FETCH_INST 254 GOTO_NEXT 255 .endm 256 257 /* 258 * Get/set the 32-bit value from a Dalvik register. 259 */ 260 #define VREG_ADDRESS(_vreg) (rFP,_vreg,4) 261 #define VREG_REF_ADDRESS(_vreg) (rREFS,_vreg,4) 262 263 .macro GET_VREG _reg _vreg 264 movl (rFP,\_vreg,4), \_reg 265 .endm 266 267 /* Read wide value. */ 268 .macro GET_WIDE_VREG _reg _vreg 269 movq (rFP,\_vreg,4), \_reg 270 .endm 271 272 .macro SET_VREG _reg _vreg 273 movl \_reg, (rFP,\_vreg,4) 274 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 275 .endm 276 277 /* Write wide value. reg is clobbered. */ 278 .macro SET_WIDE_VREG _reg _vreg 279 movq \_reg, (rFP,\_vreg,4) 280 xorq \_reg, \_reg 281 movq \_reg, (rREFS,\_vreg,4) 282 .endm 283 284 .macro SET_VREG_OBJECT _reg _vreg 285 movl \_reg, (rFP,\_vreg,4) 286 movl \_reg, (rREFS,\_vreg,4) 287 .endm 288 289 .macro GET_VREG_HIGH _reg _vreg 290 movl 4(rFP,\_vreg,4), \_reg 291 .endm 292 293 .macro SET_VREG_HIGH _reg _vreg 294 movl \_reg, 4(rFP,\_vreg,4) 295 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 296 .endm 297 298 .macro CLEAR_REF _vreg 299 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 300 .endm 301 302 .macro CLEAR_WIDE_REF _vreg 303 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 304 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 305 .endm 306 307 /* File: x86_64/entry.S */ 308 /* 309 * Copyright (C) 2016 The Android Open Source Project 310 * 311 * Licensed under the Apache License, Version 2.0 (the "License"); 312 * you may not use this file except in compliance with the License. 313 * You may obtain a copy of the License at 314 * 315 * http://www.apache.org/licenses/LICENSE-2.0 316 * 317 * Unless required by applicable law or agreed to in writing, software 318 * distributed under the License is distributed on an "AS IS" BASIS, 319 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 320 * See the License for the specific language governing permissions and 321 * limitations under the License. 322 */ 323 /* 324 * Interpreter entry point. 325 */ 326 327 .text 328 .global SYMBOL(ExecuteMterpImpl) 329 FUNCTION_TYPE(ExecuteMterpImpl) 330 331 /* 332 * On entry: 333 * 0 Thread* self 334 * 1 insns_ 335 * 2 ShadowFrame 336 * 3 JValue* result_register 337 * 338 */ 339 340 SYMBOL(ExecuteMterpImpl): 341 .cfi_startproc 342 .cfi_def_cfa rsp, 8 343 344 /* Spill callee save regs */ 345 PUSH %rbx 346 PUSH %rbp 347 PUSH %r12 348 PUSH %r13 349 PUSH %r14 350 PUSH %r15 351 352 /* Allocate frame */ 353 subq $FRAME_SIZE, %rsp 354 .cfi_adjust_cfa_offset FRAME_SIZE 355 356 /* Remember the return register */ 357 movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2) 358 359 /* Remember the code_item */ 360 movq IN_ARG1, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(IN_ARG2) 361 362 /* set up "named" registers */ 363 movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax 364 leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP 365 leaq (rFP, %rax, 4), rREFS 366 movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax 367 leaq (IN_ARG1, %rax, 2), rPC 368 CFI_DEFINE_DEX_PC_WITH_OFFSET(CFI_TMP, CFI_DEX, 0) 369 EXPORT_PC 370 371 /* Starting ibase */ 372 movq IN_ARG0, rSELF 373 REFRESH_IBASE_REG IN_ARG0 374 375 /* Set up for backwards branches & osr profiling */ 376 movq IN_ARG0, OUT_ARG2 /* Set up OUT_ARG2 before clobbering IN_ARG0 */ 377 movq OFF_FP_METHOD(rFP), OUT_ARG0 378 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 379 call SYMBOL(MterpSetUpHotnessCountdown) 380 movswl %ax, rPROFILE 381 382 /* start executing the instruction at rPC */ 383 FETCH_INST 384 GOTO_NEXT 385 /* NOTE: no fallthrough */ 386 387 388 .global SYMBOL(artMterpAsmInstructionStart) 389 SYMBOL(artMterpAsmInstructionStart) = .L_op_nop 390 .text 391 392 /* ------------------------------ */ 393 .balign 128 394 .L_op_nop: /* 0x00 */ 395 /* File: x86_64/op_nop.S */ 396 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 397 398 /* ------------------------------ */ 399 .balign 128 400 .L_op_move: /* 0x01 */ 401 /* File: x86_64/op_move.S */ 402 /* for move, move-object, long-to-int */ 403 /* op vA, vB */ 404 movl rINST, %eax # eax <- BA 405 andb $0xf, %al # eax <- A 406 shrl $4, rINST # rINST <- B 407 GET_VREG %edx, rINSTq 408 .if 0 409 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 410 .else 411 SET_VREG %edx, %rax # fp[A] <- fp[B] 412 .endif 413 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 414 415 /* ------------------------------ */ 416 .balign 128 417 .L_op_move_from16: /* 0x02 */ 418 /* File: x86_64/op_move_from16.S */ 419 /* for: move/from16, move-object/from16 */ 420 /* op vAA, vBBBB */ 421 movzwq 2(rPC), %rax # eax <- BBBB 422 GET_VREG %edx, %rax # edx <- fp[BBBB] 423 .if 0 424 SET_VREG_OBJECT %edx, rINSTq # fp[A] <- fp[B] 425 .else 426 SET_VREG %edx, rINSTq # fp[A] <- fp[B] 427 .endif 428 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 429 430 /* ------------------------------ */ 431 .balign 128 432 .L_op_move_16: /* 0x03 */ 433 /* File: x86_64/op_move_16.S */ 434 /* for: move/16, move-object/16 */ 435 /* op vAAAA, vBBBB */ 436 movzwq 4(rPC), %rcx # ecx <- BBBB 437 movzwq 2(rPC), %rax # eax <- AAAA 438 GET_VREG %edx, %rcx 439 .if 0 440 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 441 .else 442 SET_VREG %edx, %rax # fp[A] <- fp[B] 443 .endif 444 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 445 446 /* ------------------------------ */ 447 .balign 128 448 .L_op_move_wide: /* 0x04 */ 449 /* File: x86_64/op_move_wide.S */ 450 /* move-wide vA, vB */ 451 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 452 movl rINST, %ecx # ecx <- BA 453 sarl $4, rINST # rINST <- B 454 andb $0xf, %cl # ecx <- A 455 GET_WIDE_VREG %rdx, rINSTq # rdx <- v[B] 456 SET_WIDE_VREG %rdx, %rcx # v[A] <- rdx 457 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 458 459 /* ------------------------------ */ 460 .balign 128 461 .L_op_move_wide_from16: /* 0x05 */ 462 /* File: x86_64/op_move_wide_from16.S */ 463 /* move-wide/from16 vAA, vBBBB */ 464 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 465 movzwl 2(rPC), %ecx # ecx <- BBBB 466 GET_WIDE_VREG %rdx, %rcx # rdx <- v[B] 467 SET_WIDE_VREG %rdx, rINSTq # v[A] <- rdx 468 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 469 470 /* ------------------------------ */ 471 .balign 128 472 .L_op_move_wide_16: /* 0x06 */ 473 /* File: x86_64/op_move_wide_16.S */ 474 /* move-wide/16 vAAAA, vBBBB */ 475 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 476 movzwq 4(rPC), %rcx # ecx<- BBBB 477 movzwq 2(rPC), %rax # eax<- AAAA 478 GET_WIDE_VREG %rdx, %rcx # rdx <- v[B] 479 SET_WIDE_VREG %rdx, %rax # v[A] <- rdx 480 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 481 482 /* ------------------------------ */ 483 .balign 128 484 .L_op_move_object: /* 0x07 */ 485 /* File: x86_64/op_move_object.S */ 486 /* File: x86_64/op_move.S */ 487 /* for move, move-object, long-to-int */ 488 /* op vA, vB */ 489 movl rINST, %eax # eax <- BA 490 andb $0xf, %al # eax <- A 491 shrl $4, rINST # rINST <- B 492 GET_VREG %edx, rINSTq 493 .if 1 494 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 495 .else 496 SET_VREG %edx, %rax # fp[A] <- fp[B] 497 .endif 498 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 499 500 501 /* ------------------------------ */ 502 .balign 128 503 .L_op_move_object_from16: /* 0x08 */ 504 /* File: x86_64/op_move_object_from16.S */ 505 /* File: x86_64/op_move_from16.S */ 506 /* for: move/from16, move-object/from16 */ 507 /* op vAA, vBBBB */ 508 movzwq 2(rPC), %rax # eax <- BBBB 509 GET_VREG %edx, %rax # edx <- fp[BBBB] 510 .if 1 511 SET_VREG_OBJECT %edx, rINSTq # fp[A] <- fp[B] 512 .else 513 SET_VREG %edx, rINSTq # fp[A] <- fp[B] 514 .endif 515 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 516 517 518 /* ------------------------------ */ 519 .balign 128 520 .L_op_move_object_16: /* 0x09 */ 521 /* File: x86_64/op_move_object_16.S */ 522 /* File: x86_64/op_move_16.S */ 523 /* for: move/16, move-object/16 */ 524 /* op vAAAA, vBBBB */ 525 movzwq 4(rPC), %rcx # ecx <- BBBB 526 movzwq 2(rPC), %rax # eax <- AAAA 527 GET_VREG %edx, %rcx 528 .if 1 529 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 530 .else 531 SET_VREG %edx, %rax # fp[A] <- fp[B] 532 .endif 533 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 534 535 536 /* ------------------------------ */ 537 .balign 128 538 .L_op_move_result: /* 0x0a */ 539 /* File: x86_64/op_move_result.S */ 540 /* for: move-result, move-result-object */ 541 /* op vAA */ 542 movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. 543 movl (%rax), %eax # r0 <- result.i. 544 .if 0 545 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- fp[B] 546 .else 547 SET_VREG %eax, rINSTq # fp[A] <- fp[B] 548 .endif 549 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 550 551 /* ------------------------------ */ 552 .balign 128 553 .L_op_move_result_wide: /* 0x0b */ 554 /* File: x86_64/op_move_result_wide.S */ 555 /* move-result-wide vAA */ 556 movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. 557 movq (%rax), %rdx # Get wide 558 SET_WIDE_VREG %rdx, rINSTq # v[AA] <- rdx 559 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 560 561 /* ------------------------------ */ 562 .balign 128 563 .L_op_move_result_object: /* 0x0c */ 564 /* File: x86_64/op_move_result_object.S */ 565 /* File: x86_64/op_move_result.S */ 566 /* for: move-result, move-result-object */ 567 /* op vAA */ 568 movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. 569 movl (%rax), %eax # r0 <- result.i. 570 .if 1 571 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- fp[B] 572 .else 573 SET_VREG %eax, rINSTq # fp[A] <- fp[B] 574 .endif 575 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 576 577 578 /* ------------------------------ */ 579 .balign 128 580 .L_op_move_exception: /* 0x0d */ 581 /* File: x86_64/op_move_exception.S */ 582 /* move-exception vAA */ 583 movq rSELF, %rcx 584 movl THREAD_EXCEPTION_OFFSET(%rcx), %eax 585 SET_VREG_OBJECT %eax, rINSTq # fp[AA] <- exception object 586 movl $0, THREAD_EXCEPTION_OFFSET(%rcx) 587 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 588 589 /* ------------------------------ */ 590 .balign 128 591 .L_op_return_void: /* 0x0e */ 592 /* File: x86_64/op_return_void.S */ 593 .extern MterpThreadFenceForConstructor 594 call SYMBOL(MterpThreadFenceForConstructor) 595 movq rSELF, OUT_ARG0 596 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 597 jz 1f 598 call SYMBOL(MterpSuspendCheck) 599 1: 600 xorq %rax, %rax 601 jmp MterpReturn 602 603 /* ------------------------------ */ 604 .balign 128 605 .L_op_return: /* 0x0f */ 606 /* File: x86_64/op_return.S */ 607 /* 608 * Return a 32-bit value. 609 * 610 * for: return, return-object 611 */ 612 /* op vAA */ 613 .extern MterpThreadFenceForConstructor 614 call SYMBOL(MterpThreadFenceForConstructor) 615 movq rSELF, OUT_ARG0 616 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 617 jz 1f 618 call SYMBOL(MterpSuspendCheck) 619 1: 620 GET_VREG %eax, rINSTq # eax <- vAA 621 jmp MterpReturn 622 623 /* ------------------------------ */ 624 .balign 128 625 .L_op_return_wide: /* 0x10 */ 626 /* File: x86_64/op_return_wide.S */ 627 /* 628 * Return a 64-bit value. 629 */ 630 /* return-wide vAA */ 631 .extern MterpThreadFenceForConstructor 632 call SYMBOL(MterpThreadFenceForConstructor) 633 movq rSELF, OUT_ARG0 634 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 635 jz 1f 636 call SYMBOL(MterpSuspendCheck) 637 1: 638 GET_WIDE_VREG %rax, rINSTq # eax <- v[AA] 639 jmp MterpReturn 640 641 /* ------------------------------ */ 642 .balign 128 643 .L_op_return_object: /* 0x11 */ 644 /* File: x86_64/op_return_object.S */ 645 /* File: x86_64/op_return.S */ 646 /* 647 * Return a 32-bit value. 648 * 649 * for: return, return-object 650 */ 651 /* op vAA */ 652 .extern MterpThreadFenceForConstructor 653 call SYMBOL(MterpThreadFenceForConstructor) 654 movq rSELF, OUT_ARG0 655 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 656 jz 1f 657 call SYMBOL(MterpSuspendCheck) 658 1: 659 GET_VREG %eax, rINSTq # eax <- vAA 660 jmp MterpReturn 661 662 663 /* ------------------------------ */ 664 .balign 128 665 .L_op_const_4: /* 0x12 */ 666 /* File: x86_64/op_const_4.S */ 667 /* const/4 vA, #+B */ 668 movsbl rINSTbl, %eax # eax <-ssssssBx 669 movl $0xf, rINST 670 andl %eax, rINST # rINST <- A 671 sarl $4, %eax 672 SET_VREG %eax, rINSTq 673 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 674 675 /* ------------------------------ */ 676 .balign 128 677 .L_op_const_16: /* 0x13 */ 678 /* File: x86_64/op_const_16.S */ 679 /* const/16 vAA, #+BBBB */ 680 movswl 2(rPC), %ecx # ecx <- ssssBBBB 681 SET_VREG %ecx, rINSTq # vAA <- ssssBBBB 682 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 683 684 /* ------------------------------ */ 685 .balign 128 686 .L_op_const: /* 0x14 */ 687 /* File: x86_64/op_const.S */ 688 /* const vAA, #+BBBBbbbb */ 689 movl 2(rPC), %eax # grab all 32 bits at once 690 SET_VREG %eax, rINSTq # vAA<- eax 691 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 692 693 /* ------------------------------ */ 694 .balign 128 695 .L_op_const_high16: /* 0x15 */ 696 /* File: x86_64/op_const_high16.S */ 697 /* const/high16 vAA, #+BBBB0000 */ 698 movzwl 2(rPC), %eax # eax <- 0000BBBB 699 sall $16, %eax # eax <- BBBB0000 700 SET_VREG %eax, rINSTq # vAA <- eax 701 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 702 703 /* ------------------------------ */ 704 .balign 128 705 .L_op_const_wide_16: /* 0x16 */ 706 /* File: x86_64/op_const_wide_16.S */ 707 /* const-wide/16 vAA, #+BBBB */ 708 movswq 2(rPC), %rax # rax <- ssssBBBB 709 SET_WIDE_VREG %rax, rINSTq # store 710 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 711 712 /* ------------------------------ */ 713 .balign 128 714 .L_op_const_wide_32: /* 0x17 */ 715 /* File: x86_64/op_const_wide_32.S */ 716 /* const-wide/32 vAA, #+BBBBbbbb */ 717 movslq 2(rPC), %rax # eax <- ssssssssBBBBbbbb 718 SET_WIDE_VREG %rax, rINSTq # store 719 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 720 721 /* ------------------------------ */ 722 .balign 128 723 .L_op_const_wide: /* 0x18 */ 724 /* File: x86_64/op_const_wide.S */ 725 /* const-wide vAA, #+HHHHhhhhBBBBbbbb */ 726 movq 2(rPC), %rax # rax <- HHHHhhhhBBBBbbbb 727 SET_WIDE_VREG %rax, rINSTq 728 ADVANCE_PC_FETCH_AND_GOTO_NEXT 5 729 730 /* ------------------------------ */ 731 .balign 128 732 .L_op_const_wide_high16: /* 0x19 */ 733 /* File: x86_64/op_const_wide_high16.S */ 734 /* const-wide/high16 vAA, #+BBBB000000000000 */ 735 movzwq 2(rPC), %rax # eax <- 0000BBBB 736 salq $48, %rax # eax <- BBBB0000 737 SET_WIDE_VREG %rax, rINSTq # v[AA+0] <- eax 738 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 739 740 /* ------------------------------ */ 741 .balign 128 742 .L_op_const_string: /* 0x1a */ 743 /* File: x86_64/op_const_string.S */ 744 /* File: x86_64/const.S */ 745 /* const/class vAA, type@BBBB */ 746 /* const/method-handle vAA, method_handle@BBBB */ 747 /* const/method-type vAA, proto@BBBB */ 748 /* const/string vAA, string@@BBBB */ 749 .extern MterpConstString 750 EXPORT_PC 751 movzwq 2(rPC), OUT_ARG0 # eax <- OUT_ARG0 752 movq rINSTq, OUT_ARG1 753 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 754 movq rSELF, OUT_ARG3 755 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 756 testb %al, %al 757 jnz MterpPossibleException 758 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 759 760 761 /* ------------------------------ */ 762 .balign 128 763 .L_op_const_string_jumbo: /* 0x1b */ 764 /* File: x86_64/op_const_string_jumbo.S */ 765 /* const/string vAA, String@BBBBBBBB */ 766 EXPORT_PC 767 movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB 768 movq rINSTq, OUT_ARG1 769 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 770 movq rSELF, OUT_ARG3 771 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 772 testb %al, %al 773 jnz MterpPossibleException 774 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 775 776 /* ------------------------------ */ 777 .balign 128 778 .L_op_const_class: /* 0x1c */ 779 /* File: x86_64/op_const_class.S */ 780 /* File: x86_64/const.S */ 781 /* const/class vAA, type@BBBB */ 782 /* const/method-handle vAA, method_handle@BBBB */ 783 /* const/method-type vAA, proto@BBBB */ 784 /* const/string vAA, string@@BBBB */ 785 .extern MterpConstClass 786 EXPORT_PC 787 movzwq 2(rPC), OUT_ARG0 # eax <- OUT_ARG0 788 movq rINSTq, OUT_ARG1 789 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 790 movq rSELF, OUT_ARG3 791 call SYMBOL(MterpConstClass) # (index, tgt_reg, shadow_frame, self) 792 testb %al, %al 793 jnz MterpPossibleException 794 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 795 796 797 /* ------------------------------ */ 798 .balign 128 799 .L_op_monitor_enter: /* 0x1d */ 800 /* File: x86_64/op_monitor_enter.S */ 801 /* 802 * Synchronize on an object. 803 */ 804 /* monitor-enter vAA */ 805 EXPORT_PC 806 GET_VREG OUT_32_ARG0, rINSTq 807 movq rSELF, OUT_ARG1 808 call SYMBOL(artLockObjectFromCode) # (object, self) 809 testq %rax, %rax 810 jnz MterpException 811 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 812 813 /* ------------------------------ */ 814 .balign 128 815 .L_op_monitor_exit: /* 0x1e */ 816 /* File: x86_64/op_monitor_exit.S */ 817 /* 818 * Unlock an object. 819 * 820 * Exceptions that occur when unlocking a monitor need to appear as 821 * if they happened at the following instruction. See the Dalvik 822 * instruction spec. 823 */ 824 /* monitor-exit vAA */ 825 EXPORT_PC 826 GET_VREG OUT_32_ARG0, rINSTq 827 movq rSELF, OUT_ARG1 828 call SYMBOL(artUnlockObjectFromCode) # (object, self) 829 testq %rax, %rax 830 jnz MterpException 831 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 832 833 /* ------------------------------ */ 834 .balign 128 835 .L_op_check_cast: /* 0x1f */ 836 /* File: x86_64/op_check_cast.S */ 837 /* 838 * Check to see if a cast from one class to another is allowed. 839 */ 840 /* check-cast vAA, class@BBBB */ 841 EXPORT_PC 842 movzwq 2(rPC), OUT_ARG0 # OUT_ARG0 <- BBBB 843 leaq VREG_ADDRESS(rINSTq), OUT_ARG1 844 movq OFF_FP_METHOD(rFP), OUT_ARG2 845 movq rSELF, OUT_ARG3 846 call SYMBOL(MterpCheckCast) # (index, &obj, method, self) 847 testb %al, %al 848 jnz MterpPossibleException 849 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 850 851 /* ------------------------------ */ 852 .balign 128 853 .L_op_instance_of: /* 0x20 */ 854 /* File: x86_64/op_instance_of.S */ 855 /* 856 * Check to see if an object reference is an instance of a class. 857 * 858 * Most common situation is a non-null object, being compared against 859 * an already-resolved class. 860 */ 861 /* instance-of vA, vB, class@CCCC */ 862 EXPORT_PC 863 movzwl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- CCCC 864 movl rINST, %eax # eax <- BA 865 sarl $4, %eax # eax <- B 866 leaq VREG_ADDRESS(%rax), OUT_ARG1 # Get object address 867 movq OFF_FP_METHOD(rFP), OUT_ARG2 868 movq rSELF, OUT_ARG3 869 call SYMBOL(MterpInstanceOf) # (index, &obj, method, self) 870 movsbl %al, %eax 871 movq rSELF, %rcx 872 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 873 jnz MterpException 874 andb $0xf, rINSTbl # rINSTbl <- A 875 SET_VREG %eax, rINSTq 876 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 877 878 /* ------------------------------ */ 879 .balign 128 880 .L_op_array_length: /* 0x21 */ 881 /* File: x86_64/op_array_length.S */ 882 /* 883 * Return the length of an array. 884 */ 885 movl rINST, %eax # eax <- BA 886 sarl $4, rINST # rINST <- B 887 GET_VREG %ecx, rINSTq # ecx <- vB (object ref) 888 testl %ecx, %ecx # is null? 889 je common_errNullObject 890 andb $0xf, %al # eax <- A 891 movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST 892 SET_VREG rINST, %rax 893 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 894 895 /* ------------------------------ */ 896 .balign 128 897 .L_op_new_instance: /* 0x22 */ 898 /* File: x86_64/op_new_instance.S */ 899 /* 900 * Create a new instance of a class. 901 */ 902 /* new-instance vAA, class@BBBB */ 903 EXPORT_PC 904 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 905 movq rSELF, OUT_ARG1 906 REFRESH_INST 34 907 movq rINSTq, OUT_ARG2 908 call SYMBOL(MterpNewInstance) 909 testb %al, %al # 0 means an exception is thrown 910 jz MterpPossibleException 911 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 912 913 /* ------------------------------ */ 914 .balign 128 915 .L_op_new_array: /* 0x23 */ 916 /* File: x86_64/op_new_array.S */ 917 /* 918 * Allocate an array of objects, specified with the array class 919 * and a count. 920 * 921 * The verifier guarantees that this is an array class, so we don't 922 * check for it here. 923 */ 924 /* new-array vA, vB, class@CCCC */ 925 EXPORT_PC 926 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 927 movq rPC, OUT_ARG1 928 REFRESH_INST 35 929 movq rINSTq, OUT_ARG2 930 movq rSELF, OUT_ARG3 931 call SYMBOL(MterpNewArray) 932 testb %al, %al # 0 means an exception is thrown 933 jz MterpPossibleException 934 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 935 936 /* ------------------------------ */ 937 .balign 128 938 .L_op_filled_new_array: /* 0x24 */ 939 /* File: x86_64/op_filled_new_array.S */ 940 /* 941 * Create a new array with elements filled from registers. 942 * 943 * for: filled-new-array, filled-new-array/range 944 */ 945 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 946 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 947 .extern MterpFilledNewArray 948 EXPORT_PC 949 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 950 movq rPC, OUT_ARG1 951 movq rSELF, OUT_ARG2 952 call SYMBOL(MterpFilledNewArray) 953 testb %al, %al # 0 means an exception is thrown 954 jz MterpPossibleException 955 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 956 957 /* ------------------------------ */ 958 .balign 128 959 .L_op_filled_new_array_range: /* 0x25 */ 960 /* File: x86_64/op_filled_new_array_range.S */ 961 /* File: x86_64/op_filled_new_array.S */ 962 /* 963 * Create a new array with elements filled from registers. 964 * 965 * for: filled-new-array, filled-new-array/range 966 */ 967 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 968 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 969 .extern MterpFilledNewArrayRange 970 EXPORT_PC 971 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 972 movq rPC, OUT_ARG1 973 movq rSELF, OUT_ARG2 974 call SYMBOL(MterpFilledNewArrayRange) 975 testb %al, %al # 0 means an exception is thrown 976 jz MterpPossibleException 977 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 978 979 980 /* ------------------------------ */ 981 .balign 128 982 .L_op_fill_array_data: /* 0x26 */ 983 /* File: x86_64/op_fill_array_data.S */ 984 /* fill-array-data vAA, +BBBBBBBB */ 985 EXPORT_PC 986 movslq 2(rPC), %rcx # rcx <- ssssssssBBBBbbbb 987 leaq (rPC,%rcx,2), OUT_ARG1 # OUT_ARG1 <- PC + ssssssssBBBBbbbb*2 988 GET_VREG OUT_32_ARG0, rINSTq # OUT_ARG0 <- vAA (array object) 989 call SYMBOL(MterpFillArrayData) # (obj, payload) 990 testb %al, %al # 0 means an exception is thrown 991 jz MterpPossibleException 992 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 993 994 /* ------------------------------ */ 995 .balign 128 996 .L_op_throw: /* 0x27 */ 997 /* File: x86_64/op_throw.S */ 998 /* 999 * Throw an exception object in the current thread. 1000 */ 1001 /* throw vAA */ 1002 EXPORT_PC 1003 GET_VREG %eax, rINSTq # eax<- vAA (exception object) 1004 testb %al, %al 1005 jz common_errNullObject 1006 movq rSELF, %rcx 1007 movq %rax, THREAD_EXCEPTION_OFFSET(%rcx) 1008 jmp MterpException 1009 1010 /* ------------------------------ */ 1011 .balign 128 1012 .L_op_goto: /* 0x28 */ 1013 /* File: x86_64/op_goto.S */ 1014 /* 1015 * Unconditional branch, 8-bit offset. 1016 * 1017 * The branch distance is a signed code-unit offset, which we need to 1018 * double to get a byte offset. 1019 */ 1020 /* goto +AA */ 1021 movsbq rINSTbl, rINSTq # rINSTq <- ssssssAA 1022 testq rINSTq, rINSTq 1023 jmp MterpCommonTakenBranch 1024 1025 /* ------------------------------ */ 1026 .balign 128 1027 .L_op_goto_16: /* 0x29 */ 1028 /* File: x86_64/op_goto_16.S */ 1029 /* 1030 * Unconditional branch, 16-bit offset. 1031 * 1032 * The branch distance is a signed code-unit offset, which we need to 1033 * double to get a byte offset. 1034 */ 1035 /* goto/16 +AAAA */ 1036 movswq 2(rPC), rINSTq # rINSTq <- ssssAAAA 1037 testq rINSTq, rINSTq 1038 jmp MterpCommonTakenBranch 1039 1040 /* ------------------------------ */ 1041 .balign 128 1042 .L_op_goto_32: /* 0x2a */ 1043 /* File: x86_64/op_goto_32.S */ 1044 /* 1045 * Unconditional branch, 32-bit offset. 1046 * 1047 * The branch distance is a signed code-unit offset, which we need to 1048 * double to get a byte offset. 1049 * 1050 * Because we need the SF bit set, we'll use an adds 1051 * to convert from Dalvik offset to byte offset. 1052 */ 1053 /* goto/32 +AAAAAAAA */ 1054 movslq 2(rPC), rINSTq # rINSTq <- AAAAAAAA 1055 testq rINSTq, rINSTq 1056 jmp MterpCommonTakenBranch 1057 1058 /* ------------------------------ */ 1059 .balign 128 1060 .L_op_packed_switch: /* 0x2b */ 1061 /* File: x86_64/op_packed_switch.S */ 1062 /* 1063 * Handle a packed-switch or sparse-switch instruction. In both cases 1064 * we decode it and hand it off to a helper function. 1065 * 1066 * We don't really expect backward branches in a switch statement, but 1067 * they're perfectly legal, so we check for them here. 1068 * 1069 * for: packed-switch, sparse-switch 1070 */ 1071 /* op vAA, +BBBB */ 1072 movslq 2(rPC), OUT_ARG0 # rcx <- ssssssssBBBBbbbb 1073 leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + ssssssssBBBBbbbb*2 1074 GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA 1075 call SYMBOL(MterpDoPackedSwitch) 1076 testl %eax, %eax 1077 movslq %eax, rINSTq 1078 jmp MterpCommonTakenBranch 1079 1080 /* ------------------------------ */ 1081 .balign 128 1082 .L_op_sparse_switch: /* 0x2c */ 1083 /* File: x86_64/op_sparse_switch.S */ 1084 /* File: x86_64/op_packed_switch.S */ 1085 /* 1086 * Handle a packed-switch or sparse-switch instruction. In both cases 1087 * we decode it and hand it off to a helper function. 1088 * 1089 * We don't really expect backward branches in a switch statement, but 1090 * they're perfectly legal, so we check for them here. 1091 * 1092 * for: packed-switch, sparse-switch 1093 */ 1094 /* op vAA, +BBBB */ 1095 movslq 2(rPC), OUT_ARG0 # rcx <- ssssssssBBBBbbbb 1096 leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + ssssssssBBBBbbbb*2 1097 GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA 1098 call SYMBOL(MterpDoSparseSwitch) 1099 testl %eax, %eax 1100 movslq %eax, rINSTq 1101 jmp MterpCommonTakenBranch 1102 1103 1104 /* ------------------------------ */ 1105 .balign 128 1106 .L_op_cmpl_float: /* 0x2d */ 1107 /* File: x86_64/op_cmpl_float.S */ 1108 /* File: x86_64/fpcmp.S */ 1109 /* 1110 * Compare two floating-point values. Puts 0, 1, or -1 into the 1111 * destination register based on the results of the comparison. 1112 * 1113 * int compare(x, y) { 1114 * if (x == y) { 1115 * return 0; 1116 * } else if (x < y) { 1117 * return -1; 1118 * } else if (x > y) { 1119 * return 1; 1120 * } else { 1121 * return nanval ? 1 : -1; 1122 * } 1123 * } 1124 */ 1125 /* op vAA, vBB, vCC */ 1126 movzbq 3(rPC), %rcx # ecx<- CC 1127 movzbq 2(rPC), %rax # eax<- BB 1128 movss VREG_ADDRESS(%rax), %xmm0 1129 xor %eax, %eax 1130 ucomiss VREG_ADDRESS(%rcx), %xmm0 1131 jp .Lop_cmpl_float_nan_is_neg 1132 je .Lop_cmpl_float_finish 1133 jb .Lop_cmpl_float_less 1134 .Lop_cmpl_float_nan_is_pos: 1135 addb $1, %al 1136 jmp .Lop_cmpl_float_finish 1137 .Lop_cmpl_float_nan_is_neg: 1138 .Lop_cmpl_float_less: 1139 movl $-1, %eax 1140 .Lop_cmpl_float_finish: 1141 SET_VREG %eax, rINSTq 1142 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1143 1144 1145 /* ------------------------------ */ 1146 .balign 128 1147 .L_op_cmpg_float: /* 0x2e */ 1148 /* File: x86_64/op_cmpg_float.S */ 1149 /* File: x86_64/fpcmp.S */ 1150 /* 1151 * Compare two floating-point values. Puts 0, 1, or -1 into the 1152 * destination register based on the results of the comparison. 1153 * 1154 * int compare(x, y) { 1155 * if (x == y) { 1156 * return 0; 1157 * } else if (x < y) { 1158 * return -1; 1159 * } else if (x > y) { 1160 * return 1; 1161 * } else { 1162 * return nanval ? 1 : -1; 1163 * } 1164 * } 1165 */ 1166 /* op vAA, vBB, vCC */ 1167 movzbq 3(rPC), %rcx # ecx<- CC 1168 movzbq 2(rPC), %rax # eax<- BB 1169 movss VREG_ADDRESS(%rax), %xmm0 1170 xor %eax, %eax 1171 ucomiss VREG_ADDRESS(%rcx), %xmm0 1172 jp .Lop_cmpg_float_nan_is_pos 1173 je .Lop_cmpg_float_finish 1174 jb .Lop_cmpg_float_less 1175 .Lop_cmpg_float_nan_is_pos: 1176 addb $1, %al 1177 jmp .Lop_cmpg_float_finish 1178 .Lop_cmpg_float_nan_is_neg: 1179 .Lop_cmpg_float_less: 1180 movl $-1, %eax 1181 .Lop_cmpg_float_finish: 1182 SET_VREG %eax, rINSTq 1183 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1184 1185 1186 /* ------------------------------ */ 1187 .balign 128 1188 .L_op_cmpl_double: /* 0x2f */ 1189 /* File: x86_64/op_cmpl_double.S */ 1190 /* File: x86_64/fpcmp.S */ 1191 /* 1192 * Compare two floating-point values. Puts 0, 1, or -1 into the 1193 * destination register based on the results of the comparison. 1194 * 1195 * int compare(x, y) { 1196 * if (x == y) { 1197 * return 0; 1198 * } else if (x < y) { 1199 * return -1; 1200 * } else if (x > y) { 1201 * return 1; 1202 * } else { 1203 * return nanval ? 1 : -1; 1204 * } 1205 * } 1206 */ 1207 /* op vAA, vBB, vCC */ 1208 movzbq 3(rPC), %rcx # ecx<- CC 1209 movzbq 2(rPC), %rax # eax<- BB 1210 movsd VREG_ADDRESS(%rax), %xmm0 1211 xor %eax, %eax 1212 ucomisd VREG_ADDRESS(%rcx), %xmm0 1213 jp .Lop_cmpl_double_nan_is_neg 1214 je .Lop_cmpl_double_finish 1215 jb .Lop_cmpl_double_less 1216 .Lop_cmpl_double_nan_is_pos: 1217 addb $1, %al 1218 jmp .Lop_cmpl_double_finish 1219 .Lop_cmpl_double_nan_is_neg: 1220 .Lop_cmpl_double_less: 1221 movl $-1, %eax 1222 .Lop_cmpl_double_finish: 1223 SET_VREG %eax, rINSTq 1224 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1225 1226 1227 /* ------------------------------ */ 1228 .balign 128 1229 .L_op_cmpg_double: /* 0x30 */ 1230 /* File: x86_64/op_cmpg_double.S */ 1231 /* File: x86_64/fpcmp.S */ 1232 /* 1233 * Compare two floating-point values. Puts 0, 1, or -1 into the 1234 * destination register based on the results of the comparison. 1235 * 1236 * int compare(x, y) { 1237 * if (x == y) { 1238 * return 0; 1239 * } else if (x < y) { 1240 * return -1; 1241 * } else if (x > y) { 1242 * return 1; 1243 * } else { 1244 * return nanval ? 1 : -1; 1245 * } 1246 * } 1247 */ 1248 /* op vAA, vBB, vCC */ 1249 movzbq 3(rPC), %rcx # ecx<- CC 1250 movzbq 2(rPC), %rax # eax<- BB 1251 movsd VREG_ADDRESS(%rax), %xmm0 1252 xor %eax, %eax 1253 ucomisd VREG_ADDRESS(%rcx), %xmm0 1254 jp .Lop_cmpg_double_nan_is_pos 1255 je .Lop_cmpg_double_finish 1256 jb .Lop_cmpg_double_less 1257 .Lop_cmpg_double_nan_is_pos: 1258 addb $1, %al 1259 jmp .Lop_cmpg_double_finish 1260 .Lop_cmpg_double_nan_is_neg: 1261 .Lop_cmpg_double_less: 1262 movl $-1, %eax 1263 .Lop_cmpg_double_finish: 1264 SET_VREG %eax, rINSTq 1265 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1266 1267 1268 /* ------------------------------ */ 1269 .balign 128 1270 .L_op_cmp_long: /* 0x31 */ 1271 /* File: x86_64/op_cmp_long.S */ 1272 /* 1273 * Compare two 64-bit values. Puts 0, 1, or -1 into the destination 1274 * register based on the results of the comparison. 1275 */ 1276 /* cmp-long vAA, vBB, vCC */ 1277 movzbq 2(rPC), %rdx # edx <- BB 1278 movzbq 3(rPC), %rcx # ecx <- CC 1279 GET_WIDE_VREG %rdx, %rdx # rdx <- v[BB] 1280 xorl %eax, %eax 1281 xorl %edi, %edi 1282 addb $1, %al 1283 movl $-1, %esi 1284 cmpq VREG_ADDRESS(%rcx), %rdx 1285 cmovl %esi, %edi 1286 cmovg %eax, %edi 1287 SET_VREG %edi, rINSTq 1288 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1289 1290 /* ------------------------------ */ 1291 .balign 128 1292 .L_op_if_eq: /* 0x32 */ 1293 /* File: x86_64/op_if_eq.S */ 1294 /* File: x86_64/bincmp.S */ 1295 /* 1296 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1297 * fragment that specifies the *reverse* comparison to perform, e.g. 1298 * for "if-le" you would use "gt". 1299 * 1300 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1301 */ 1302 /* if-cmp vA, vB, +CCCC */ 1303 movl rINST, %ecx # rcx <- A+ 1304 sarl $4, rINST # rINST <- B 1305 andb $0xf, %cl # rcx <- A 1306 GET_VREG %eax, %rcx # eax <- vA 1307 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1308 jne 1f 1309 movswq 2(rPC), rINSTq # Get signed branch offset 1310 testq rINSTq, rINSTq 1311 jmp MterpCommonTakenBranch 1312 1: 1313 cmpl $JIT_CHECK_OSR, rPROFILE 1314 je .L_check_not_taken_osr 1315 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1316 1317 1318 /* ------------------------------ */ 1319 .balign 128 1320 .L_op_if_ne: /* 0x33 */ 1321 /* File: x86_64/op_if_ne.S */ 1322 /* File: x86_64/bincmp.S */ 1323 /* 1324 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1325 * fragment that specifies the *reverse* comparison to perform, e.g. 1326 * for "if-le" you would use "gt". 1327 * 1328 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1329 */ 1330 /* if-cmp vA, vB, +CCCC */ 1331 movl rINST, %ecx # rcx <- A+ 1332 sarl $4, rINST # rINST <- B 1333 andb $0xf, %cl # rcx <- A 1334 GET_VREG %eax, %rcx # eax <- vA 1335 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1336 je 1f 1337 movswq 2(rPC), rINSTq # Get signed branch offset 1338 testq rINSTq, rINSTq 1339 jmp MterpCommonTakenBranch 1340 1: 1341 cmpl $JIT_CHECK_OSR, rPROFILE 1342 je .L_check_not_taken_osr 1343 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1344 1345 1346 /* ------------------------------ */ 1347 .balign 128 1348 .L_op_if_lt: /* 0x34 */ 1349 /* File: x86_64/op_if_lt.S */ 1350 /* File: x86_64/bincmp.S */ 1351 /* 1352 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1353 * fragment that specifies the *reverse* comparison to perform, e.g. 1354 * for "if-le" you would use "gt". 1355 * 1356 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1357 */ 1358 /* if-cmp vA, vB, +CCCC */ 1359 movl rINST, %ecx # rcx <- A+ 1360 sarl $4, rINST # rINST <- B 1361 andb $0xf, %cl # rcx <- A 1362 GET_VREG %eax, %rcx # eax <- vA 1363 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1364 jge 1f 1365 movswq 2(rPC), rINSTq # Get signed branch offset 1366 testq rINSTq, rINSTq 1367 jmp MterpCommonTakenBranch 1368 1: 1369 cmpl $JIT_CHECK_OSR, rPROFILE 1370 je .L_check_not_taken_osr 1371 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1372 1373 1374 /* ------------------------------ */ 1375 .balign 128 1376 .L_op_if_ge: /* 0x35 */ 1377 /* File: x86_64/op_if_ge.S */ 1378 /* File: x86_64/bincmp.S */ 1379 /* 1380 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1381 * fragment that specifies the *reverse* comparison to perform, e.g. 1382 * for "if-le" you would use "gt". 1383 * 1384 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1385 */ 1386 /* if-cmp vA, vB, +CCCC */ 1387 movl rINST, %ecx # rcx <- A+ 1388 sarl $4, rINST # rINST <- B 1389 andb $0xf, %cl # rcx <- A 1390 GET_VREG %eax, %rcx # eax <- vA 1391 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1392 jl 1f 1393 movswq 2(rPC), rINSTq # Get signed branch offset 1394 testq rINSTq, rINSTq 1395 jmp MterpCommonTakenBranch 1396 1: 1397 cmpl $JIT_CHECK_OSR, rPROFILE 1398 je .L_check_not_taken_osr 1399 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1400 1401 1402 /* ------------------------------ */ 1403 .balign 128 1404 .L_op_if_gt: /* 0x36 */ 1405 /* File: x86_64/op_if_gt.S */ 1406 /* File: x86_64/bincmp.S */ 1407 /* 1408 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1409 * fragment that specifies the *reverse* comparison to perform, e.g. 1410 * for "if-le" you would use "gt". 1411 * 1412 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1413 */ 1414 /* if-cmp vA, vB, +CCCC */ 1415 movl rINST, %ecx # rcx <- A+ 1416 sarl $4, rINST # rINST <- B 1417 andb $0xf, %cl # rcx <- A 1418 GET_VREG %eax, %rcx # eax <- vA 1419 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1420 jle 1f 1421 movswq 2(rPC), rINSTq # Get signed branch offset 1422 testq rINSTq, rINSTq 1423 jmp MterpCommonTakenBranch 1424 1: 1425 cmpl $JIT_CHECK_OSR, rPROFILE 1426 je .L_check_not_taken_osr 1427 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1428 1429 1430 /* ------------------------------ */ 1431 .balign 128 1432 .L_op_if_le: /* 0x37 */ 1433 /* File: x86_64/op_if_le.S */ 1434 /* File: x86_64/bincmp.S */ 1435 /* 1436 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1437 * fragment that specifies the *reverse* comparison to perform, e.g. 1438 * for "if-le" you would use "gt". 1439 * 1440 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1441 */ 1442 /* if-cmp vA, vB, +CCCC */ 1443 movl rINST, %ecx # rcx <- A+ 1444 sarl $4, rINST # rINST <- B 1445 andb $0xf, %cl # rcx <- A 1446 GET_VREG %eax, %rcx # eax <- vA 1447 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1448 jg 1f 1449 movswq 2(rPC), rINSTq # Get signed branch offset 1450 testq rINSTq, rINSTq 1451 jmp MterpCommonTakenBranch 1452 1: 1453 cmpl $JIT_CHECK_OSR, rPROFILE 1454 je .L_check_not_taken_osr 1455 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1456 1457 1458 /* ------------------------------ */ 1459 .balign 128 1460 .L_op_if_eqz: /* 0x38 */ 1461 /* File: x86_64/op_if_eqz.S */ 1462 /* File: x86_64/zcmp.S */ 1463 /* 1464 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1465 * fragment that specifies the *reverse* comparison to perform, e.g. 1466 * for "if-le" you would use "gt". 1467 * 1468 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1469 */ 1470 /* if-cmp vAA, +BBBB */ 1471 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1472 jne 1f 1473 movswq 2(rPC), rINSTq # fetch signed displacement 1474 testq rINSTq, rINSTq 1475 jmp MterpCommonTakenBranch 1476 1: 1477 cmpl $JIT_CHECK_OSR, rPROFILE 1478 je .L_check_not_taken_osr 1479 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1480 1481 1482 /* ------------------------------ */ 1483 .balign 128 1484 .L_op_if_nez: /* 0x39 */ 1485 /* File: x86_64/op_if_nez.S */ 1486 /* File: x86_64/zcmp.S */ 1487 /* 1488 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1489 * fragment that specifies the *reverse* comparison to perform, e.g. 1490 * for "if-le" you would use "gt". 1491 * 1492 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1493 */ 1494 /* if-cmp vAA, +BBBB */ 1495 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1496 je 1f 1497 movswq 2(rPC), rINSTq # fetch signed displacement 1498 testq rINSTq, rINSTq 1499 jmp MterpCommonTakenBranch 1500 1: 1501 cmpl $JIT_CHECK_OSR, rPROFILE 1502 je .L_check_not_taken_osr 1503 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1504 1505 1506 /* ------------------------------ */ 1507 .balign 128 1508 .L_op_if_ltz: /* 0x3a */ 1509 /* File: x86_64/op_if_ltz.S */ 1510 /* File: x86_64/zcmp.S */ 1511 /* 1512 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1513 * fragment that specifies the *reverse* comparison to perform, e.g. 1514 * for "if-le" you would use "gt". 1515 * 1516 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1517 */ 1518 /* if-cmp vAA, +BBBB */ 1519 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1520 jge 1f 1521 movswq 2(rPC), rINSTq # fetch signed displacement 1522 testq rINSTq, rINSTq 1523 jmp MterpCommonTakenBranch 1524 1: 1525 cmpl $JIT_CHECK_OSR, rPROFILE 1526 je .L_check_not_taken_osr 1527 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1528 1529 1530 /* ------------------------------ */ 1531 .balign 128 1532 .L_op_if_gez: /* 0x3b */ 1533 /* File: x86_64/op_if_gez.S */ 1534 /* File: x86_64/zcmp.S */ 1535 /* 1536 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1537 * fragment that specifies the *reverse* comparison to perform, e.g. 1538 * for "if-le" you would use "gt". 1539 * 1540 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1541 */ 1542 /* if-cmp vAA, +BBBB */ 1543 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1544 jl 1f 1545 movswq 2(rPC), rINSTq # fetch signed displacement 1546 testq rINSTq, rINSTq 1547 jmp MterpCommonTakenBranch 1548 1: 1549 cmpl $JIT_CHECK_OSR, rPROFILE 1550 je .L_check_not_taken_osr 1551 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1552 1553 1554 /* ------------------------------ */ 1555 .balign 128 1556 .L_op_if_gtz: /* 0x3c */ 1557 /* File: x86_64/op_if_gtz.S */ 1558 /* File: x86_64/zcmp.S */ 1559 /* 1560 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1561 * fragment that specifies the *reverse* comparison to perform, e.g. 1562 * for "if-le" you would use "gt". 1563 * 1564 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1565 */ 1566 /* if-cmp vAA, +BBBB */ 1567 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1568 jle 1f 1569 movswq 2(rPC), rINSTq # fetch signed displacement 1570 testq rINSTq, rINSTq 1571 jmp MterpCommonTakenBranch 1572 1: 1573 cmpl $JIT_CHECK_OSR, rPROFILE 1574 je .L_check_not_taken_osr 1575 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1576 1577 1578 /* ------------------------------ */ 1579 .balign 128 1580 .L_op_if_lez: /* 0x3d */ 1581 /* File: x86_64/op_if_lez.S */ 1582 /* File: x86_64/zcmp.S */ 1583 /* 1584 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1585 * fragment that specifies the *reverse* comparison to perform, e.g. 1586 * for "if-le" you would use "gt". 1587 * 1588 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1589 */ 1590 /* if-cmp vAA, +BBBB */ 1591 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1592 jg 1f 1593 movswq 2(rPC), rINSTq # fetch signed displacement 1594 testq rINSTq, rINSTq 1595 jmp MterpCommonTakenBranch 1596 1: 1597 cmpl $JIT_CHECK_OSR, rPROFILE 1598 je .L_check_not_taken_osr 1599 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1600 1601 1602 /* ------------------------------ */ 1603 .balign 128 1604 .L_op_unused_3e: /* 0x3e */ 1605 /* File: x86_64/op_unused_3e.S */ 1606 /* File: x86_64/unused.S */ 1607 /* 1608 * Bail to reference interpreter to throw. 1609 */ 1610 jmp MterpFallback 1611 1612 1613 /* ------------------------------ */ 1614 .balign 128 1615 .L_op_unused_3f: /* 0x3f */ 1616 /* File: x86_64/op_unused_3f.S */ 1617 /* File: x86_64/unused.S */ 1618 /* 1619 * Bail to reference interpreter to throw. 1620 */ 1621 jmp MterpFallback 1622 1623 1624 /* ------------------------------ */ 1625 .balign 128 1626 .L_op_unused_40: /* 0x40 */ 1627 /* File: x86_64/op_unused_40.S */ 1628 /* File: x86_64/unused.S */ 1629 /* 1630 * Bail to reference interpreter to throw. 1631 */ 1632 jmp MterpFallback 1633 1634 1635 /* ------------------------------ */ 1636 .balign 128 1637 .L_op_unused_41: /* 0x41 */ 1638 /* File: x86_64/op_unused_41.S */ 1639 /* File: x86_64/unused.S */ 1640 /* 1641 * Bail to reference interpreter to throw. 1642 */ 1643 jmp MterpFallback 1644 1645 1646 /* ------------------------------ */ 1647 .balign 128 1648 .L_op_unused_42: /* 0x42 */ 1649 /* File: x86_64/op_unused_42.S */ 1650 /* File: x86_64/unused.S */ 1651 /* 1652 * Bail to reference interpreter to throw. 1653 */ 1654 jmp MterpFallback 1655 1656 1657 /* ------------------------------ */ 1658 .balign 128 1659 .L_op_unused_43: /* 0x43 */ 1660 /* File: x86_64/op_unused_43.S */ 1661 /* File: x86_64/unused.S */ 1662 /* 1663 * Bail to reference interpreter to throw. 1664 */ 1665 jmp MterpFallback 1666 1667 1668 /* ------------------------------ */ 1669 .balign 128 1670 .L_op_aget: /* 0x44 */ 1671 /* File: x86_64/op_aget.S */ 1672 /* 1673 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1674 * 1675 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1676 * 1677 */ 1678 /* op vAA, vBB, vCC */ 1679 movzbq 2(rPC), %rax # eax <- BB 1680 movzbq 3(rPC), %rcx # ecx <- CC 1681 GET_VREG %eax, %rax # eax <- vBB (array object) 1682 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1683 testl %eax, %eax # null array object? 1684 je common_errNullObject # bail if so 1685 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1686 jae common_errArrayIndex # index >= length, bail. 1687 .if 0 1688 movq MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1689 SET_WIDE_VREG %rax, rINSTq 1690 .else 1691 movl MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,4), %eax 1692 SET_VREG %eax, rINSTq 1693 .endif 1694 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1695 1696 /* ------------------------------ */ 1697 .balign 128 1698 .L_op_aget_wide: /* 0x45 */ 1699 /* File: x86_64/op_aget_wide.S */ 1700 /* File: x86_64/op_aget.S */ 1701 /* 1702 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1703 * 1704 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1705 * 1706 */ 1707 /* op vAA, vBB, vCC */ 1708 movzbq 2(rPC), %rax # eax <- BB 1709 movzbq 3(rPC), %rcx # ecx <- CC 1710 GET_VREG %eax, %rax # eax <- vBB (array object) 1711 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1712 testl %eax, %eax # null array object? 1713 je common_errNullObject # bail if so 1714 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1715 jae common_errArrayIndex # index >= length, bail. 1716 .if 1 1717 movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1718 SET_WIDE_VREG %rax, rINSTq 1719 .else 1720 movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %eax 1721 SET_VREG %eax, rINSTq 1722 .endif 1723 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1724 1725 1726 /* ------------------------------ */ 1727 .balign 128 1728 .L_op_aget_object: /* 0x46 */ 1729 /* File: x86_64/op_aget_object.S */ 1730 /* 1731 * Array object get. vAA <- vBB[vCC]. 1732 * 1733 * for: aget-object 1734 */ 1735 /* op vAA, vBB, vCC */ 1736 movzbq 2(rPC), %rax # rax <- BB 1737 movzbq 3(rPC), %rcx # rcx <- CC 1738 GET_VREG OUT_32_ARG0, %rax # eax <- vBB (array object) 1739 GET_VREG OUT_32_ARG1, %rcx # ecx <- vCC (requested index) 1740 EXPORT_PC 1741 call SYMBOL(artAGetObjectFromMterp) # (array, index) 1742 movq rSELF, %rcx 1743 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 1744 jnz MterpException 1745 SET_VREG_OBJECT %eax, rINSTq 1746 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1747 1748 /* ------------------------------ */ 1749 .balign 128 1750 .L_op_aget_boolean: /* 0x47 */ 1751 /* File: x86_64/op_aget_boolean.S */ 1752 /* File: x86_64/op_aget.S */ 1753 /* 1754 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1755 * 1756 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1757 * 1758 */ 1759 /* op vAA, vBB, vCC */ 1760 movzbq 2(rPC), %rax # eax <- BB 1761 movzbq 3(rPC), %rcx # ecx <- CC 1762 GET_VREG %eax, %rax # eax <- vBB (array object) 1763 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1764 testl %eax, %eax # null array object? 1765 je common_errNullObject # bail if so 1766 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1767 jae common_errArrayIndex # index >= length, bail. 1768 .if 0 1769 movq MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1770 SET_WIDE_VREG %rax, rINSTq 1771 .else 1772 movzbl MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1), %eax 1773 SET_VREG %eax, rINSTq 1774 .endif 1775 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1776 1777 1778 /* ------------------------------ */ 1779 .balign 128 1780 .L_op_aget_byte: /* 0x48 */ 1781 /* File: x86_64/op_aget_byte.S */ 1782 /* File: x86_64/op_aget.S */ 1783 /* 1784 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1785 * 1786 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1787 * 1788 */ 1789 /* op vAA, vBB, vCC */ 1790 movzbq 2(rPC), %rax # eax <- BB 1791 movzbq 3(rPC), %rcx # ecx <- CC 1792 GET_VREG %eax, %rax # eax <- vBB (array object) 1793 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1794 testl %eax, %eax # null array object? 1795 je common_errNullObject # bail if so 1796 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1797 jae common_errArrayIndex # index >= length, bail. 1798 .if 0 1799 movq MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1800 SET_WIDE_VREG %rax, rINSTq 1801 .else 1802 movsbl MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1), %eax 1803 SET_VREG %eax, rINSTq 1804 .endif 1805 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1806 1807 1808 /* ------------------------------ */ 1809 .balign 128 1810 .L_op_aget_char: /* 0x49 */ 1811 /* File: x86_64/op_aget_char.S */ 1812 /* File: x86_64/op_aget.S */ 1813 /* 1814 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1815 * 1816 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1817 * 1818 */ 1819 /* op vAA, vBB, vCC */ 1820 movzbq 2(rPC), %rax # eax <- BB 1821 movzbq 3(rPC), %rcx # ecx <- CC 1822 GET_VREG %eax, %rax # eax <- vBB (array object) 1823 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1824 testl %eax, %eax # null array object? 1825 je common_errNullObject # bail if so 1826 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1827 jae common_errArrayIndex # index >= length, bail. 1828 .if 0 1829 movq MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1830 SET_WIDE_VREG %rax, rINSTq 1831 .else 1832 movzwl MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2), %eax 1833 SET_VREG %eax, rINSTq 1834 .endif 1835 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1836 1837 1838 /* ------------------------------ */ 1839 .balign 128 1840 .L_op_aget_short: /* 0x4a */ 1841 /* File: x86_64/op_aget_short.S */ 1842 /* File: x86_64/op_aget.S */ 1843 /* 1844 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1845 * 1846 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1847 * 1848 */ 1849 /* op vAA, vBB, vCC */ 1850 movzbq 2(rPC), %rax # eax <- BB 1851 movzbq 3(rPC), %rcx # ecx <- CC 1852 GET_VREG %eax, %rax # eax <- vBB (array object) 1853 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1854 testl %eax, %eax # null array object? 1855 je common_errNullObject # bail if so 1856 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1857 jae common_errArrayIndex # index >= length, bail. 1858 .if 0 1859 movq MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1860 SET_WIDE_VREG %rax, rINSTq 1861 .else 1862 movswl MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2), %eax 1863 SET_VREG %eax, rINSTq 1864 .endif 1865 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1866 1867 1868 /* ------------------------------ */ 1869 .balign 128 1870 .L_op_aput: /* 0x4b */ 1871 /* File: x86_64/op_aput.S */ 1872 /* 1873 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1874 * 1875 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1876 * 1877 */ 1878 /* op vAA, vBB, vCC */ 1879 movzbq 2(rPC), %rax # rax <- BB 1880 movzbq 3(rPC), %rcx # rcx <- CC 1881 GET_VREG %eax, %rax # eax <- vBB (array object) 1882 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1883 testl %eax, %eax # null array object? 1884 je common_errNullObject # bail if so 1885 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1886 jae common_errArrayIndex # index >= length, bail. 1887 .if 0 1888 GET_WIDE_VREG rINSTq, rINSTq 1889 .else 1890 GET_VREG rINST, rINSTq 1891 .endif 1892 movl rINST, MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,4) 1893 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1894 1895 /* ------------------------------ */ 1896 .balign 128 1897 .L_op_aput_wide: /* 0x4c */ 1898 /* File: x86_64/op_aput_wide.S */ 1899 /* File: x86_64/op_aput.S */ 1900 /* 1901 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1902 * 1903 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1904 * 1905 */ 1906 /* op vAA, vBB, vCC */ 1907 movzbq 2(rPC), %rax # rax <- BB 1908 movzbq 3(rPC), %rcx # rcx <- CC 1909 GET_VREG %eax, %rax # eax <- vBB (array object) 1910 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1911 testl %eax, %eax # null array object? 1912 je common_errNullObject # bail if so 1913 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1914 jae common_errArrayIndex # index >= length, bail. 1915 .if 1 1916 GET_WIDE_VREG rINSTq, rINSTq 1917 .else 1918 GET_VREG rINST, rINSTq 1919 .endif 1920 movq rINSTq, MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8) 1921 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1922 1923 1924 /* ------------------------------ */ 1925 .balign 128 1926 .L_op_aput_object: /* 0x4d */ 1927 /* File: x86_64/op_aput_object.S */ 1928 /* 1929 * Store an object into an array. vBB[vCC] <- vAA. 1930 */ 1931 /* op vAA, vBB, vCC */ 1932 EXPORT_PC 1933 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 1934 movq rPC, OUT_ARG1 1935 REFRESH_INST 77 1936 movq rINSTq, OUT_ARG2 1937 call SYMBOL(MterpAputObject) # (array, index) 1938 testb %al, %al 1939 jz MterpPossibleException 1940 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1941 1942 /* ------------------------------ */ 1943 .balign 128 1944 .L_op_aput_boolean: /* 0x4e */ 1945 /* File: x86_64/op_aput_boolean.S */ 1946 /* File: x86_64/op_aput.S */ 1947 /* 1948 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1949 * 1950 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1951 * 1952 */ 1953 /* op vAA, vBB, vCC */ 1954 movzbq 2(rPC), %rax # rax <- BB 1955 movzbq 3(rPC), %rcx # rcx <- CC 1956 GET_VREG %eax, %rax # eax <- vBB (array object) 1957 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1958 testl %eax, %eax # null array object? 1959 je common_errNullObject # bail if so 1960 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1961 jae common_errArrayIndex # index >= length, bail. 1962 .if 0 1963 GET_WIDE_VREG rINSTq, rINSTq 1964 .else 1965 GET_VREG rINST, rINSTq 1966 .endif 1967 movb rINSTbl, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1) 1968 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1969 1970 1971 /* ------------------------------ */ 1972 .balign 128 1973 .L_op_aput_byte: /* 0x4f */ 1974 /* File: x86_64/op_aput_byte.S */ 1975 /* File: x86_64/op_aput.S */ 1976 /* 1977 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1978 * 1979 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1980 * 1981 */ 1982 /* op vAA, vBB, vCC */ 1983 movzbq 2(rPC), %rax # rax <- BB 1984 movzbq 3(rPC), %rcx # rcx <- CC 1985 GET_VREG %eax, %rax # eax <- vBB (array object) 1986 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1987 testl %eax, %eax # null array object? 1988 je common_errNullObject # bail if so 1989 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1990 jae common_errArrayIndex # index >= length, bail. 1991 .if 0 1992 GET_WIDE_VREG rINSTq, rINSTq 1993 .else 1994 GET_VREG rINST, rINSTq 1995 .endif 1996 movb rINSTbl, MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1) 1997 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1998 1999 2000 /* ------------------------------ */ 2001 .balign 128 2002 .L_op_aput_char: /* 0x50 */ 2003 /* File: x86_64/op_aput_char.S */ 2004 /* File: x86_64/op_aput.S */ 2005 /* 2006 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2007 * 2008 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 2009 * 2010 */ 2011 /* op vAA, vBB, vCC */ 2012 movzbq 2(rPC), %rax # rax <- BB 2013 movzbq 3(rPC), %rcx # rcx <- CC 2014 GET_VREG %eax, %rax # eax <- vBB (array object) 2015 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 2016 testl %eax, %eax # null array object? 2017 je common_errNullObject # bail if so 2018 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2019 jae common_errArrayIndex # index >= length, bail. 2020 .if 0 2021 GET_WIDE_VREG rINSTq, rINSTq 2022 .else 2023 GET_VREG rINST, rINSTq 2024 .endif 2025 movw rINSTw, MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2) 2026 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2027 2028 2029 /* ------------------------------ */ 2030 .balign 128 2031 .L_op_aput_short: /* 0x51 */ 2032 /* File: x86_64/op_aput_short.S */ 2033 /* File: x86_64/op_aput.S */ 2034 /* 2035 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2036 * 2037 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 2038 * 2039 */ 2040 /* op vAA, vBB, vCC */ 2041 movzbq 2(rPC), %rax # rax <- BB 2042 movzbq 3(rPC), %rcx # rcx <- CC 2043 GET_VREG %eax, %rax # eax <- vBB (array object) 2044 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 2045 testl %eax, %eax # null array object? 2046 je common_errNullObject # bail if so 2047 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2048 jae common_errArrayIndex # index >= length, bail. 2049 .if 0 2050 GET_WIDE_VREG rINSTq, rINSTq 2051 .else 2052 GET_VREG rINST, rINSTq 2053 .endif 2054 movw rINSTw, MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2) 2055 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2056 2057 2058 /* ------------------------------ */ 2059 .balign 128 2060 .L_op_iget: /* 0x52 */ 2061 /* File: x86_64/op_iget.S */ 2062 /* 2063 * General instance field get. 2064 * 2065 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2066 */ 2067 EXPORT_PC 2068 movzbq rINSTbl, %rcx # rcx <- BA 2069 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2070 sarl $4, %ecx # ecx <- B 2071 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2072 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2073 movq rSELF, OUT_ARG3 2074 call SYMBOL(artGet32InstanceFromCode) 2075 movq rSELF, %rcx 2076 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2077 jnz MterpException # bail out 2078 andb $0xf, rINSTbl # rINST <- A 2079 .if 0 2080 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2081 .else 2082 .if 0 2083 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2084 .else 2085 SET_VREG %eax, rINSTq # fp[A] <-value 2086 .endif 2087 .endif 2088 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2089 2090 /* ------------------------------ */ 2091 .balign 128 2092 .L_op_iget_wide: /* 0x53 */ 2093 /* File: x86_64/op_iget_wide.S */ 2094 /* File: x86_64/op_iget.S */ 2095 /* 2096 * General instance field get. 2097 * 2098 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2099 */ 2100 EXPORT_PC 2101 movzbq rINSTbl, %rcx # rcx <- BA 2102 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2103 sarl $4, %ecx # ecx <- B 2104 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2105 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2106 movq rSELF, OUT_ARG3 2107 call SYMBOL(artGet64InstanceFromCode) 2108 movq rSELF, %rcx 2109 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2110 jnz MterpException # bail out 2111 andb $0xf, rINSTbl # rINST <- A 2112 .if 0 2113 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2114 .else 2115 .if 1 2116 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2117 .else 2118 SET_VREG %eax, rINSTq # fp[A] <-value 2119 .endif 2120 .endif 2121 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2122 2123 2124 /* ------------------------------ */ 2125 .balign 128 2126 .L_op_iget_object: /* 0x54 */ 2127 /* File: x86_64/op_iget_object.S */ 2128 /* File: x86_64/op_iget.S */ 2129 /* 2130 * General instance field get. 2131 * 2132 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2133 */ 2134 EXPORT_PC 2135 movzbq rINSTbl, %rcx # rcx <- BA 2136 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2137 sarl $4, %ecx # ecx <- B 2138 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2139 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2140 movq rSELF, OUT_ARG3 2141 call SYMBOL(artGetObjInstanceFromCode) 2142 movq rSELF, %rcx 2143 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2144 jnz MterpException # bail out 2145 andb $0xf, rINSTbl # rINST <- A 2146 .if 1 2147 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2148 .else 2149 .if 0 2150 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2151 .else 2152 SET_VREG %eax, rINSTq # fp[A] <-value 2153 .endif 2154 .endif 2155 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2156 2157 2158 /* ------------------------------ */ 2159 .balign 128 2160 .L_op_iget_boolean: /* 0x55 */ 2161 /* File: x86_64/op_iget_boolean.S */ 2162 /* File: x86_64/op_iget.S */ 2163 /* 2164 * General instance field get. 2165 * 2166 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2167 */ 2168 EXPORT_PC 2169 movzbq rINSTbl, %rcx # rcx <- BA 2170 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2171 sarl $4, %ecx # ecx <- B 2172 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2173 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2174 movq rSELF, OUT_ARG3 2175 call SYMBOL(artGetBooleanInstanceFromCode) 2176 movq rSELF, %rcx 2177 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2178 jnz MterpException # bail out 2179 andb $0xf, rINSTbl # rINST <- A 2180 .if 0 2181 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2182 .else 2183 .if 0 2184 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2185 .else 2186 SET_VREG %eax, rINSTq # fp[A] <-value 2187 .endif 2188 .endif 2189 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2190 2191 2192 /* ------------------------------ */ 2193 .balign 128 2194 .L_op_iget_byte: /* 0x56 */ 2195 /* File: x86_64/op_iget_byte.S */ 2196 /* File: x86_64/op_iget.S */ 2197 /* 2198 * General instance field get. 2199 * 2200 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2201 */ 2202 EXPORT_PC 2203 movzbq rINSTbl, %rcx # rcx <- BA 2204 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2205 sarl $4, %ecx # ecx <- B 2206 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2207 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2208 movq rSELF, OUT_ARG3 2209 call SYMBOL(artGetByteInstanceFromCode) 2210 movq rSELF, %rcx 2211 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2212 jnz MterpException # bail out 2213 andb $0xf, rINSTbl # rINST <- A 2214 .if 0 2215 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2216 .else 2217 .if 0 2218 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2219 .else 2220 SET_VREG %eax, rINSTq # fp[A] <-value 2221 .endif 2222 .endif 2223 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2224 2225 2226 /* ------------------------------ */ 2227 .balign 128 2228 .L_op_iget_char: /* 0x57 */ 2229 /* File: x86_64/op_iget_char.S */ 2230 /* File: x86_64/op_iget.S */ 2231 /* 2232 * General instance field get. 2233 * 2234 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2235 */ 2236 EXPORT_PC 2237 movzbq rINSTbl, %rcx # rcx <- BA 2238 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2239 sarl $4, %ecx # ecx <- B 2240 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2241 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2242 movq rSELF, OUT_ARG3 2243 call SYMBOL(artGetCharInstanceFromCode) 2244 movq rSELF, %rcx 2245 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2246 jnz MterpException # bail out 2247 andb $0xf, rINSTbl # rINST <- A 2248 .if 0 2249 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2250 .else 2251 .if 0 2252 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2253 .else 2254 SET_VREG %eax, rINSTq # fp[A] <-value 2255 .endif 2256 .endif 2257 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2258 2259 2260 /* ------------------------------ */ 2261 .balign 128 2262 .L_op_iget_short: /* 0x58 */ 2263 /* File: x86_64/op_iget_short.S */ 2264 /* File: x86_64/op_iget.S */ 2265 /* 2266 * General instance field get. 2267 * 2268 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2269 */ 2270 EXPORT_PC 2271 movzbq rINSTbl, %rcx # rcx <- BA 2272 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2273 sarl $4, %ecx # ecx <- B 2274 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2275 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2276 movq rSELF, OUT_ARG3 2277 call SYMBOL(artGetShortInstanceFromCode) 2278 movq rSELF, %rcx 2279 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2280 jnz MterpException # bail out 2281 andb $0xf, rINSTbl # rINST <- A 2282 .if 0 2283 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2284 .else 2285 .if 0 2286 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2287 .else 2288 SET_VREG %eax, rINSTq # fp[A] <-value 2289 .endif 2290 .endif 2291 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2292 2293 2294 /* ------------------------------ */ 2295 .balign 128 2296 .L_op_iput: /* 0x59 */ 2297 /* File: x86_64/op_iput.S */ 2298 /* 2299 * General 32-bit instance field put. 2300 * 2301 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2302 */ 2303 /* op vA, vB, field@CCCC */ 2304 .extern artSet32InstanceFromMterp 2305 EXPORT_PC 2306 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2307 movzbq rINSTbl, %rcx # rcx<- BA 2308 sarl $4, %ecx # ecx<- B 2309 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2310 andb $0xf, rINSTbl # rINST<- A 2311 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2312 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2313 call SYMBOL(artSet32InstanceFromMterp) 2314 testb %al, %al 2315 jnz MterpPossibleException 2316 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2317 2318 /* ------------------------------ */ 2319 .balign 128 2320 .L_op_iput_wide: /* 0x5a */ 2321 /* File: x86_64/op_iput_wide.S */ 2322 /* iput-wide vA, vB, field@CCCC */ 2323 .extern artSet64InstanceFromMterp 2324 EXPORT_PC 2325 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2326 movzbq rINSTbl, %rcx # rcx <- BA 2327 sarl $4, %ecx # ecx <- B 2328 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2329 andb $0xf, rINSTbl # rINST <- A 2330 leaq VREG_ADDRESS(rINSTq), OUT_ARG2 # &fp[A] 2331 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2332 call SYMBOL(artSet64InstanceFromMterp) 2333 testb %al, %al 2334 jnz MterpPossibleException 2335 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2336 2337 /* ------------------------------ */ 2338 .balign 128 2339 .L_op_iput_object: /* 0x5b */ 2340 /* File: x86_64/op_iput_object.S */ 2341 EXPORT_PC 2342 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 2343 movq rPC, OUT_ARG1 2344 REFRESH_INST 91 2345 movl rINST, OUT_32_ARG2 2346 movq rSELF, OUT_ARG3 2347 call SYMBOL(MterpIputObject) 2348 testb %al, %al 2349 jz MterpException 2350 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2351 2352 /* ------------------------------ */ 2353 .balign 128 2354 .L_op_iput_boolean: /* 0x5c */ 2355 /* File: x86_64/op_iput_boolean.S */ 2356 /* File: x86_64/op_iput.S */ 2357 /* 2358 * General 32-bit instance field put. 2359 * 2360 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2361 */ 2362 /* op vA, vB, field@CCCC */ 2363 .extern artSet8InstanceFromMterp 2364 EXPORT_PC 2365 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2366 movzbq rINSTbl, %rcx # rcx<- BA 2367 sarl $4, %ecx # ecx<- B 2368 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2369 andb $0xf, rINSTbl # rINST<- A 2370 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2371 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2372 call SYMBOL(artSet8InstanceFromMterp) 2373 testb %al, %al 2374 jnz MterpPossibleException 2375 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2376 2377 2378 /* ------------------------------ */ 2379 .balign 128 2380 .L_op_iput_byte: /* 0x5d */ 2381 /* File: x86_64/op_iput_byte.S */ 2382 /* File: x86_64/op_iput.S */ 2383 /* 2384 * General 32-bit instance field put. 2385 * 2386 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2387 */ 2388 /* op vA, vB, field@CCCC */ 2389 .extern artSet8InstanceFromMterp 2390 EXPORT_PC 2391 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2392 movzbq rINSTbl, %rcx # rcx<- BA 2393 sarl $4, %ecx # ecx<- B 2394 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2395 andb $0xf, rINSTbl # rINST<- A 2396 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2397 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2398 call SYMBOL(artSet8InstanceFromMterp) 2399 testb %al, %al 2400 jnz MterpPossibleException 2401 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2402 2403 2404 /* ------------------------------ */ 2405 .balign 128 2406 .L_op_iput_char: /* 0x5e */ 2407 /* File: x86_64/op_iput_char.S */ 2408 /* File: x86_64/op_iput.S */ 2409 /* 2410 * General 32-bit instance field put. 2411 * 2412 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2413 */ 2414 /* op vA, vB, field@CCCC */ 2415 .extern artSet16InstanceFromMterp 2416 EXPORT_PC 2417 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2418 movzbq rINSTbl, %rcx # rcx<- BA 2419 sarl $4, %ecx # ecx<- B 2420 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2421 andb $0xf, rINSTbl # rINST<- A 2422 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2423 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2424 call SYMBOL(artSet16InstanceFromMterp) 2425 testb %al, %al 2426 jnz MterpPossibleException 2427 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2428 2429 2430 /* ------------------------------ */ 2431 .balign 128 2432 .L_op_iput_short: /* 0x5f */ 2433 /* File: x86_64/op_iput_short.S */ 2434 /* File: x86_64/op_iput.S */ 2435 /* 2436 * General 32-bit instance field put. 2437 * 2438 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2439 */ 2440 /* op vA, vB, field@CCCC */ 2441 .extern artSet16InstanceFromMterp 2442 EXPORT_PC 2443 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2444 movzbq rINSTbl, %rcx # rcx<- BA 2445 sarl $4, %ecx # ecx<- B 2446 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2447 andb $0xf, rINSTbl # rINST<- A 2448 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2449 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2450 call SYMBOL(artSet16InstanceFromMterp) 2451 testb %al, %al 2452 jnz MterpPossibleException 2453 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2454 2455 2456 /* ------------------------------ */ 2457 .balign 128 2458 .L_op_sget: /* 0x60 */ 2459 /* File: x86_64/op_sget.S */ 2460 /* 2461 * General SGET handler wrapper. 2462 * 2463 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2464 */ 2465 /* op vAA, field@BBBB */ 2466 .extern MterpGet32Static 2467 EXPORT_PC 2468 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2469 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2470 movq rSELF, OUT_ARG2 # self 2471 call SYMBOL(MterpGet32Static) 2472 movq rSELF, %rcx 2473 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2474 jnz MterpException 2475 .if 0 2476 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2477 .else 2478 .if 0 2479 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2480 .else 2481 SET_VREG %eax, rINSTq # fp[A] <- value 2482 .endif 2483 .endif 2484 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2485 2486 /* ------------------------------ */ 2487 .balign 128 2488 .L_op_sget_wide: /* 0x61 */ 2489 /* File: x86_64/op_sget_wide.S */ 2490 /* File: x86_64/op_sget.S */ 2491 /* 2492 * General SGET handler wrapper. 2493 * 2494 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2495 */ 2496 /* op vAA, field@BBBB */ 2497 .extern MterpGet64Static 2498 EXPORT_PC 2499 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2500 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2501 movq rSELF, OUT_ARG2 # self 2502 call SYMBOL(MterpGet64Static) 2503 movq rSELF, %rcx 2504 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2505 jnz MterpException 2506 .if 0 2507 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2508 .else 2509 .if 1 2510 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2511 .else 2512 SET_VREG %eax, rINSTq # fp[A] <- value 2513 .endif 2514 .endif 2515 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2516 2517 2518 /* ------------------------------ */ 2519 .balign 128 2520 .L_op_sget_object: /* 0x62 */ 2521 /* File: x86_64/op_sget_object.S */ 2522 /* File: x86_64/op_sget.S */ 2523 /* 2524 * General SGET handler wrapper. 2525 * 2526 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2527 */ 2528 /* op vAA, field@BBBB */ 2529 .extern MterpGetObjStatic 2530 EXPORT_PC 2531 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2532 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2533 movq rSELF, OUT_ARG2 # self 2534 call SYMBOL(MterpGetObjStatic) 2535 movq rSELF, %rcx 2536 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2537 jnz MterpException 2538 .if 1 2539 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2540 .else 2541 .if 0 2542 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2543 .else 2544 SET_VREG %eax, rINSTq # fp[A] <- value 2545 .endif 2546 .endif 2547 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2548 2549 2550 /* ------------------------------ */ 2551 .balign 128 2552 .L_op_sget_boolean: /* 0x63 */ 2553 /* File: x86_64/op_sget_boolean.S */ 2554 /* File: x86_64/op_sget.S */ 2555 /* 2556 * General SGET handler wrapper. 2557 * 2558 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2559 */ 2560 /* op vAA, field@BBBB */ 2561 .extern MterpGetBooleanStatic 2562 EXPORT_PC 2563 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2564 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2565 movq rSELF, OUT_ARG2 # self 2566 call SYMBOL(MterpGetBooleanStatic) 2567 movq rSELF, %rcx 2568 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2569 jnz MterpException 2570 .if 0 2571 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2572 .else 2573 .if 0 2574 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2575 .else 2576 SET_VREG %eax, rINSTq # fp[A] <- value 2577 .endif 2578 .endif 2579 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2580 2581 2582 /* ------------------------------ */ 2583 .balign 128 2584 .L_op_sget_byte: /* 0x64 */ 2585 /* File: x86_64/op_sget_byte.S */ 2586 /* File: x86_64/op_sget.S */ 2587 /* 2588 * General SGET handler wrapper. 2589 * 2590 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2591 */ 2592 /* op vAA, field@BBBB */ 2593 .extern MterpGetByteStatic 2594 EXPORT_PC 2595 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2596 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2597 movq rSELF, OUT_ARG2 # self 2598 call SYMBOL(MterpGetByteStatic) 2599 movq rSELF, %rcx 2600 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2601 jnz MterpException 2602 .if 0 2603 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2604 .else 2605 .if 0 2606 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2607 .else 2608 SET_VREG %eax, rINSTq # fp[A] <- value 2609 .endif 2610 .endif 2611 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2612 2613 2614 /* ------------------------------ */ 2615 .balign 128 2616 .L_op_sget_char: /* 0x65 */ 2617 /* File: x86_64/op_sget_char.S */ 2618 /* File: x86_64/op_sget.S */ 2619 /* 2620 * General SGET handler wrapper. 2621 * 2622 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2623 */ 2624 /* op vAA, field@BBBB */ 2625 .extern MterpGetCharStatic 2626 EXPORT_PC 2627 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2628 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2629 movq rSELF, OUT_ARG2 # self 2630 call SYMBOL(MterpGetCharStatic) 2631 movq rSELF, %rcx 2632 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2633 jnz MterpException 2634 .if 0 2635 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2636 .else 2637 .if 0 2638 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2639 .else 2640 SET_VREG %eax, rINSTq # fp[A] <- value 2641 .endif 2642 .endif 2643 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2644 2645 2646 /* ------------------------------ */ 2647 .balign 128 2648 .L_op_sget_short: /* 0x66 */ 2649 /* File: x86_64/op_sget_short.S */ 2650 /* File: x86_64/op_sget.S */ 2651 /* 2652 * General SGET handler wrapper. 2653 * 2654 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2655 */ 2656 /* op vAA, field@BBBB */ 2657 .extern MterpGetShortStatic 2658 EXPORT_PC 2659 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2660 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2661 movq rSELF, OUT_ARG2 # self 2662 call SYMBOL(MterpGetShortStatic) 2663 movq rSELF, %rcx 2664 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2665 jnz MterpException 2666 .if 0 2667 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2668 .else 2669 .if 0 2670 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2671 .else 2672 SET_VREG %eax, rINSTq # fp[A] <- value 2673 .endif 2674 .endif 2675 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2676 2677 2678 /* ------------------------------ */ 2679 .balign 128 2680 .L_op_sput: /* 0x67 */ 2681 /* File: x86_64/op_sput.S */ 2682 /* 2683 * General SPUT handler wrapper. 2684 * 2685 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2686 */ 2687 /* op vAA, field@BBBB */ 2688 .extern MterpSet32Static 2689 EXPORT_PC 2690 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2691 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2692 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2693 movq rSELF, OUT_ARG3 # self 2694 call SYMBOL(MterpSet32Static) 2695 testb %al, %al 2696 jnz MterpException 2697 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2698 2699 /* ------------------------------ */ 2700 .balign 128 2701 .L_op_sput_wide: /* 0x68 */ 2702 /* File: x86_64/op_sput_wide.S */ 2703 /* 2704 * SPUT_WIDE handler wrapper. 2705 * 2706 */ 2707 /* sput-wide vAA, field@BBBB */ 2708 .extern MterpSet64Static 2709 EXPORT_PC 2710 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2711 leaq VREG_ADDRESS(rINSTq), OUT_ARG1 # &fp[AA] 2712 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2713 movq rSELF, OUT_ARG3 # self 2714 call SYMBOL(MterpSet64Static) 2715 testb %al, %al 2716 jnz MterpException 2717 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2718 2719 /* ------------------------------ */ 2720 .balign 128 2721 .L_op_sput_object: /* 0x69 */ 2722 /* File: x86_64/op_sput_object.S */ 2723 EXPORT_PC 2724 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 2725 movq rPC, OUT_ARG1 2726 REFRESH_INST 105 2727 movq rINSTq, OUT_ARG2 2728 movq rSELF, OUT_ARG3 2729 call SYMBOL(MterpSputObject) 2730 testb %al, %al 2731 jz MterpException 2732 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2733 2734 /* ------------------------------ */ 2735 .balign 128 2736 .L_op_sput_boolean: /* 0x6a */ 2737 /* File: x86_64/op_sput_boolean.S */ 2738 /* File: x86_64/op_sput.S */ 2739 /* 2740 * General SPUT handler wrapper. 2741 * 2742 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2743 */ 2744 /* op vAA, field@BBBB */ 2745 .extern MterpSetBooleanStatic 2746 EXPORT_PC 2747 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2748 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2749 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2750 movq rSELF, OUT_ARG3 # self 2751 call SYMBOL(MterpSetBooleanStatic) 2752 testb %al, %al 2753 jnz MterpException 2754 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2755 2756 2757 /* ------------------------------ */ 2758 .balign 128 2759 .L_op_sput_byte: /* 0x6b */ 2760 /* File: x86_64/op_sput_byte.S */ 2761 /* File: x86_64/op_sput.S */ 2762 /* 2763 * General SPUT handler wrapper. 2764 * 2765 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2766 */ 2767 /* op vAA, field@BBBB */ 2768 .extern MterpSetByteStatic 2769 EXPORT_PC 2770 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2771 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2772 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2773 movq rSELF, OUT_ARG3 # self 2774 call SYMBOL(MterpSetByteStatic) 2775 testb %al, %al 2776 jnz MterpException 2777 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2778 2779 2780 /* ------------------------------ */ 2781 .balign 128 2782 .L_op_sput_char: /* 0x6c */ 2783 /* File: x86_64/op_sput_char.S */ 2784 /* File: x86_64/op_sput.S */ 2785 /* 2786 * General SPUT handler wrapper. 2787 * 2788 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2789 */ 2790 /* op vAA, field@BBBB */ 2791 .extern MterpSetCharStatic 2792 EXPORT_PC 2793 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2794 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2795 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2796 movq rSELF, OUT_ARG3 # self 2797 call SYMBOL(MterpSetCharStatic) 2798 testb %al, %al 2799 jnz MterpException 2800 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2801 2802 2803 /* ------------------------------ */ 2804 .balign 128 2805 .L_op_sput_short: /* 0x6d */ 2806 /* File: x86_64/op_sput_short.S */ 2807 /* File: x86_64/op_sput.S */ 2808 /* 2809 * General SPUT handler wrapper. 2810 * 2811 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2812 */ 2813 /* op vAA, field@BBBB */ 2814 .extern MterpSetShortStatic 2815 EXPORT_PC 2816 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2817 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2818 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2819 movq rSELF, OUT_ARG3 # self 2820 call SYMBOL(MterpSetShortStatic) 2821 testb %al, %al 2822 jnz MterpException 2823 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2824 2825 2826 /* ------------------------------ */ 2827 .balign 128 2828 .L_op_invoke_virtual: /* 0x6e */ 2829 /* File: x86_64/op_invoke_virtual.S */ 2830 /* File: x86_64/invoke.S */ 2831 /* 2832 * Generic invoke handler wrapper. 2833 */ 2834 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2835 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2836 .extern MterpInvokeVirtual 2837 EXPORT_PC 2838 movq rSELF, OUT_ARG0 2839 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2840 movq rPC, OUT_ARG2 2841 REFRESH_INST 110 2842 movl rINST, OUT_32_ARG3 2843 call SYMBOL(MterpInvokeVirtual) 2844 testb %al, %al 2845 jz MterpException 2846 ADVANCE_PC 3 2847 call SYMBOL(MterpShouldSwitchInterpreters) 2848 testb %al, %al 2849 jnz MterpFallback 2850 FETCH_INST 2851 GOTO_NEXT 2852 2853 /* 2854 * Handle a virtual method call. 2855 * 2856 * for: invoke-virtual, invoke-virtual/range 2857 */ 2858 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2859 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2860 2861 /* ------------------------------ */ 2862 .balign 128 2863 .L_op_invoke_super: /* 0x6f */ 2864 /* File: x86_64/op_invoke_super.S */ 2865 /* File: x86_64/invoke.S */ 2866 /* 2867 * Generic invoke handler wrapper. 2868 */ 2869 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2870 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2871 .extern MterpInvokeSuper 2872 EXPORT_PC 2873 movq rSELF, OUT_ARG0 2874 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2875 movq rPC, OUT_ARG2 2876 REFRESH_INST 111 2877 movl rINST, OUT_32_ARG3 2878 call SYMBOL(MterpInvokeSuper) 2879 testb %al, %al 2880 jz MterpException 2881 ADVANCE_PC 3 2882 call SYMBOL(MterpShouldSwitchInterpreters) 2883 testb %al, %al 2884 jnz MterpFallback 2885 FETCH_INST 2886 GOTO_NEXT 2887 2888 /* 2889 * Handle a "super" method call. 2890 * 2891 * for: invoke-super, invoke-super/range 2892 */ 2893 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2894 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2895 2896 /* ------------------------------ */ 2897 .balign 128 2898 .L_op_invoke_direct: /* 0x70 */ 2899 /* File: x86_64/op_invoke_direct.S */ 2900 /* File: x86_64/invoke.S */ 2901 /* 2902 * Generic invoke handler wrapper. 2903 */ 2904 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2905 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2906 .extern MterpInvokeDirect 2907 EXPORT_PC 2908 movq rSELF, OUT_ARG0 2909 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2910 movq rPC, OUT_ARG2 2911 REFRESH_INST 112 2912 movl rINST, OUT_32_ARG3 2913 call SYMBOL(MterpInvokeDirect) 2914 testb %al, %al 2915 jz MterpException 2916 ADVANCE_PC 3 2917 call SYMBOL(MterpShouldSwitchInterpreters) 2918 testb %al, %al 2919 jnz MterpFallback 2920 FETCH_INST 2921 GOTO_NEXT 2922 2923 2924 /* ------------------------------ */ 2925 .balign 128 2926 .L_op_invoke_static: /* 0x71 */ 2927 /* File: x86_64/op_invoke_static.S */ 2928 /* File: x86_64/invoke.S */ 2929 /* 2930 * Generic invoke handler wrapper. 2931 */ 2932 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2933 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2934 .extern MterpInvokeStatic 2935 EXPORT_PC 2936 movq rSELF, OUT_ARG0 2937 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2938 movq rPC, OUT_ARG2 2939 REFRESH_INST 113 2940 movl rINST, OUT_32_ARG3 2941 call SYMBOL(MterpInvokeStatic) 2942 testb %al, %al 2943 jz MterpException 2944 ADVANCE_PC 3 2945 call SYMBOL(MterpShouldSwitchInterpreters) 2946 testb %al, %al 2947 jnz MterpFallback 2948 FETCH_INST 2949 GOTO_NEXT 2950 2951 2952 2953 /* ------------------------------ */ 2954 .balign 128 2955 .L_op_invoke_interface: /* 0x72 */ 2956 /* File: x86_64/op_invoke_interface.S */ 2957 /* File: x86_64/invoke.S */ 2958 /* 2959 * Generic invoke handler wrapper. 2960 */ 2961 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2962 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2963 .extern MterpInvokeInterface 2964 EXPORT_PC 2965 movq rSELF, OUT_ARG0 2966 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2967 movq rPC, OUT_ARG2 2968 REFRESH_INST 114 2969 movl rINST, OUT_32_ARG3 2970 call SYMBOL(MterpInvokeInterface) 2971 testb %al, %al 2972 jz MterpException 2973 ADVANCE_PC 3 2974 call SYMBOL(MterpShouldSwitchInterpreters) 2975 testb %al, %al 2976 jnz MterpFallback 2977 FETCH_INST 2978 GOTO_NEXT 2979 2980 /* 2981 * Handle an interface method call. 2982 * 2983 * for: invoke-interface, invoke-interface/range 2984 */ 2985 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2986 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2987 2988 /* ------------------------------ */ 2989 .balign 128 2990 .L_op_return_void_no_barrier: /* 0x73 */ 2991 /* File: x86_64/op_return_void_no_barrier.S */ 2992 movq rSELF, OUT_ARG0 2993 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 2994 jz 1f 2995 call SYMBOL(MterpSuspendCheck) 2996 1: 2997 xorq %rax, %rax 2998 jmp MterpReturn 2999 3000 /* ------------------------------ */ 3001 .balign 128 3002 .L_op_invoke_virtual_range: /* 0x74 */ 3003 /* File: x86_64/op_invoke_virtual_range.S */ 3004 /* File: x86_64/invoke.S */ 3005 /* 3006 * Generic invoke handler wrapper. 3007 */ 3008 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3009 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3010 .extern MterpInvokeVirtualRange 3011 EXPORT_PC 3012 movq rSELF, OUT_ARG0 3013 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3014 movq rPC, OUT_ARG2 3015 REFRESH_INST 116 3016 movl rINST, OUT_32_ARG3 3017 call SYMBOL(MterpInvokeVirtualRange) 3018 testb %al, %al 3019 jz MterpException 3020 ADVANCE_PC 3 3021 call SYMBOL(MterpShouldSwitchInterpreters) 3022 testb %al, %al 3023 jnz MterpFallback 3024 FETCH_INST 3025 GOTO_NEXT 3026 3027 3028 /* ------------------------------ */ 3029 .balign 128 3030 .L_op_invoke_super_range: /* 0x75 */ 3031 /* File: x86_64/op_invoke_super_range.S */ 3032 /* File: x86_64/invoke.S */ 3033 /* 3034 * Generic invoke handler wrapper. 3035 */ 3036 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3037 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3038 .extern MterpInvokeSuperRange 3039 EXPORT_PC 3040 movq rSELF, OUT_ARG0 3041 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3042 movq rPC, OUT_ARG2 3043 REFRESH_INST 117 3044 movl rINST, OUT_32_ARG3 3045 call SYMBOL(MterpInvokeSuperRange) 3046 testb %al, %al 3047 jz MterpException 3048 ADVANCE_PC 3 3049 call SYMBOL(MterpShouldSwitchInterpreters) 3050 testb %al, %al 3051 jnz MterpFallback 3052 FETCH_INST 3053 GOTO_NEXT 3054 3055 3056 /* ------------------------------ */ 3057 .balign 128 3058 .L_op_invoke_direct_range: /* 0x76 */ 3059 /* File: x86_64/op_invoke_direct_range.S */ 3060 /* File: x86_64/invoke.S */ 3061 /* 3062 * Generic invoke handler wrapper. 3063 */ 3064 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3065 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3066 .extern MterpInvokeDirectRange 3067 EXPORT_PC 3068 movq rSELF, OUT_ARG0 3069 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3070 movq rPC, OUT_ARG2 3071 REFRESH_INST 118 3072 movl rINST, OUT_32_ARG3 3073 call SYMBOL(MterpInvokeDirectRange) 3074 testb %al, %al 3075 jz MterpException 3076 ADVANCE_PC 3 3077 call SYMBOL(MterpShouldSwitchInterpreters) 3078 testb %al, %al 3079 jnz MterpFallback 3080 FETCH_INST 3081 GOTO_NEXT 3082 3083 3084 /* ------------------------------ */ 3085 .balign 128 3086 .L_op_invoke_static_range: /* 0x77 */ 3087 /* File: x86_64/op_invoke_static_range.S */ 3088 /* File: x86_64/invoke.S */ 3089 /* 3090 * Generic invoke handler wrapper. 3091 */ 3092 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3093 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3094 .extern MterpInvokeStaticRange 3095 EXPORT_PC 3096 movq rSELF, OUT_ARG0 3097 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3098 movq rPC, OUT_ARG2 3099 REFRESH_INST 119 3100 movl rINST, OUT_32_ARG3 3101 call SYMBOL(MterpInvokeStaticRange) 3102 testb %al, %al 3103 jz MterpException 3104 ADVANCE_PC 3 3105 call SYMBOL(MterpShouldSwitchInterpreters) 3106 testb %al, %al 3107 jnz MterpFallback 3108 FETCH_INST 3109 GOTO_NEXT 3110 3111 3112 /* ------------------------------ */ 3113 .balign 128 3114 .L_op_invoke_interface_range: /* 0x78 */ 3115 /* File: x86_64/op_invoke_interface_range.S */ 3116 /* File: x86_64/invoke.S */ 3117 /* 3118 * Generic invoke handler wrapper. 3119 */ 3120 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3121 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3122 .extern MterpInvokeInterfaceRange 3123 EXPORT_PC 3124 movq rSELF, OUT_ARG0 3125 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3126 movq rPC, OUT_ARG2 3127 REFRESH_INST 120 3128 movl rINST, OUT_32_ARG3 3129 call SYMBOL(MterpInvokeInterfaceRange) 3130 testb %al, %al 3131 jz MterpException 3132 ADVANCE_PC 3 3133 call SYMBOL(MterpShouldSwitchInterpreters) 3134 testb %al, %al 3135 jnz MterpFallback 3136 FETCH_INST 3137 GOTO_NEXT 3138 3139 3140 /* ------------------------------ */ 3141 .balign 128 3142 .L_op_unused_79: /* 0x79 */ 3143 /* File: x86_64/op_unused_79.S */ 3144 /* File: x86_64/unused.S */ 3145 /* 3146 * Bail to reference interpreter to throw. 3147 */ 3148 jmp MterpFallback 3149 3150 3151 /* ------------------------------ */ 3152 .balign 128 3153 .L_op_unused_7a: /* 0x7a */ 3154 /* File: x86_64/op_unused_7a.S */ 3155 /* File: x86_64/unused.S */ 3156 /* 3157 * Bail to reference interpreter to throw. 3158 */ 3159 jmp MterpFallback 3160 3161 3162 /* ------------------------------ */ 3163 .balign 128 3164 .L_op_neg_int: /* 0x7b */ 3165 /* File: x86_64/op_neg_int.S */ 3166 /* File: x86_64/unop.S */ 3167 /* 3168 * Generic 32/64-bit unary operation. Provide an "instr" line that 3169 * specifies an instruction that performs "result = op eax". 3170 */ 3171 /* unop vA, vB */ 3172 movl rINST, %ecx # rcx <- A+ 3173 sarl $4,rINST # rINST <- B 3174 .if 0 3175 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3176 .else 3177 GET_VREG %eax, rINSTq # eax <- vB 3178 .endif 3179 andb $0xf,%cl # ecx <- A 3180 3181 negl %eax 3182 .if 0 3183 SET_WIDE_VREG %rax, %rcx 3184 .else 3185 SET_VREG %eax, %rcx 3186 .endif 3187 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3188 3189 3190 /* ------------------------------ */ 3191 .balign 128 3192 .L_op_not_int: /* 0x7c */ 3193 /* File: x86_64/op_not_int.S */ 3194 /* File: x86_64/unop.S */ 3195 /* 3196 * Generic 32/64-bit unary operation. Provide an "instr" line that 3197 * specifies an instruction that performs "result = op eax". 3198 */ 3199 /* unop vA, vB */ 3200 movl rINST, %ecx # rcx <- A+ 3201 sarl $4,rINST # rINST <- B 3202 .if 0 3203 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3204 .else 3205 GET_VREG %eax, rINSTq # eax <- vB 3206 .endif 3207 andb $0xf,%cl # ecx <- A 3208 3209 notl %eax 3210 .if 0 3211 SET_WIDE_VREG %rax, %rcx 3212 .else 3213 SET_VREG %eax, %rcx 3214 .endif 3215 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3216 3217 3218 /* ------------------------------ */ 3219 .balign 128 3220 .L_op_neg_long: /* 0x7d */ 3221 /* File: x86_64/op_neg_long.S */ 3222 /* File: x86_64/unop.S */ 3223 /* 3224 * Generic 32/64-bit unary operation. Provide an "instr" line that 3225 * specifies an instruction that performs "result = op eax". 3226 */ 3227 /* unop vA, vB */ 3228 movl rINST, %ecx # rcx <- A+ 3229 sarl $4,rINST # rINST <- B 3230 .if 1 3231 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3232 .else 3233 GET_VREG %eax, rINSTq # eax <- vB 3234 .endif 3235 andb $0xf,%cl # ecx <- A 3236 3237 negq %rax 3238 .if 1 3239 SET_WIDE_VREG %rax, %rcx 3240 .else 3241 SET_VREG %eax, %rcx 3242 .endif 3243 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3244 3245 3246 /* ------------------------------ */ 3247 .balign 128 3248 .L_op_not_long: /* 0x7e */ 3249 /* File: x86_64/op_not_long.S */ 3250 /* File: x86_64/unop.S */ 3251 /* 3252 * Generic 32/64-bit unary operation. Provide an "instr" line that 3253 * specifies an instruction that performs "result = op eax". 3254 */ 3255 /* unop vA, vB */ 3256 movl rINST, %ecx # rcx <- A+ 3257 sarl $4,rINST # rINST <- B 3258 .if 1 3259 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3260 .else 3261 GET_VREG %eax, rINSTq # eax <- vB 3262 .endif 3263 andb $0xf,%cl # ecx <- A 3264 3265 notq %rax 3266 .if 1 3267 SET_WIDE_VREG %rax, %rcx 3268 .else 3269 SET_VREG %eax, %rcx 3270 .endif 3271 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3272 3273 3274 /* ------------------------------ */ 3275 .balign 128 3276 .L_op_neg_float: /* 0x7f */ 3277 /* File: x86_64/op_neg_float.S */ 3278 /* File: x86_64/unop.S */ 3279 /* 3280 * Generic 32/64-bit unary operation. Provide an "instr" line that 3281 * specifies an instruction that performs "result = op eax". 3282 */ 3283 /* unop vA, vB */ 3284 movl rINST, %ecx # rcx <- A+ 3285 sarl $4,rINST # rINST <- B 3286 .if 0 3287 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3288 .else 3289 GET_VREG %eax, rINSTq # eax <- vB 3290 .endif 3291 andb $0xf,%cl # ecx <- A 3292 3293 xorl $0x80000000, %eax 3294 .if 0 3295 SET_WIDE_VREG %rax, %rcx 3296 .else 3297 SET_VREG %eax, %rcx 3298 .endif 3299 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3300 3301 3302 /* ------------------------------ */ 3303 .balign 128 3304 .L_op_neg_double: /* 0x80 */ 3305 /* File: x86_64/op_neg_double.S */ 3306 /* File: x86_64/unop.S */ 3307 /* 3308 * Generic 32/64-bit unary operation. Provide an "instr" line that 3309 * specifies an instruction that performs "result = op eax". 3310 */ 3311 /* unop vA, vB */ 3312 movl rINST, %ecx # rcx <- A+ 3313 sarl $4,rINST # rINST <- B 3314 .if 1 3315 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3316 .else 3317 GET_VREG %eax, rINSTq # eax <- vB 3318 .endif 3319 andb $0xf,%cl # ecx <- A 3320 movq $0x8000000000000000, %rsi 3321 xorq %rsi, %rax 3322 .if 1 3323 SET_WIDE_VREG %rax, %rcx 3324 .else 3325 SET_VREG %eax, %rcx 3326 .endif 3327 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3328 3329 3330 /* ------------------------------ */ 3331 .balign 128 3332 .L_op_int_to_long: /* 0x81 */ 3333 /* File: x86_64/op_int_to_long.S */ 3334 /* int to long vA, vB */ 3335 movzbq rINSTbl, %rax # rax <- +A 3336 sarl $4, %eax # eax <- B 3337 andb $0xf, rINSTbl # rINST <- A 3338 movslq VREG_ADDRESS(%rax), %rax 3339 SET_WIDE_VREG %rax, rINSTq # v[A] <- %rax 3340 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3341 3342 3343 /* ------------------------------ */ 3344 .balign 128 3345 .L_op_int_to_float: /* 0x82 */ 3346 /* File: x86_64/op_int_to_float.S */ 3347 /* File: x86_64/fpcvt.S */ 3348 /* 3349 * Generic 32-bit FP conversion operation. 3350 */ 3351 /* unop vA, vB */ 3352 movl rINST, %ecx # rcx <- A+ 3353 sarl $4, rINST # rINST <- B 3354 andb $0xf, %cl # ecx <- A 3355 cvtsi2ssl VREG_ADDRESS(rINSTq), %xmm0 3356 .if 0 3357 movsd %xmm0, VREG_ADDRESS(%rcx) 3358 CLEAR_WIDE_REF %rcx 3359 .else 3360 movss %xmm0, VREG_ADDRESS(%rcx) 3361 CLEAR_REF %rcx 3362 .endif 3363 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3364 3365 3366 /* ------------------------------ */ 3367 .balign 128 3368 .L_op_int_to_double: /* 0x83 */ 3369 /* File: x86_64/op_int_to_double.S */ 3370 /* File: x86_64/fpcvt.S */ 3371 /* 3372 * Generic 32-bit FP conversion operation. 3373 */ 3374 /* unop vA, vB */ 3375 movl rINST, %ecx # rcx <- A+ 3376 sarl $4, rINST # rINST <- B 3377 andb $0xf, %cl # ecx <- A 3378 cvtsi2sdl VREG_ADDRESS(rINSTq), %xmm0 3379 .if 1 3380 movsd %xmm0, VREG_ADDRESS(%rcx) 3381 CLEAR_WIDE_REF %rcx 3382 .else 3383 movss %xmm0, VREG_ADDRESS(%rcx) 3384 CLEAR_REF %rcx 3385 .endif 3386 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3387 3388 3389 /* ------------------------------ */ 3390 .balign 128 3391 .L_op_long_to_int: /* 0x84 */ 3392 /* File: x86_64/op_long_to_int.S */ 3393 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 3394 /* File: x86_64/op_move.S */ 3395 /* for move, move-object, long-to-int */ 3396 /* op vA, vB */ 3397 movl rINST, %eax # eax <- BA 3398 andb $0xf, %al # eax <- A 3399 shrl $4, rINST # rINST <- B 3400 GET_VREG %edx, rINSTq 3401 .if 0 3402 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 3403 .else 3404 SET_VREG %edx, %rax # fp[A] <- fp[B] 3405 .endif 3406 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3407 3408 3409 /* ------------------------------ */ 3410 .balign 128 3411 .L_op_long_to_float: /* 0x85 */ 3412 /* File: x86_64/op_long_to_float.S */ 3413 /* File: x86_64/fpcvt.S */ 3414 /* 3415 * Generic 32-bit FP conversion operation. 3416 */ 3417 /* unop vA, vB */ 3418 movl rINST, %ecx # rcx <- A+ 3419 sarl $4, rINST # rINST <- B 3420 andb $0xf, %cl # ecx <- A 3421 cvtsi2ssq VREG_ADDRESS(rINSTq), %xmm0 3422 .if 0 3423 movsd %xmm0, VREG_ADDRESS(%rcx) 3424 CLEAR_WIDE_REF %rcx 3425 .else 3426 movss %xmm0, VREG_ADDRESS(%rcx) 3427 CLEAR_REF %rcx 3428 .endif 3429 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3430 3431 3432 /* ------------------------------ */ 3433 .balign 128 3434 .L_op_long_to_double: /* 0x86 */ 3435 /* File: x86_64/op_long_to_double.S */ 3436 /* File: x86_64/fpcvt.S */ 3437 /* 3438 * Generic 32-bit FP conversion operation. 3439 */ 3440 /* unop vA, vB */ 3441 movl rINST, %ecx # rcx <- A+ 3442 sarl $4, rINST # rINST <- B 3443 andb $0xf, %cl # ecx <- A 3444 cvtsi2sdq VREG_ADDRESS(rINSTq), %xmm0 3445 .if 1 3446 movsd %xmm0, VREG_ADDRESS(%rcx) 3447 CLEAR_WIDE_REF %rcx 3448 .else 3449 movss %xmm0, VREG_ADDRESS(%rcx) 3450 CLEAR_REF %rcx 3451 .endif 3452 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3453 3454 3455 /* ------------------------------ */ 3456 .balign 128 3457 .L_op_float_to_int: /* 0x87 */ 3458 /* File: x86_64/op_float_to_int.S */ 3459 /* File: x86_64/cvtfp_int.S */ 3460 /* On fp to int conversions, Java requires that 3461 * if the result > maxint, it should be clamped to maxint. If it is less 3462 * than minint, it should be clamped to minint. If it is a nan, the result 3463 * should be zero. Further, the rounding mode is to truncate. 3464 */ 3465 /* float/double to int/long vA, vB */ 3466 movl rINST, %ecx # rcx <- A+ 3467 sarl $4, rINST # rINST <- B 3468 andb $0xf, %cl # ecx <- A 3469 movss VREG_ADDRESS(rINSTq), %xmm0 3470 movl $0x7fffffff, %eax 3471 cvtsi2ssl %eax, %xmm1 3472 comiss %xmm1, %xmm0 3473 jae 1f 3474 jp 2f 3475 cvttss2sil %xmm0, %eax 3476 jmp 1f 3477 2: 3478 xorl %eax, %eax 3479 1: 3480 .if 0 3481 SET_WIDE_VREG %eax, %rcx 3482 .else 3483 SET_VREG %eax, %rcx 3484 .endif 3485 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3486 3487 3488 /* ------------------------------ */ 3489 .balign 128 3490 .L_op_float_to_long: /* 0x88 */ 3491 /* File: x86_64/op_float_to_long.S */ 3492 /* File: x86_64/cvtfp_int.S */ 3493 /* On fp to int conversions, Java requires that 3494 * if the result > maxint, it should be clamped to maxint. If it is less 3495 * than minint, it should be clamped to minint. If it is a nan, the result 3496 * should be zero. Further, the rounding mode is to truncate. 3497 */ 3498 /* float/double to int/long vA, vB */ 3499 movl rINST, %ecx # rcx <- A+ 3500 sarl $4, rINST # rINST <- B 3501 andb $0xf, %cl # ecx <- A 3502 movss VREG_ADDRESS(rINSTq), %xmm0 3503 movq $0x7fffffffffffffff, %rax 3504 cvtsi2ssq %rax, %xmm1 3505 comiss %xmm1, %xmm0 3506 jae 1f 3507 jp 2f 3508 cvttss2siq %xmm0, %rax 3509 jmp 1f 3510 2: 3511 xorq %rax, %rax 3512 1: 3513 .if 1 3514 SET_WIDE_VREG %rax, %rcx 3515 .else 3516 SET_VREG %rax, %rcx 3517 .endif 3518 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3519 3520 3521 /* ------------------------------ */ 3522 .balign 128 3523 .L_op_float_to_double: /* 0x89 */ 3524 /* File: x86_64/op_float_to_double.S */ 3525 /* File: x86_64/fpcvt.S */ 3526 /* 3527 * Generic 32-bit FP conversion operation. 3528 */ 3529 /* unop vA, vB */ 3530 movl rINST, %ecx # rcx <- A+ 3531 sarl $4, rINST # rINST <- B 3532 andb $0xf, %cl # ecx <- A 3533 cvtss2sd VREG_ADDRESS(rINSTq), %xmm0 3534 .if 1 3535 movsd %xmm0, VREG_ADDRESS(%rcx) 3536 CLEAR_WIDE_REF %rcx 3537 .else 3538 movss %xmm0, VREG_ADDRESS(%rcx) 3539 CLEAR_REF %rcx 3540 .endif 3541 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3542 3543 3544 /* ------------------------------ */ 3545 .balign 128 3546 .L_op_double_to_int: /* 0x8a */ 3547 /* File: x86_64/op_double_to_int.S */ 3548 /* File: x86_64/cvtfp_int.S */ 3549 /* On fp to int conversions, Java requires that 3550 * if the result > maxint, it should be clamped to maxint. If it is less 3551 * than minint, it should be clamped to minint. If it is a nan, the result 3552 * should be zero. Further, the rounding mode is to truncate. 3553 */ 3554 /* float/double to int/long vA, vB */ 3555 movl rINST, %ecx # rcx <- A+ 3556 sarl $4, rINST # rINST <- B 3557 andb $0xf, %cl # ecx <- A 3558 movsd VREG_ADDRESS(rINSTq), %xmm0 3559 movl $0x7fffffff, %eax 3560 cvtsi2sdl %eax, %xmm1 3561 comisd %xmm1, %xmm0 3562 jae 1f 3563 jp 2f 3564 cvttsd2sil %xmm0, %eax 3565 jmp 1f 3566 2: 3567 xorl %eax, %eax 3568 1: 3569 .if 0 3570 SET_WIDE_VREG %eax, %rcx 3571 .else 3572 SET_VREG %eax, %rcx 3573 .endif 3574 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3575 3576 3577 /* ------------------------------ */ 3578 .balign 128 3579 .L_op_double_to_long: /* 0x8b */ 3580 /* File: x86_64/op_double_to_long.S */ 3581 /* File: x86_64/cvtfp_int.S */ 3582 /* On fp to int conversions, Java requires that 3583 * if the result > maxint, it should be clamped to maxint. If it is less 3584 * than minint, it should be clamped to minint. If it is a nan, the result 3585 * should be zero. Further, the rounding mode is to truncate. 3586 */ 3587 /* float/double to int/long vA, vB */ 3588 movl rINST, %ecx # rcx <- A+ 3589 sarl $4, rINST # rINST <- B 3590 andb $0xf, %cl # ecx <- A 3591 movsd VREG_ADDRESS(rINSTq), %xmm0 3592 movq $0x7fffffffffffffff, %rax 3593 cvtsi2sdq %rax, %xmm1 3594 comisd %xmm1, %xmm0 3595 jae 1f 3596 jp 2f 3597 cvttsd2siq %xmm0, %rax 3598 jmp 1f 3599 2: 3600 xorq %rax, %rax 3601 1: 3602 .if 1 3603 SET_WIDE_VREG %rax, %rcx 3604 .else 3605 SET_VREG %rax, %rcx 3606 .endif 3607 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3608 3609 3610 /* ------------------------------ */ 3611 .balign 128 3612 .L_op_double_to_float: /* 0x8c */ 3613 /* File: x86_64/op_double_to_float.S */ 3614 /* File: x86_64/fpcvt.S */ 3615 /* 3616 * Generic 32-bit FP conversion operation. 3617 */ 3618 /* unop vA, vB */ 3619 movl rINST, %ecx # rcx <- A+ 3620 sarl $4, rINST # rINST <- B 3621 andb $0xf, %cl # ecx <- A 3622 cvtsd2ss VREG_ADDRESS(rINSTq), %xmm0 3623 .if 0 3624 movsd %xmm0, VREG_ADDRESS(%rcx) 3625 CLEAR_WIDE_REF %rcx 3626 .else 3627 movss %xmm0, VREG_ADDRESS(%rcx) 3628 CLEAR_REF %rcx 3629 .endif 3630 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3631 3632 3633 /* ------------------------------ */ 3634 .balign 128 3635 .L_op_int_to_byte: /* 0x8d */ 3636 /* File: x86_64/op_int_to_byte.S */ 3637 /* File: x86_64/unop.S */ 3638 /* 3639 * Generic 32/64-bit unary operation. Provide an "instr" line that 3640 * specifies an instruction that performs "result = op eax". 3641 */ 3642 /* unop vA, vB */ 3643 movl rINST, %ecx # rcx <- A+ 3644 sarl $4,rINST # rINST <- B 3645 .if 0 3646 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3647 .else 3648 GET_VREG %eax, rINSTq # eax <- vB 3649 .endif 3650 andb $0xf,%cl # ecx <- A 3651 3652 movsbl %al, %eax 3653 .if 0 3654 SET_WIDE_VREG %rax, %rcx 3655 .else 3656 SET_VREG %eax, %rcx 3657 .endif 3658 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3659 3660 3661 /* ------------------------------ */ 3662 .balign 128 3663 .L_op_int_to_char: /* 0x8e */ 3664 /* File: x86_64/op_int_to_char.S */ 3665 /* File: x86_64/unop.S */ 3666 /* 3667 * Generic 32/64-bit unary operation. Provide an "instr" line that 3668 * specifies an instruction that performs "result = op eax". 3669 */ 3670 /* unop vA, vB */ 3671 movl rINST, %ecx # rcx <- A+ 3672 sarl $4,rINST # rINST <- B 3673 .if 0 3674 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3675 .else 3676 GET_VREG %eax, rINSTq # eax <- vB 3677 .endif 3678 andb $0xf,%cl # ecx <- A 3679 3680 movzwl %ax,%eax 3681 .if 0 3682 SET_WIDE_VREG %rax, %rcx 3683 .else 3684 SET_VREG %eax, %rcx 3685 .endif 3686 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3687 3688 3689 /* ------------------------------ */ 3690 .balign 128 3691 .L_op_int_to_short: /* 0x8f */ 3692 /* File: x86_64/op_int_to_short.S */ 3693 /* File: x86_64/unop.S */ 3694 /* 3695 * Generic 32/64-bit unary operation. Provide an "instr" line that 3696 * specifies an instruction that performs "result = op eax". 3697 */ 3698 /* unop vA, vB */ 3699 movl rINST, %ecx # rcx <- A+ 3700 sarl $4,rINST # rINST <- B 3701 .if 0 3702 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3703 .else 3704 GET_VREG %eax, rINSTq # eax <- vB 3705 .endif 3706 andb $0xf,%cl # ecx <- A 3707 3708 movswl %ax, %eax 3709 .if 0 3710 SET_WIDE_VREG %rax, %rcx 3711 .else 3712 SET_VREG %eax, %rcx 3713 .endif 3714 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3715 3716 3717 /* ------------------------------ */ 3718 .balign 128 3719 .L_op_add_int: /* 0x90 */ 3720 /* File: x86_64/op_add_int.S */ 3721 /* File: x86_64/binop.S */ 3722 /* 3723 * Generic 32-bit binary operation. Provide an "instr" line that 3724 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3725 * This could be an x86 instruction or a function call. (If the result 3726 * comes back in a register other than eax, you can override "result".) 3727 * 3728 * For: add-int, sub-int, and-int, or-int, 3729 * xor-int, shl-int, shr-int, ushr-int 3730 */ 3731 /* binop vAA, vBB, vCC */ 3732 movzbq 2(rPC), %rax # rax <- BB 3733 movzbq 3(rPC), %rcx # rcx <- CC 3734 GET_VREG %eax, %rax # eax <- vBB 3735 addl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3736 SET_VREG %eax, rINSTq 3737 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3738 3739 3740 /* ------------------------------ */ 3741 .balign 128 3742 .L_op_sub_int: /* 0x91 */ 3743 /* File: x86_64/op_sub_int.S */ 3744 /* File: x86_64/binop.S */ 3745 /* 3746 * Generic 32-bit binary operation. Provide an "instr" line that 3747 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3748 * This could be an x86 instruction or a function call. (If the result 3749 * comes back in a register other than eax, you can override "result".) 3750 * 3751 * For: add-int, sub-int, and-int, or-int, 3752 * xor-int, shl-int, shr-int, ushr-int 3753 */ 3754 /* binop vAA, vBB, vCC */ 3755 movzbq 2(rPC), %rax # rax <- BB 3756 movzbq 3(rPC), %rcx # rcx <- CC 3757 GET_VREG %eax, %rax # eax <- vBB 3758 subl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3759 SET_VREG %eax, rINSTq 3760 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3761 3762 3763 /* ------------------------------ */ 3764 .balign 128 3765 .L_op_mul_int: /* 0x92 */ 3766 /* File: x86_64/op_mul_int.S */ 3767 /* File: x86_64/binop.S */ 3768 /* 3769 * Generic 32-bit binary operation. Provide an "instr" line that 3770 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3771 * This could be an x86 instruction or a function call. (If the result 3772 * comes back in a register other than eax, you can override "result".) 3773 * 3774 * For: add-int, sub-int, and-int, or-int, 3775 * xor-int, shl-int, shr-int, ushr-int 3776 */ 3777 /* binop vAA, vBB, vCC */ 3778 movzbq 2(rPC), %rax # rax <- BB 3779 movzbq 3(rPC), %rcx # rcx <- CC 3780 GET_VREG %eax, %rax # eax <- vBB 3781 imull (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3782 SET_VREG %eax, rINSTq 3783 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3784 3785 3786 /* ------------------------------ */ 3787 .balign 128 3788 .L_op_div_int: /* 0x93 */ 3789 /* File: x86_64/op_div_int.S */ 3790 /* File: x86_64/bindiv.S */ 3791 /* 3792 * 32-bit binary div/rem operation. Handles special case of op1=-1. 3793 */ 3794 /* div/rem vAA, vBB, vCC */ 3795 movzbq 2(rPC), %rax # rax <- BB 3796 movzbq 3(rPC), %rcx # rcx <- CC 3797 .if 0 3798 GET_WIDE_VREG %rax, %rax # eax <- vBB 3799 GET_WIDE_VREG %ecx, %rcx # ecx <- vCC 3800 .else 3801 GET_VREG %eax, %rax # eax <- vBB 3802 GET_VREG %ecx, %rcx # ecx <- vCC 3803 .endif 3804 testl %ecx, %ecx 3805 jz common_errDivideByZero 3806 cmpl $-1, %ecx 3807 je 2f 3808 cdq # rdx:rax <- sign-extended of rax 3809 idivl %ecx 3810 1: 3811 .if 0 3812 SET_WIDE_VREG %eax, rINSTq # eax <- vBB 3813 .else 3814 SET_VREG %eax, rINSTq # eax <- vBB 3815 .endif 3816 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3817 2: 3818 .if 0 3819 xorl %eax, %eax 3820 .else 3821 negl %eax 3822 .endif 3823 jmp 1b 3824 3825 3826 /* ------------------------------ */ 3827 .balign 128 3828 .L_op_rem_int: /* 0x94 */ 3829 /* File: x86_64/op_rem_int.S */ 3830 /* File: x86_64/bindiv.S */ 3831 /* 3832 * 32-bit binary div/rem operation. Handles special case of op1=-1. 3833 */ 3834 /* div/rem vAA, vBB, vCC */ 3835 movzbq 2(rPC), %rax # rax <- BB 3836 movzbq 3(rPC), %rcx # rcx <- CC 3837 .if 0 3838 GET_WIDE_VREG %rax, %rax # eax <- vBB 3839 GET_WIDE_VREG %ecx, %rcx # ecx <- vCC 3840 .else 3841 GET_VREG %eax, %rax # eax <- vBB 3842 GET_VREG %ecx, %rcx # ecx <- vCC 3843 .endif 3844 testl %ecx, %ecx 3845 jz common_errDivideByZero 3846 cmpl $-1, %ecx 3847 je 2f 3848 cdq # rdx:rax <- sign-extended of rax 3849 idivl %ecx 3850 1: 3851 .if 0 3852 SET_WIDE_VREG %edx, rINSTq # eax <- vBB 3853 .else 3854 SET_VREG %edx, rINSTq # eax <- vBB 3855 .endif 3856 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3857 2: 3858 .if 1 3859 xorl %edx, %edx 3860 .else 3861 negl %edx 3862 .endif 3863 jmp 1b 3864 3865 3866 /* ------------------------------ */ 3867 .balign 128 3868 .L_op_and_int: /* 0x95 */ 3869 /* File: x86_64/op_and_int.S */ 3870 /* File: x86_64/binop.S */ 3871 /* 3872 * Generic 32-bit binary operation. Provide an "instr" line that 3873 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3874 * This could be an x86 instruction or a function call. (If the result 3875 * comes back in a register other than eax, you can override "result".) 3876 * 3877 * For: add-int, sub-int, and-int, or-int, 3878 * xor-int, shl-int, shr-int, ushr-int 3879 */ 3880 /* binop vAA, vBB, vCC */ 3881 movzbq 2(rPC), %rax # rax <- BB 3882 movzbq 3(rPC), %rcx # rcx <- CC 3883 GET_VREG %eax, %rax # eax <- vBB 3884 andl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3885 SET_VREG %eax, rINSTq 3886 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3887 3888 3889 /* ------------------------------ */ 3890 .balign 128 3891 .L_op_or_int: /* 0x96 */ 3892 /* File: x86_64/op_or_int.S */ 3893 /* File: x86_64/binop.S */ 3894 /* 3895 * Generic 32-bit binary operation. Provide an "instr" line that 3896 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3897 * This could be an x86 instruction or a function call. (If the result 3898 * comes back in a register other than eax, you can override "result".) 3899 * 3900 * For: add-int, sub-int, and-int, or-int, 3901 * xor-int, shl-int, shr-int, ushr-int 3902 */ 3903 /* binop vAA, vBB, vCC */ 3904 movzbq 2(rPC), %rax # rax <- BB 3905 movzbq 3(rPC), %rcx # rcx <- CC 3906 GET_VREG %eax, %rax # eax <- vBB 3907 orl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3908 SET_VREG %eax, rINSTq 3909 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3910 3911 3912 /* ------------------------------ */ 3913 .balign 128 3914 .L_op_xor_int: /* 0x97 */ 3915 /* File: x86_64/op_xor_int.S */ 3916 /* File: x86_64/binop.S */ 3917 /* 3918 * Generic 32-bit binary operation. Provide an "instr" line that 3919 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3920 * This could be an x86 instruction or a function call. (If the result 3921 * comes back in a register other than eax, you can override "result".) 3922 * 3923 * For: add-int, sub-int, and-int, or-int, 3924 * xor-int, shl-int, shr-int, ushr-int 3925 */ 3926 /* binop vAA, vBB, vCC */ 3927 movzbq 2(rPC), %rax # rax <- BB 3928 movzbq 3(rPC), %rcx # rcx <- CC 3929 GET_VREG %eax, %rax # eax <- vBB 3930 xorl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3931 SET_VREG %eax, rINSTq 3932 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3933 3934 3935 /* ------------------------------ */ 3936 .balign 128 3937 .L_op_shl_int: /* 0x98 */ 3938 /* File: x86_64/op_shl_int.S */ 3939 /* File: x86_64/binop1.S */ 3940 /* 3941 * Generic 32-bit binary operation in which both operands loaded to 3942 * registers (op0 in eax, op1 in ecx). 3943 */ 3944 /* binop vAA, vBB, vCC */ 3945 movzbq 2(rPC), %rax # eax <- BB 3946 movzbq 3(rPC), %rcx # ecx <- CC 3947 GET_VREG %ecx, %rcx # eax <- vCC 3948 .if 0 3949 GET_WIDE_VREG %rax, %rax # rax <- vBB 3950 sall %cl, %eax # ex: addl %ecx,%eax 3951 SET_WIDE_VREG %rax, rINSTq 3952 .else 3953 GET_VREG %eax, %rax # eax <- vBB 3954 sall %cl, %eax # ex: addl %ecx,%eax 3955 SET_VREG %eax, rINSTq 3956 .endif 3957 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3958 3959 3960 /* ------------------------------ */ 3961 .balign 128 3962 .L_op_shr_int: /* 0x99 */ 3963 /* File: x86_64/op_shr_int.S */ 3964 /* File: x86_64/binop1.S */ 3965 /* 3966 * Generic 32-bit binary operation in which both operands loaded to 3967 * registers (op0 in eax, op1 in ecx). 3968 */ 3969 /* binop vAA, vBB, vCC */ 3970 movzbq 2(rPC), %rax # eax <- BB 3971 movzbq 3(rPC), %rcx # ecx <- CC 3972 GET_VREG %ecx, %rcx # eax <- vCC 3973 .if 0 3974 GET_WIDE_VREG %rax, %rax # rax <- vBB 3975 sarl %cl, %eax # ex: addl %ecx,%eax 3976 SET_WIDE_VREG %rax, rINSTq 3977 .else 3978 GET_VREG %eax, %rax # eax <- vBB 3979 sarl %cl, %eax # ex: addl %ecx,%eax 3980 SET_VREG %eax, rINSTq 3981 .endif 3982 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3983 3984 3985 /* ------------------------------ */ 3986 .balign 128 3987 .L_op_ushr_int: /* 0x9a */ 3988 /* File: x86_64/op_ushr_int.S */ 3989 /* File: x86_64/binop1.S */ 3990 /* 3991 * Generic 32-bit binary operation in which both operands loaded to 3992 * registers (op0 in eax, op1 in ecx). 3993 */ 3994 /* binop vAA, vBB, vCC */ 3995 movzbq 2(rPC), %rax # eax <- BB 3996 movzbq 3(rPC), %rcx # ecx <- CC 3997 GET_VREG %ecx, %rcx # eax <- vCC 3998 .if 0 3999 GET_WIDE_VREG %rax, %rax # rax <- vBB 4000 shrl %cl, %eax # ex: addl %ecx,%eax 4001 SET_WIDE_VREG %rax, rINSTq 4002 .else 4003 GET_VREG %eax, %rax # eax <- vBB 4004 shrl %cl, %eax # ex: addl %ecx,%eax 4005 SET_VREG %eax, rINSTq 4006 .endif 4007 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4008 4009 4010 /* ------------------------------ */ 4011 .balign 128 4012 .L_op_add_long: /* 0x9b */ 4013 /* File: x86_64/op_add_long.S */ 4014 /* File: x86_64/binopWide.S */ 4015 /* 4016 * Generic 64-bit binary operation. 4017 */ 4018 /* binop vAA, vBB, vCC */ 4019 movzbq 2(rPC), %rax # eax <- BB 4020 movzbq 3(rPC), %rcx # ecx <- CC 4021 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4022 addq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4023 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4024 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4025 4026 4027 /* ------------------------------ */ 4028 .balign 128 4029 .L_op_sub_long: /* 0x9c */ 4030 /* File: x86_64/op_sub_long.S */ 4031 /* File: x86_64/binopWide.S */ 4032 /* 4033 * Generic 64-bit binary operation. 4034 */ 4035 /* binop vAA, vBB, vCC */ 4036 movzbq 2(rPC), %rax # eax <- BB 4037 movzbq 3(rPC), %rcx # ecx <- CC 4038 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4039 subq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4040 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4041 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4042 4043 4044 /* ------------------------------ */ 4045 .balign 128 4046 .L_op_mul_long: /* 0x9d */ 4047 /* File: x86_64/op_mul_long.S */ 4048 /* File: x86_64/binopWide.S */ 4049 /* 4050 * Generic 64-bit binary operation. 4051 */ 4052 /* binop vAA, vBB, vCC */ 4053 movzbq 2(rPC), %rax # eax <- BB 4054 movzbq 3(rPC), %rcx # ecx <- CC 4055 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4056 imulq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4057 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4058 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4059 4060 4061 /* ------------------------------ */ 4062 .balign 128 4063 .L_op_div_long: /* 0x9e */ 4064 /* File: x86_64/op_div_long.S */ 4065 /* File: x86_64/bindiv.S */ 4066 /* 4067 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4068 */ 4069 /* div/rem vAA, vBB, vCC */ 4070 movzbq 2(rPC), %rax # rax <- BB 4071 movzbq 3(rPC), %rcx # rcx <- CC 4072 .if 1 4073 GET_WIDE_VREG %rax, %rax # eax <- vBB 4074 GET_WIDE_VREG %rcx, %rcx # ecx <- vCC 4075 .else 4076 GET_VREG %eax, %rax # eax <- vBB 4077 GET_VREG %rcx, %rcx # ecx <- vCC 4078 .endif 4079 testq %rcx, %rcx 4080 jz common_errDivideByZero 4081 cmpq $-1, %rcx 4082 je 2f 4083 cqo # rdx:rax <- sign-extended of rax 4084 idivq %rcx 4085 1: 4086 .if 1 4087 SET_WIDE_VREG %rax, rINSTq # eax <- vBB 4088 .else 4089 SET_VREG %rax, rINSTq # eax <- vBB 4090 .endif 4091 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4092 2: 4093 .if 0 4094 xorq %rax, %rax 4095 .else 4096 negq %rax 4097 .endif 4098 jmp 1b 4099 4100 4101 /* ------------------------------ */ 4102 .balign 128 4103 .L_op_rem_long: /* 0x9f */ 4104 /* File: x86_64/op_rem_long.S */ 4105 /* File: x86_64/bindiv.S */ 4106 /* 4107 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4108 */ 4109 /* div/rem vAA, vBB, vCC */ 4110 movzbq 2(rPC), %rax # rax <- BB 4111 movzbq 3(rPC), %rcx # rcx <- CC 4112 .if 1 4113 GET_WIDE_VREG %rax, %rax # eax <- vBB 4114 GET_WIDE_VREG %rcx, %rcx # ecx <- vCC 4115 .else 4116 GET_VREG %eax, %rax # eax <- vBB 4117 GET_VREG %rcx, %rcx # ecx <- vCC 4118 .endif 4119 testq %rcx, %rcx 4120 jz common_errDivideByZero 4121 cmpq $-1, %rcx 4122 je 2f 4123 cqo # rdx:rax <- sign-extended of rax 4124 idivq %rcx 4125 1: 4126 .if 1 4127 SET_WIDE_VREG %rdx, rINSTq # eax <- vBB 4128 .else 4129 SET_VREG %rdx, rINSTq # eax <- vBB 4130 .endif 4131 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4132 2: 4133 .if 1 4134 xorq %rdx, %rdx 4135 .else 4136 negq %rdx 4137 .endif 4138 jmp 1b 4139 4140 4141 /* ------------------------------ */ 4142 .balign 128 4143 .L_op_and_long: /* 0xa0 */ 4144 /* File: x86_64/op_and_long.S */ 4145 /* File: x86_64/binopWide.S */ 4146 /* 4147 * Generic 64-bit binary operation. 4148 */ 4149 /* binop vAA, vBB, vCC */ 4150 movzbq 2(rPC), %rax # eax <- BB 4151 movzbq 3(rPC), %rcx # ecx <- CC 4152 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4153 andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4154 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4155 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4156 4157 4158 /* ------------------------------ */ 4159 .balign 128 4160 .L_op_or_long: /* 0xa1 */ 4161 /* File: x86_64/op_or_long.S */ 4162 /* File: x86_64/binopWide.S */ 4163 /* 4164 * Generic 64-bit binary operation. 4165 */ 4166 /* binop vAA, vBB, vCC */ 4167 movzbq 2(rPC), %rax # eax <- BB 4168 movzbq 3(rPC), %rcx # ecx <- CC 4169 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4170 orq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4171 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4172 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4173 4174 4175 /* ------------------------------ */ 4176 .balign 128 4177 .L_op_xor_long: /* 0xa2 */ 4178 /* File: x86_64/op_xor_long.S */ 4179 /* File: x86_64/binopWide.S */ 4180 /* 4181 * Generic 64-bit binary operation. 4182 */ 4183 /* binop vAA, vBB, vCC */ 4184 movzbq 2(rPC), %rax # eax <- BB 4185 movzbq 3(rPC), %rcx # ecx <- CC 4186 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4187 xorq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4188 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4189 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4190 4191 4192 /* ------------------------------ */ 4193 .balign 128 4194 .L_op_shl_long: /* 0xa3 */ 4195 /* File: x86_64/op_shl_long.S */ 4196 /* File: x86_64/binop1.S */ 4197 /* 4198 * Generic 32-bit binary operation in which both operands loaded to 4199 * registers (op0 in eax, op1 in ecx). 4200 */ 4201 /* binop vAA, vBB, vCC */ 4202 movzbq 2(rPC), %rax # eax <- BB 4203 movzbq 3(rPC), %rcx # ecx <- CC 4204 GET_VREG %ecx, %rcx # eax <- vCC 4205 .if 1 4206 GET_WIDE_VREG %rax, %rax # rax <- vBB 4207 salq %cl, %rax # ex: addl %ecx,%eax 4208 SET_WIDE_VREG %rax, rINSTq 4209 .else 4210 GET_VREG %eax, %rax # eax <- vBB 4211 salq %cl, %rax # ex: addl %ecx,%eax 4212 SET_VREG %eax, rINSTq 4213 .endif 4214 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4215 4216 4217 /* ------------------------------ */ 4218 .balign 128 4219 .L_op_shr_long: /* 0xa4 */ 4220 /* File: x86_64/op_shr_long.S */ 4221 /* File: x86_64/binop1.S */ 4222 /* 4223 * Generic 32-bit binary operation in which both operands loaded to 4224 * registers (op0 in eax, op1 in ecx). 4225 */ 4226 /* binop vAA, vBB, vCC */ 4227 movzbq 2(rPC), %rax # eax <- BB 4228 movzbq 3(rPC), %rcx # ecx <- CC 4229 GET_VREG %ecx, %rcx # eax <- vCC 4230 .if 1 4231 GET_WIDE_VREG %rax, %rax # rax <- vBB 4232 sarq %cl, %rax # ex: addl %ecx,%eax 4233 SET_WIDE_VREG %rax, rINSTq 4234 .else 4235 GET_VREG %eax, %rax # eax <- vBB 4236 sarq %cl, %rax # ex: addl %ecx,%eax 4237 SET_VREG %eax, rINSTq 4238 .endif 4239 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4240 4241 4242 /* ------------------------------ */ 4243 .balign 128 4244 .L_op_ushr_long: /* 0xa5 */ 4245 /* File: x86_64/op_ushr_long.S */ 4246 /* File: x86_64/binop1.S */ 4247 /* 4248 * Generic 32-bit binary operation in which both operands loaded to 4249 * registers (op0 in eax, op1 in ecx). 4250 */ 4251 /* binop vAA, vBB, vCC */ 4252 movzbq 2(rPC), %rax # eax <- BB 4253 movzbq 3(rPC), %rcx # ecx <- CC 4254 GET_VREG %ecx, %rcx # eax <- vCC 4255 .if 1 4256 GET_WIDE_VREG %rax, %rax # rax <- vBB 4257 shrq %cl, %rax # ex: addl %ecx,%eax 4258 SET_WIDE_VREG %rax, rINSTq 4259 .else 4260 GET_VREG %eax, %rax # eax <- vBB 4261 shrq %cl, %rax # ex: addl %ecx,%eax 4262 SET_VREG %eax, rINSTq 4263 .endif 4264 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4265 4266 4267 /* ------------------------------ */ 4268 .balign 128 4269 .L_op_add_float: /* 0xa6 */ 4270 /* File: x86_64/op_add_float.S */ 4271 /* File: x86_64/sseBinop.S */ 4272 movzbq 2(rPC), %rcx # ecx <- BB 4273 movzbq 3(rPC), %rax # eax <- CC 4274 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4275 addss VREG_ADDRESS(%rax), %xmm0 4276 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4277 pxor %xmm0, %xmm0 4278 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4279 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4280 4281 4282 /* ------------------------------ */ 4283 .balign 128 4284 .L_op_sub_float: /* 0xa7 */ 4285 /* File: x86_64/op_sub_float.S */ 4286 /* File: x86_64/sseBinop.S */ 4287 movzbq 2(rPC), %rcx # ecx <- BB 4288 movzbq 3(rPC), %rax # eax <- CC 4289 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4290 subss VREG_ADDRESS(%rax), %xmm0 4291 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4292 pxor %xmm0, %xmm0 4293 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4294 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4295 4296 4297 /* ------------------------------ */ 4298 .balign 128 4299 .L_op_mul_float: /* 0xa8 */ 4300 /* File: x86_64/op_mul_float.S */ 4301 /* File: x86_64/sseBinop.S */ 4302 movzbq 2(rPC), %rcx # ecx <- BB 4303 movzbq 3(rPC), %rax # eax <- CC 4304 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4305 mulss VREG_ADDRESS(%rax), %xmm0 4306 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4307 pxor %xmm0, %xmm0 4308 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4309 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4310 4311 4312 /* ------------------------------ */ 4313 .balign 128 4314 .L_op_div_float: /* 0xa9 */ 4315 /* File: x86_64/op_div_float.S */ 4316 /* File: x86_64/sseBinop.S */ 4317 movzbq 2(rPC), %rcx # ecx <- BB 4318 movzbq 3(rPC), %rax # eax <- CC 4319 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4320 divss VREG_ADDRESS(%rax), %xmm0 4321 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4322 pxor %xmm0, %xmm0 4323 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4324 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4325 4326 4327 /* ------------------------------ */ 4328 .balign 128 4329 .L_op_rem_float: /* 0xaa */ 4330 /* File: x86_64/op_rem_float.S */ 4331 /* rem_float vAA, vBB, vCC */ 4332 movzbq 3(rPC), %rcx # ecx <- BB 4333 movzbq 2(rPC), %rax # eax <- CC 4334 flds VREG_ADDRESS(%rcx) # vBB to fp stack 4335 flds VREG_ADDRESS(%rax) # vCC to fp stack 4336 1: 4337 fprem 4338 fstsw %ax 4339 sahf 4340 jp 1b 4341 fstp %st(1) 4342 fstps VREG_ADDRESS(rINSTq) # %st to vAA 4343 CLEAR_REF rINSTq 4344 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4345 4346 /* ------------------------------ */ 4347 .balign 128 4348 .L_op_add_double: /* 0xab */ 4349 /* File: x86_64/op_add_double.S */ 4350 /* File: x86_64/sseBinop.S */ 4351 movzbq 2(rPC), %rcx # ecx <- BB 4352 movzbq 3(rPC), %rax # eax <- CC 4353 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4354 addsd VREG_ADDRESS(%rax), %xmm0 4355 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4356 pxor %xmm0, %xmm0 4357 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4358 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4359 4360 4361 /* ------------------------------ */ 4362 .balign 128 4363 .L_op_sub_double: /* 0xac */ 4364 /* File: x86_64/op_sub_double.S */ 4365 /* File: x86_64/sseBinop.S */ 4366 movzbq 2(rPC), %rcx # ecx <- BB 4367 movzbq 3(rPC), %rax # eax <- CC 4368 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4369 subsd VREG_ADDRESS(%rax), %xmm0 4370 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4371 pxor %xmm0, %xmm0 4372 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4373 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4374 4375 4376 /* ------------------------------ */ 4377 .balign 128 4378 .L_op_mul_double: /* 0xad */ 4379 /* File: x86_64/op_mul_double.S */ 4380 /* File: x86_64/sseBinop.S */ 4381 movzbq 2(rPC), %rcx # ecx <- BB 4382 movzbq 3(rPC), %rax # eax <- CC 4383 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4384 mulsd VREG_ADDRESS(%rax), %xmm0 4385 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4386 pxor %xmm0, %xmm0 4387 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4388 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4389 4390 4391 /* ------------------------------ */ 4392 .balign 128 4393 .L_op_div_double: /* 0xae */ 4394 /* File: x86_64/op_div_double.S */ 4395 /* File: x86_64/sseBinop.S */ 4396 movzbq 2(rPC), %rcx # ecx <- BB 4397 movzbq 3(rPC), %rax # eax <- CC 4398 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4399 divsd VREG_ADDRESS(%rax), %xmm0 4400 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4401 pxor %xmm0, %xmm0 4402 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4403 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4404 4405 4406 /* ------------------------------ */ 4407 .balign 128 4408 .L_op_rem_double: /* 0xaf */ 4409 /* File: x86_64/op_rem_double.S */ 4410 /* rem_double vAA, vBB, vCC */ 4411 movzbq 3(rPC), %rcx # ecx <- BB 4412 movzbq 2(rPC), %rax # eax <- CC 4413 fldl VREG_ADDRESS(%rcx) # %st1 <- fp[vBB] 4414 fldl VREG_ADDRESS(%rax) # %st0 <- fp[vCC] 4415 1: 4416 fprem 4417 fstsw %ax 4418 sahf 4419 jp 1b 4420 fstp %st(1) 4421 fstpl VREG_ADDRESS(rINSTq) # fp[vAA] <- %st 4422 CLEAR_WIDE_REF rINSTq 4423 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4424 4425 /* ------------------------------ */ 4426 .balign 128 4427 .L_op_add_int_2addr: /* 0xb0 */ 4428 /* File: x86_64/op_add_int_2addr.S */ 4429 /* File: x86_64/binop2addr.S */ 4430 /* 4431 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4432 * that specifies an instruction that performs "result = r0 op r1". 4433 * This could be an instruction or a function call. 4434 * 4435 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4436 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4437 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4438 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4439 */ 4440 /* binop/2addr vA, vB */ 4441 movl rINST, %ecx # rcx <- A+ 4442 sarl $4, rINST # rINST <- B 4443 andb $0xf, %cl # ecx <- A 4444 GET_VREG %eax, rINSTq # eax <- vB 4445 addl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4446 CLEAR_REF %rcx 4447 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4448 4449 4450 /* ------------------------------ */ 4451 .balign 128 4452 .L_op_sub_int_2addr: /* 0xb1 */ 4453 /* File: x86_64/op_sub_int_2addr.S */ 4454 /* File: x86_64/binop2addr.S */ 4455 /* 4456 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4457 * that specifies an instruction that performs "result = r0 op r1". 4458 * This could be an instruction or a function call. 4459 * 4460 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4461 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4462 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4463 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4464 */ 4465 /* binop/2addr vA, vB */ 4466 movl rINST, %ecx # rcx <- A+ 4467 sarl $4, rINST # rINST <- B 4468 andb $0xf, %cl # ecx <- A 4469 GET_VREG %eax, rINSTq # eax <- vB 4470 subl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4471 CLEAR_REF %rcx 4472 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4473 4474 4475 /* ------------------------------ */ 4476 .balign 128 4477 .L_op_mul_int_2addr: /* 0xb2 */ 4478 /* File: x86_64/op_mul_int_2addr.S */ 4479 /* mul vA, vB */ 4480 movl rINST, %ecx # rcx <- A+ 4481 sarl $4, rINST # rINST <- B 4482 andb $0xf, %cl # ecx <- A 4483 GET_VREG %eax, %rcx # eax <- vA 4484 imull (rFP,rINSTq,4), %eax 4485 SET_VREG %eax, %rcx 4486 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4487 4488 /* ------------------------------ */ 4489 .balign 128 4490 .L_op_div_int_2addr: /* 0xb3 */ 4491 /* File: x86_64/op_div_int_2addr.S */ 4492 /* File: x86_64/bindiv2addr.S */ 4493 /* 4494 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4495 */ 4496 /* div/rem/2addr vA, vB */ 4497 movl rINST, %ecx # rcx <- BA 4498 sarl $4, %ecx # rcx <- B 4499 andb $0xf, rINSTbl # rINST <- A 4500 .if 0 4501 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4502 GET_WIDE_VREG %ecx, %rcx # ecx <- vB 4503 .else 4504 GET_VREG %eax, rINSTq # eax <- vA 4505 GET_VREG %ecx, %rcx # ecx <- vB 4506 .endif 4507 testl %ecx, %ecx 4508 jz common_errDivideByZero 4509 cmpl $-1, %ecx 4510 je 2f 4511 cdq # rdx:rax <- sign-extended of rax 4512 idivl %ecx 4513 1: 4514 .if 0 4515 SET_WIDE_VREG %eax, rINSTq # vA <- result 4516 .else 4517 SET_VREG %eax, rINSTq # vA <- result 4518 .endif 4519 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4520 2: 4521 .if 0 4522 xorl %eax, %eax 4523 .else 4524 negl %eax 4525 .endif 4526 jmp 1b 4527 4528 4529 /* ------------------------------ */ 4530 .balign 128 4531 .L_op_rem_int_2addr: /* 0xb4 */ 4532 /* File: x86_64/op_rem_int_2addr.S */ 4533 /* File: x86_64/bindiv2addr.S */ 4534 /* 4535 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4536 */ 4537 /* div/rem/2addr vA, vB */ 4538 movl rINST, %ecx # rcx <- BA 4539 sarl $4, %ecx # rcx <- B 4540 andb $0xf, rINSTbl # rINST <- A 4541 .if 0 4542 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4543 GET_WIDE_VREG %ecx, %rcx # ecx <- vB 4544 .else 4545 GET_VREG %eax, rINSTq # eax <- vA 4546 GET_VREG %ecx, %rcx # ecx <- vB 4547 .endif 4548 testl %ecx, %ecx 4549 jz common_errDivideByZero 4550 cmpl $-1, %ecx 4551 je 2f 4552 cdq # rdx:rax <- sign-extended of rax 4553 idivl %ecx 4554 1: 4555 .if 0 4556 SET_WIDE_VREG %edx, rINSTq # vA <- result 4557 .else 4558 SET_VREG %edx, rINSTq # vA <- result 4559 .endif 4560 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4561 2: 4562 .if 1 4563 xorl %edx, %edx 4564 .else 4565 negl %edx 4566 .endif 4567 jmp 1b 4568 4569 4570 /* ------------------------------ */ 4571 .balign 128 4572 .L_op_and_int_2addr: /* 0xb5 */ 4573 /* File: x86_64/op_and_int_2addr.S */ 4574 /* File: x86_64/binop2addr.S */ 4575 /* 4576 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4577 * that specifies an instruction that performs "result = r0 op r1". 4578 * This could be an instruction or a function call. 4579 * 4580 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4581 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4582 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4583 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4584 */ 4585 /* binop/2addr vA, vB */ 4586 movl rINST, %ecx # rcx <- A+ 4587 sarl $4, rINST # rINST <- B 4588 andb $0xf, %cl # ecx <- A 4589 GET_VREG %eax, rINSTq # eax <- vB 4590 andl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4591 CLEAR_REF %rcx 4592 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4593 4594 4595 /* ------------------------------ */ 4596 .balign 128 4597 .L_op_or_int_2addr: /* 0xb6 */ 4598 /* File: x86_64/op_or_int_2addr.S */ 4599 /* File: x86_64/binop2addr.S */ 4600 /* 4601 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4602 * that specifies an instruction that performs "result = r0 op r1". 4603 * This could be an instruction or a function call. 4604 * 4605 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4606 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4607 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4608 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4609 */ 4610 /* binop/2addr vA, vB */ 4611 movl rINST, %ecx # rcx <- A+ 4612 sarl $4, rINST # rINST <- B 4613 andb $0xf, %cl # ecx <- A 4614 GET_VREG %eax, rINSTq # eax <- vB 4615 orl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4616 CLEAR_REF %rcx 4617 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4618 4619 4620 /* ------------------------------ */ 4621 .balign 128 4622 .L_op_xor_int_2addr: /* 0xb7 */ 4623 /* File: x86_64/op_xor_int_2addr.S */ 4624 /* File: x86_64/binop2addr.S */ 4625 /* 4626 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4627 * that specifies an instruction that performs "result = r0 op r1". 4628 * This could be an instruction or a function call. 4629 * 4630 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4631 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4632 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4633 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4634 */ 4635 /* binop/2addr vA, vB */ 4636 movl rINST, %ecx # rcx <- A+ 4637 sarl $4, rINST # rINST <- B 4638 andb $0xf, %cl # ecx <- A 4639 GET_VREG %eax, rINSTq # eax <- vB 4640 xorl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4641 CLEAR_REF %rcx 4642 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4643 4644 4645 /* ------------------------------ */ 4646 .balign 128 4647 .L_op_shl_int_2addr: /* 0xb8 */ 4648 /* File: x86_64/op_shl_int_2addr.S */ 4649 /* File: x86_64/shop2addr.S */ 4650 /* 4651 * Generic 32-bit "shift/2addr" operation. 4652 */ 4653 /* shift/2addr vA, vB */ 4654 movl rINST, %ecx # ecx <- BA 4655 sarl $4, %ecx # ecx <- B 4656 GET_VREG %ecx, %rcx # ecx <- vBB 4657 andb $0xf, rINSTbl # rINST <- A 4658 .if 0 4659 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4660 sall %cl, %eax # ex: sarl %cl, %eax 4661 SET_WIDE_VREG %rax, rINSTq 4662 .else 4663 GET_VREG %eax, rINSTq # eax <- vAA 4664 sall %cl, %eax # ex: sarl %cl, %eax 4665 SET_VREG %eax, rINSTq 4666 .endif 4667 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4668 4669 4670 /* ------------------------------ */ 4671 .balign 128 4672 .L_op_shr_int_2addr: /* 0xb9 */ 4673 /* File: x86_64/op_shr_int_2addr.S */ 4674 /* File: x86_64/shop2addr.S */ 4675 /* 4676 * Generic 32-bit "shift/2addr" operation. 4677 */ 4678 /* shift/2addr vA, vB */ 4679 movl rINST, %ecx # ecx <- BA 4680 sarl $4, %ecx # ecx <- B 4681 GET_VREG %ecx, %rcx # ecx <- vBB 4682 andb $0xf, rINSTbl # rINST <- A 4683 .if 0 4684 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4685 sarl %cl, %eax # ex: sarl %cl, %eax 4686 SET_WIDE_VREG %rax, rINSTq 4687 .else 4688 GET_VREG %eax, rINSTq # eax <- vAA 4689 sarl %cl, %eax # ex: sarl %cl, %eax 4690 SET_VREG %eax, rINSTq 4691 .endif 4692 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4693 4694 4695 /* ------------------------------ */ 4696 .balign 128 4697 .L_op_ushr_int_2addr: /* 0xba */ 4698 /* File: x86_64/op_ushr_int_2addr.S */ 4699 /* File: x86_64/shop2addr.S */ 4700 /* 4701 * Generic 32-bit "shift/2addr" operation. 4702 */ 4703 /* shift/2addr vA, vB */ 4704 movl rINST, %ecx # ecx <- BA 4705 sarl $4, %ecx # ecx <- B 4706 GET_VREG %ecx, %rcx # ecx <- vBB 4707 andb $0xf, rINSTbl # rINST <- A 4708 .if 0 4709 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4710 shrl %cl, %eax # ex: sarl %cl, %eax 4711 SET_WIDE_VREG %rax, rINSTq 4712 .else 4713 GET_VREG %eax, rINSTq # eax <- vAA 4714 shrl %cl, %eax # ex: sarl %cl, %eax 4715 SET_VREG %eax, rINSTq 4716 .endif 4717 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4718 4719 4720 /* ------------------------------ */ 4721 .balign 128 4722 .L_op_add_long_2addr: /* 0xbb */ 4723 /* File: x86_64/op_add_long_2addr.S */ 4724 /* File: x86_64/binopWide2addr.S */ 4725 /* 4726 * Generic 64-bit binary operation. 4727 */ 4728 /* binop/2addr vA, vB */ 4729 movl rINST, %ecx # rcx <- A+ 4730 sarl $4, rINST # rINST <- B 4731 andb $0xf, %cl # ecx <- A 4732 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4733 addq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4734 CLEAR_WIDE_REF %rcx 4735 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4736 4737 4738 /* ------------------------------ */ 4739 .balign 128 4740 .L_op_sub_long_2addr: /* 0xbc */ 4741 /* File: x86_64/op_sub_long_2addr.S */ 4742 /* File: x86_64/binopWide2addr.S */ 4743 /* 4744 * Generic 64-bit binary operation. 4745 */ 4746 /* binop/2addr vA, vB */ 4747 movl rINST, %ecx # rcx <- A+ 4748 sarl $4, rINST # rINST <- B 4749 andb $0xf, %cl # ecx <- A 4750 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4751 subq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4752 CLEAR_WIDE_REF %rcx 4753 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4754 4755 4756 /* ------------------------------ */ 4757 .balign 128 4758 .L_op_mul_long_2addr: /* 0xbd */ 4759 /* File: x86_64/op_mul_long_2addr.S */ 4760 /* mul vA, vB */ 4761 movl rINST, %ecx # rcx <- A+ 4762 sarl $4, rINST # rINST <- B 4763 andb $0xf, %cl # ecx <- A 4764 GET_WIDE_VREG %rax, %rcx # rax <- vA 4765 imulq (rFP,rINSTq,4), %rax 4766 SET_WIDE_VREG %rax, %rcx 4767 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4768 4769 /* ------------------------------ */ 4770 .balign 128 4771 .L_op_div_long_2addr: /* 0xbe */ 4772 /* File: x86_64/op_div_long_2addr.S */ 4773 /* File: x86_64/bindiv2addr.S */ 4774 /* 4775 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4776 */ 4777 /* div/rem/2addr vA, vB */ 4778 movl rINST, %ecx # rcx <- BA 4779 sarl $4, %ecx # rcx <- B 4780 andb $0xf, rINSTbl # rINST <- A 4781 .if 1 4782 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4783 GET_WIDE_VREG %rcx, %rcx # ecx <- vB 4784 .else 4785 GET_VREG %eax, rINSTq # eax <- vA 4786 GET_VREG %rcx, %rcx # ecx <- vB 4787 .endif 4788 testq %rcx, %rcx 4789 jz common_errDivideByZero 4790 cmpq $-1, %rcx 4791 je 2f 4792 cqo # rdx:rax <- sign-extended of rax 4793 idivq %rcx 4794 1: 4795 .if 1 4796 SET_WIDE_VREG %rax, rINSTq # vA <- result 4797 .else 4798 SET_VREG %rax, rINSTq # vA <- result 4799 .endif 4800 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4801 2: 4802 .if 0 4803 xorq %rax, %rax 4804 .else 4805 negq %rax 4806 .endif 4807 jmp 1b 4808 4809 4810 /* ------------------------------ */ 4811 .balign 128 4812 .L_op_rem_long_2addr: /* 0xbf */ 4813 /* File: x86_64/op_rem_long_2addr.S */ 4814 /* File: x86_64/bindiv2addr.S */ 4815 /* 4816 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4817 */ 4818 /* div/rem/2addr vA, vB */ 4819 movl rINST, %ecx # rcx <- BA 4820 sarl $4, %ecx # rcx <- B 4821 andb $0xf, rINSTbl # rINST <- A 4822 .if 1 4823 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4824 GET_WIDE_VREG %rcx, %rcx # ecx <- vB 4825 .else 4826 GET_VREG %eax, rINSTq # eax <- vA 4827 GET_VREG %rcx, %rcx # ecx <- vB 4828 .endif 4829 testq %rcx, %rcx 4830 jz common_errDivideByZero 4831 cmpq $-1, %rcx 4832 je 2f 4833 cqo # rdx:rax <- sign-extended of rax 4834 idivq %rcx 4835 1: 4836 .if 1 4837 SET_WIDE_VREG %rdx, rINSTq # vA <- result 4838 .else 4839 SET_VREG %rdx, rINSTq # vA <- result 4840 .endif 4841 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4842 2: 4843 .if 1 4844 xorq %rdx, %rdx 4845 .else 4846 negq %rdx 4847 .endif 4848 jmp 1b 4849 4850 4851 /* ------------------------------ */ 4852 .balign 128 4853 .L_op_and_long_2addr: /* 0xc0 */ 4854 /* File: x86_64/op_and_long_2addr.S */ 4855 /* File: x86_64/binopWide2addr.S */ 4856 /* 4857 * Generic 64-bit binary operation. 4858 */ 4859 /* binop/2addr vA, vB */ 4860 movl rINST, %ecx # rcx <- A+ 4861 sarl $4, rINST # rINST <- B 4862 andb $0xf, %cl # ecx <- A 4863 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4864 andq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4865 CLEAR_WIDE_REF %rcx 4866 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4867 4868 4869 /* ------------------------------ */ 4870 .balign 128 4871 .L_op_or_long_2addr: /* 0xc1 */ 4872 /* File: x86_64/op_or_long_2addr.S */ 4873 /* File: x86_64/binopWide2addr.S */ 4874 /* 4875 * Generic 64-bit binary operation. 4876 */ 4877 /* binop/2addr vA, vB */ 4878 movl rINST, %ecx # rcx <- A+ 4879 sarl $4, rINST # rINST <- B 4880 andb $0xf, %cl # ecx <- A 4881 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4882 orq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4883 CLEAR_WIDE_REF %rcx 4884 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4885 4886 4887 /* ------------------------------ */ 4888 .balign 128 4889 .L_op_xor_long_2addr: /* 0xc2 */ 4890 /* File: x86_64/op_xor_long_2addr.S */ 4891 /* File: x86_64/binopWide2addr.S */ 4892 /* 4893 * Generic 64-bit binary operation. 4894 */ 4895 /* binop/2addr vA, vB */ 4896 movl rINST, %ecx # rcx <- A+ 4897 sarl $4, rINST # rINST <- B 4898 andb $0xf, %cl # ecx <- A 4899 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4900 xorq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4901 CLEAR_WIDE_REF %rcx 4902 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4903 4904 4905 /* ------------------------------ */ 4906 .balign 128 4907 .L_op_shl_long_2addr: /* 0xc3 */ 4908 /* File: x86_64/op_shl_long_2addr.S */ 4909 /* File: x86_64/shop2addr.S */ 4910 /* 4911 * Generic 32-bit "shift/2addr" operation. 4912 */ 4913 /* shift/2addr vA, vB */ 4914 movl rINST, %ecx # ecx <- BA 4915 sarl $4, %ecx # ecx <- B 4916 GET_VREG %ecx, %rcx # ecx <- vBB 4917 andb $0xf, rINSTbl # rINST <- A 4918 .if 1 4919 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4920 salq %cl, %rax # ex: sarl %cl, %eax 4921 SET_WIDE_VREG %rax, rINSTq 4922 .else 4923 GET_VREG %eax, rINSTq # eax <- vAA 4924 salq %cl, %rax # ex: sarl %cl, %eax 4925 SET_VREG %eax, rINSTq 4926 .endif 4927 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4928 4929 4930 /* ------------------------------ */ 4931 .balign 128 4932 .L_op_shr_long_2addr: /* 0xc4 */ 4933 /* File: x86_64/op_shr_long_2addr.S */ 4934 /* File: x86_64/shop2addr.S */ 4935 /* 4936 * Generic 32-bit "shift/2addr" operation. 4937 */ 4938 /* shift/2addr vA, vB */ 4939 movl rINST, %ecx # ecx <- BA 4940 sarl $4, %ecx # ecx <- B 4941 GET_VREG %ecx, %rcx # ecx <- vBB 4942 andb $0xf, rINSTbl # rINST <- A 4943 .if 1 4944 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4945 sarq %cl, %rax # ex: sarl %cl, %eax 4946 SET_WIDE_VREG %rax, rINSTq 4947 .else 4948 GET_VREG %eax, rINSTq # eax <- vAA 4949 sarq %cl, %rax # ex: sarl %cl, %eax 4950 SET_VREG %eax, rINSTq 4951 .endif 4952 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4953 4954 4955 /* ------------------------------ */ 4956 .balign 128 4957 .L_op_ushr_long_2addr: /* 0xc5 */ 4958 /* File: x86_64/op_ushr_long_2addr.S */ 4959 /* File: x86_64/shop2addr.S */ 4960 /* 4961 * Generic 32-bit "shift/2addr" operation. 4962 */ 4963 /* shift/2addr vA, vB */ 4964 movl rINST, %ecx # ecx <- BA 4965 sarl $4, %ecx # ecx <- B 4966 GET_VREG %ecx, %rcx # ecx <- vBB 4967 andb $0xf, rINSTbl # rINST <- A 4968 .if 1 4969 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4970 shrq %cl, %rax # ex: sarl %cl, %eax 4971 SET_WIDE_VREG %rax, rINSTq 4972 .else 4973 GET_VREG %eax, rINSTq # eax <- vAA 4974 shrq %cl, %rax # ex: sarl %cl, %eax 4975 SET_VREG %eax, rINSTq 4976 .endif 4977 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4978 4979 4980 /* ------------------------------ */ 4981 .balign 128 4982 .L_op_add_float_2addr: /* 0xc6 */ 4983 /* File: x86_64/op_add_float_2addr.S */ 4984 /* File: x86_64/sseBinop2Addr.S */ 4985 movl rINST, %ecx # ecx <- A+ 4986 andl $0xf, %ecx # ecx <- A 4987 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4988 sarl $4, rINST # rINST<- B 4989 addss VREG_ADDRESS(rINSTq), %xmm0 4990 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 4991 pxor %xmm0, %xmm0 4992 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4993 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4994 4995 4996 /* ------------------------------ */ 4997 .balign 128 4998 .L_op_sub_float_2addr: /* 0xc7 */ 4999 /* File: x86_64/op_sub_float_2addr.S */ 5000 /* File: x86_64/sseBinop2Addr.S */ 5001 movl rINST, %ecx # ecx <- A+ 5002 andl $0xf, %ecx # ecx <- A 5003 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5004 sarl $4, rINST # rINST<- B 5005 subss VREG_ADDRESS(rINSTq), %xmm0 5006 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5007 pxor %xmm0, %xmm0 5008 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5009 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5010 5011 5012 /* ------------------------------ */ 5013 .balign 128 5014 .L_op_mul_float_2addr: /* 0xc8 */ 5015 /* File: x86_64/op_mul_float_2addr.S */ 5016 /* File: x86_64/sseBinop2Addr.S */ 5017 movl rINST, %ecx # ecx <- A+ 5018 andl $0xf, %ecx # ecx <- A 5019 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5020 sarl $4, rINST # rINST<- B 5021 mulss VREG_ADDRESS(rINSTq), %xmm0 5022 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5023 pxor %xmm0, %xmm0 5024 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5025 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5026 5027 5028 /* ------------------------------ */ 5029 .balign 128 5030 .L_op_div_float_2addr: /* 0xc9 */ 5031 /* File: x86_64/op_div_float_2addr.S */ 5032 /* File: x86_64/sseBinop2Addr.S */ 5033 movl rINST, %ecx # ecx <- A+ 5034 andl $0xf, %ecx # ecx <- A 5035 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5036 sarl $4, rINST # rINST<- B 5037 divss VREG_ADDRESS(rINSTq), %xmm0 5038 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5039 pxor %xmm0, %xmm0 5040 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5041 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5042 5043 5044 /* ------------------------------ */ 5045 .balign 128 5046 .L_op_rem_float_2addr: /* 0xca */ 5047 /* File: x86_64/op_rem_float_2addr.S */ 5048 /* rem_float/2addr vA, vB */ 5049 movzbq rINSTbl, %rcx # ecx <- A+ 5050 sarl $4, rINST # rINST <- B 5051 flds VREG_ADDRESS(rINSTq) # vB to fp stack 5052 andb $0xf, %cl # ecx <- A 5053 flds VREG_ADDRESS(%rcx) # vA to fp stack 5054 1: 5055 fprem 5056 fstsw %ax 5057 sahf 5058 jp 1b 5059 fstp %st(1) 5060 fstps VREG_ADDRESS(%rcx) # %st to vA 5061 CLEAR_REF %rcx 5062 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5063 5064 /* ------------------------------ */ 5065 .balign 128 5066 .L_op_add_double_2addr: /* 0xcb */ 5067 /* File: x86_64/op_add_double_2addr.S */ 5068 /* File: x86_64/sseBinop2Addr.S */ 5069 movl rINST, %ecx # ecx <- A+ 5070 andl $0xf, %ecx # ecx <- A 5071 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5072 sarl $4, rINST # rINST<- B 5073 addsd VREG_ADDRESS(rINSTq), %xmm0 5074 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5075 pxor %xmm0, %xmm0 5076 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5077 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5078 5079 5080 /* ------------------------------ */ 5081 .balign 128 5082 .L_op_sub_double_2addr: /* 0xcc */ 5083 /* File: x86_64/op_sub_double_2addr.S */ 5084 /* File: x86_64/sseBinop2Addr.S */ 5085 movl rINST, %ecx # ecx <- A+ 5086 andl $0xf, %ecx # ecx <- A 5087 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5088 sarl $4, rINST # rINST<- B 5089 subsd VREG_ADDRESS(rINSTq), %xmm0 5090 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5091 pxor %xmm0, %xmm0 5092 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5093 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5094 5095 5096 /* ------------------------------ */ 5097 .balign 128 5098 .L_op_mul_double_2addr: /* 0xcd */ 5099 /* File: x86_64/op_mul_double_2addr.S */ 5100 /* File: x86_64/sseBinop2Addr.S */ 5101 movl rINST, %ecx # ecx <- A+ 5102 andl $0xf, %ecx # ecx <- A 5103 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5104 sarl $4, rINST # rINST<- B 5105 mulsd VREG_ADDRESS(rINSTq), %xmm0 5106 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5107 pxor %xmm0, %xmm0 5108 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5109 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5110 5111 5112 /* ------------------------------ */ 5113 .balign 128 5114 .L_op_div_double_2addr: /* 0xce */ 5115 /* File: x86_64/op_div_double_2addr.S */ 5116 /* File: x86_64/sseBinop2Addr.S */ 5117 movl rINST, %ecx # ecx <- A+ 5118 andl $0xf, %ecx # ecx <- A 5119 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5120 sarl $4, rINST # rINST<- B 5121 divsd VREG_ADDRESS(rINSTq), %xmm0 5122 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5123 pxor %xmm0, %xmm0 5124 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5125 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5126 5127 5128 /* ------------------------------ */ 5129 .balign 128 5130 .L_op_rem_double_2addr: /* 0xcf */ 5131 /* File: x86_64/op_rem_double_2addr.S */ 5132 /* rem_double/2addr vA, vB */ 5133 movzbq rINSTbl, %rcx # ecx <- A+ 5134 sarl $4, rINST # rINST <- B 5135 fldl VREG_ADDRESS(rINSTq) # vB to fp stack 5136 andb $0xf, %cl # ecx <- A 5137 fldl VREG_ADDRESS(%rcx) # vA to fp stack 5138 1: 5139 fprem 5140 fstsw %ax 5141 sahf 5142 jp 1b 5143 fstp %st(1) 5144 fstpl VREG_ADDRESS(%rcx) # %st to vA 5145 CLEAR_WIDE_REF %rcx 5146 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5147 5148 /* ------------------------------ */ 5149 .balign 128 5150 .L_op_add_int_lit16: /* 0xd0 */ 5151 /* File: x86_64/op_add_int_lit16.S */ 5152 /* File: x86_64/binopLit16.S */ 5153 /* 5154 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5155 * that specifies an instruction that performs "result = eax op ecx". 5156 * This could be an x86 instruction or a function call. (If the result 5157 * comes back in a register other than eax, you can override "result".) 5158 * 5159 * For: add-int/lit16, rsub-int, 5160 * and-int/lit16, or-int/lit16, xor-int/lit16 5161 */ 5162 /* binop/lit16 vA, vB, #+CCCC */ 5163 movl rINST, %eax # rax <- 000000BA 5164 sarl $4, %eax # eax <- B 5165 GET_VREG %eax, %rax # eax <- vB 5166 andb $0xf, rINSTbl # rINST <- A 5167 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5168 addl %ecx, %eax # for example: addl %ecx, %eax 5169 SET_VREG %eax, rINSTq 5170 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5171 5172 5173 /* ------------------------------ */ 5174 .balign 128 5175 .L_op_rsub_int: /* 0xd1 */ 5176 /* File: x86_64/op_rsub_int.S */ 5177 /* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */ 5178 /* File: x86_64/binopLit16.S */ 5179 /* 5180 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5181 * that specifies an instruction that performs "result = eax op ecx". 5182 * This could be an x86 instruction or a function call. (If the result 5183 * comes back in a register other than eax, you can override "result".) 5184 * 5185 * For: add-int/lit16, rsub-int, 5186 * and-int/lit16, or-int/lit16, xor-int/lit16 5187 */ 5188 /* binop/lit16 vA, vB, #+CCCC */ 5189 movl rINST, %eax # rax <- 000000BA 5190 sarl $4, %eax # eax <- B 5191 GET_VREG %eax, %rax # eax <- vB 5192 andb $0xf, rINSTbl # rINST <- A 5193 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5194 subl %eax, %ecx # for example: addl %ecx, %eax 5195 SET_VREG %ecx, rINSTq 5196 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5197 5198 5199 /* ------------------------------ */ 5200 .balign 128 5201 .L_op_mul_int_lit16: /* 0xd2 */ 5202 /* File: x86_64/op_mul_int_lit16.S */ 5203 /* File: x86_64/binopLit16.S */ 5204 /* 5205 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5206 * that specifies an instruction that performs "result = eax op ecx". 5207 * This could be an x86 instruction or a function call. (If the result 5208 * comes back in a register other than eax, you can override "result".) 5209 * 5210 * For: add-int/lit16, rsub-int, 5211 * and-int/lit16, or-int/lit16, xor-int/lit16 5212 */ 5213 /* binop/lit16 vA, vB, #+CCCC */ 5214 movl rINST, %eax # rax <- 000000BA 5215 sarl $4, %eax # eax <- B 5216 GET_VREG %eax, %rax # eax <- vB 5217 andb $0xf, rINSTbl # rINST <- A 5218 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5219 imull %ecx, %eax # for example: addl %ecx, %eax 5220 SET_VREG %eax, rINSTq 5221 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5222 5223 5224 /* ------------------------------ */ 5225 .balign 128 5226 .L_op_div_int_lit16: /* 0xd3 */ 5227 /* File: x86_64/op_div_int_lit16.S */ 5228 /* File: x86_64/bindivLit16.S */ 5229 /* 5230 * 32-bit binary div/rem operation. Handles special case of op1=-1. 5231 */ 5232 /* div/rem/lit16 vA, vB, #+CCCC */ 5233 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5234 movl rINST, %eax # rax <- 000000BA 5235 sarl $4, %eax # eax <- B 5236 GET_VREG %eax, %rax # eax <- vB 5237 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5238 andb $0xf, rINSTbl # rINST <- A 5239 testl %ecx, %ecx 5240 jz common_errDivideByZero 5241 cmpl $-1, %ecx 5242 je 2f 5243 cdq # rax <- sign-extended of eax 5244 idivl %ecx 5245 1: 5246 SET_VREG %eax, rINSTq # vA <- result 5247 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5248 2: 5249 .if 0 5250 xorl %eax, %eax 5251 .else 5252 negl %eax 5253 .endif 5254 jmp 1b 5255 5256 5257 /* ------------------------------ */ 5258 .balign 128 5259 .L_op_rem_int_lit16: /* 0xd4 */ 5260 /* File: x86_64/op_rem_int_lit16.S */ 5261 /* File: x86_64/bindivLit16.S */ 5262 /* 5263 * 32-bit binary div/rem operation. Handles special case of op1=-1. 5264 */ 5265 /* div/rem/lit16 vA, vB, #+CCCC */ 5266 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5267 movl rINST, %eax # rax <- 000000BA 5268 sarl $4, %eax # eax <- B 5269 GET_VREG %eax, %rax # eax <- vB 5270 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5271 andb $0xf, rINSTbl # rINST <- A 5272 testl %ecx, %ecx 5273 jz common_errDivideByZero 5274 cmpl $-1, %ecx 5275 je 2f 5276 cdq # rax <- sign-extended of eax 5277 idivl %ecx 5278 1: 5279 SET_VREG %edx, rINSTq # vA <- result 5280 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5281 2: 5282 .if 1 5283 xorl %edx, %edx 5284 .else 5285 negl %edx 5286 .endif 5287 jmp 1b 5288 5289 5290 /* ------------------------------ */ 5291 .balign 128 5292 .L_op_and_int_lit16: /* 0xd5 */ 5293 /* File: x86_64/op_and_int_lit16.S */ 5294 /* File: x86_64/binopLit16.S */ 5295 /* 5296 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5297 * that specifies an instruction that performs "result = eax op ecx". 5298 * This could be an x86 instruction or a function call. (If the result 5299 * comes back in a register other than eax, you can override "result".) 5300 * 5301 * For: add-int/lit16, rsub-int, 5302 * and-int/lit16, or-int/lit16, xor-int/lit16 5303 */ 5304 /* binop/lit16 vA, vB, #+CCCC */ 5305 movl rINST, %eax # rax <- 000000BA 5306 sarl $4, %eax # eax <- B 5307 GET_VREG %eax, %rax # eax <- vB 5308 andb $0xf, rINSTbl # rINST <- A 5309 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5310 andl %ecx, %eax # for example: addl %ecx, %eax 5311 SET_VREG %eax, rINSTq 5312 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5313 5314 5315 /* ------------------------------ */ 5316 .balign 128 5317 .L_op_or_int_lit16: /* 0xd6 */ 5318 /* File: x86_64/op_or_int_lit16.S */ 5319 /* File: x86_64/binopLit16.S */ 5320 /* 5321 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5322 * that specifies an instruction that performs "result = eax op ecx". 5323 * This could be an x86 instruction or a function call. (If the result 5324 * comes back in a register other than eax, you can override "result".) 5325 * 5326 * For: add-int/lit16, rsub-int, 5327 * and-int/lit16, or-int/lit16, xor-int/lit16 5328 */ 5329 /* binop/lit16 vA, vB, #+CCCC */ 5330 movl rINST, %eax # rax <- 000000BA 5331 sarl $4, %eax # eax <- B 5332 GET_VREG %eax, %rax # eax <- vB 5333 andb $0xf, rINSTbl # rINST <- A 5334 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5335 orl %ecx, %eax # for example: addl %ecx, %eax 5336 SET_VREG %eax, rINSTq 5337 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5338 5339 5340 /* ------------------------------ */ 5341 .balign 128 5342 .L_op_xor_int_lit16: /* 0xd7 */ 5343 /* File: x86_64/op_xor_int_lit16.S */ 5344 /* File: x86_64/binopLit16.S */ 5345 /* 5346 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5347 * that specifies an instruction that performs "result = eax op ecx". 5348 * This could be an x86 instruction or a function call. (If the result 5349 * comes back in a register other than eax, you can override "result".) 5350 * 5351 * For: add-int/lit16, rsub-int, 5352 * and-int/lit16, or-int/lit16, xor-int/lit16 5353 */ 5354 /* binop/lit16 vA, vB, #+CCCC */ 5355 movl rINST, %eax # rax <- 000000BA 5356 sarl $4, %eax # eax <- B 5357 GET_VREG %eax, %rax # eax <- vB 5358 andb $0xf, rINSTbl # rINST <- A 5359 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5360 xorl %ecx, %eax # for example: addl %ecx, %eax 5361 SET_VREG %eax, rINSTq 5362 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5363 5364 5365 /* ------------------------------ */ 5366 .balign 128 5367 .L_op_add_int_lit8: /* 0xd8 */ 5368 /* File: x86_64/op_add_int_lit8.S */ 5369 /* File: x86_64/binopLit8.S */ 5370 /* 5371 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5372 * that specifies an instruction that performs "result = eax op ecx". 5373 * This could be an x86 instruction or a function call. (If the result 5374 * comes back in a register other than r0, you can override "result".) 5375 * 5376 * For: add-int/lit8, rsub-int/lit8 5377 * and-int/lit8, or-int/lit8, xor-int/lit8, 5378 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5379 */ 5380 /* binop/lit8 vAA, vBB, #+CC */ 5381 movzbq 2(rPC), %rax # rax <- BB 5382 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5383 GET_VREG %eax, %rax # eax <- rBB 5384 addl %ecx, %eax # ex: addl %ecx,%eax 5385 SET_VREG %eax, rINSTq 5386 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5387 5388 5389 /* ------------------------------ */ 5390 .balign 128 5391 .L_op_rsub_int_lit8: /* 0xd9 */ 5392 /* File: x86_64/op_rsub_int_lit8.S */ 5393 /* File: x86_64/binopLit8.S */ 5394 /* 5395 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5396 * that specifies an instruction that performs "result = eax op ecx". 5397 * This could be an x86 instruction or a function call. (If the result 5398 * comes back in a register other than r0, you can override "result".) 5399 * 5400 * For: add-int/lit8, rsub-int/lit8 5401 * and-int/lit8, or-int/lit8, xor-int/lit8, 5402 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5403 */ 5404 /* binop/lit8 vAA, vBB, #+CC */ 5405 movzbq 2(rPC), %rax # rax <- BB 5406 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5407 GET_VREG %eax, %rax # eax <- rBB 5408 subl %eax, %ecx # ex: addl %ecx,%eax 5409 SET_VREG %ecx, rINSTq 5410 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5411 5412 5413 /* ------------------------------ */ 5414 .balign 128 5415 .L_op_mul_int_lit8: /* 0xda */ 5416 /* File: x86_64/op_mul_int_lit8.S */ 5417 /* File: x86_64/binopLit8.S */ 5418 /* 5419 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5420 * that specifies an instruction that performs "result = eax op ecx". 5421 * This could be an x86 instruction or a function call. (If the result 5422 * comes back in a register other than r0, you can override "result".) 5423 * 5424 * For: add-int/lit8, rsub-int/lit8 5425 * and-int/lit8, or-int/lit8, xor-int/lit8, 5426 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5427 */ 5428 /* binop/lit8 vAA, vBB, #+CC */ 5429 movzbq 2(rPC), %rax # rax <- BB 5430 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5431 GET_VREG %eax, %rax # eax <- rBB 5432 imull %ecx, %eax # ex: addl %ecx,%eax 5433 SET_VREG %eax, rINSTq 5434 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5435 5436 5437 /* ------------------------------ */ 5438 .balign 128 5439 .L_op_div_int_lit8: /* 0xdb */ 5440 /* File: x86_64/op_div_int_lit8.S */ 5441 /* File: x86_64/bindivLit8.S */ 5442 /* 5443 * 32-bit div/rem "lit8" binary operation. Handles special case of 5444 * op0=minint & op1=-1 5445 */ 5446 /* div/rem/lit8 vAA, vBB, #+CC */ 5447 movzbq 2(rPC), %rax # eax <- BB 5448 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5449 GET_VREG %eax, %rax # eax <- rBB 5450 testl %ecx, %ecx 5451 je common_errDivideByZero 5452 cmpl $-1, %ecx 5453 je 2f 5454 cdq # rax <- sign-extended of eax 5455 idivl %ecx 5456 1: 5457 SET_VREG %eax, rINSTq # vA <- result 5458 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5459 2: 5460 .if 0 5461 xorl %eax, %eax 5462 .else 5463 negl %eax 5464 .endif 5465 jmp 1b 5466 5467 5468 /* ------------------------------ */ 5469 .balign 128 5470 .L_op_rem_int_lit8: /* 0xdc */ 5471 /* File: x86_64/op_rem_int_lit8.S */ 5472 /* File: x86_64/bindivLit8.S */ 5473 /* 5474 * 32-bit div/rem "lit8" binary operation. Handles special case of 5475 * op0=minint & op1=-1 5476 */ 5477 /* div/rem/lit8 vAA, vBB, #+CC */ 5478 movzbq 2(rPC), %rax # eax <- BB 5479 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5480 GET_VREG %eax, %rax # eax <- rBB 5481 testl %ecx, %ecx 5482 je common_errDivideByZero 5483 cmpl $-1, %ecx 5484 je 2f 5485 cdq # rax <- sign-extended of eax 5486 idivl %ecx 5487 1: 5488 SET_VREG %edx, rINSTq # vA <- result 5489 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5490 2: 5491 .if 1 5492 xorl %edx, %edx 5493 .else 5494 negl %edx 5495 .endif 5496 jmp 1b 5497 5498 5499 /* ------------------------------ */ 5500 .balign 128 5501 .L_op_and_int_lit8: /* 0xdd */ 5502 /* File: x86_64/op_and_int_lit8.S */ 5503 /* File: x86_64/binopLit8.S */ 5504 /* 5505 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5506 * that specifies an instruction that performs "result = eax op ecx". 5507 * This could be an x86 instruction or a function call. (If the result 5508 * comes back in a register other than r0, you can override "result".) 5509 * 5510 * For: add-int/lit8, rsub-int/lit8 5511 * and-int/lit8, or-int/lit8, xor-int/lit8, 5512 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5513 */ 5514 /* binop/lit8 vAA, vBB, #+CC */ 5515 movzbq 2(rPC), %rax # rax <- BB 5516 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5517 GET_VREG %eax, %rax # eax <- rBB 5518 andl %ecx, %eax # ex: addl %ecx,%eax 5519 SET_VREG %eax, rINSTq 5520 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5521 5522 5523 /* ------------------------------ */ 5524 .balign 128 5525 .L_op_or_int_lit8: /* 0xde */ 5526 /* File: x86_64/op_or_int_lit8.S */ 5527 /* File: x86_64/binopLit8.S */ 5528 /* 5529 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5530 * that specifies an instruction that performs "result = eax op ecx". 5531 * This could be an x86 instruction or a function call. (If the result 5532 * comes back in a register other than r0, you can override "result".) 5533 * 5534 * For: add-int/lit8, rsub-int/lit8 5535 * and-int/lit8, or-int/lit8, xor-int/lit8, 5536 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5537 */ 5538 /* binop/lit8 vAA, vBB, #+CC */ 5539 movzbq 2(rPC), %rax # rax <- BB 5540 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5541 GET_VREG %eax, %rax # eax <- rBB 5542 orl %ecx, %eax # ex: addl %ecx,%eax 5543 SET_VREG %eax, rINSTq 5544 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5545 5546 5547 /* ------------------------------ */ 5548 .balign 128 5549 .L_op_xor_int_lit8: /* 0xdf */ 5550 /* File: x86_64/op_xor_int_lit8.S */ 5551 /* File: x86_64/binopLit8.S */ 5552 /* 5553 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5554 * that specifies an instruction that performs "result = eax op ecx". 5555 * This could be an x86 instruction or a function call. (If the result 5556 * comes back in a register other than r0, you can override "result".) 5557 * 5558 * For: add-int/lit8, rsub-int/lit8 5559 * and-int/lit8, or-int/lit8, xor-int/lit8, 5560 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5561 */ 5562 /* binop/lit8 vAA, vBB, #+CC */ 5563 movzbq 2(rPC), %rax # rax <- BB 5564 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5565 GET_VREG %eax, %rax # eax <- rBB 5566 xorl %ecx, %eax # ex: addl %ecx,%eax 5567 SET_VREG %eax, rINSTq 5568 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5569 5570 5571 /* ------------------------------ */ 5572 .balign 128 5573 .L_op_shl_int_lit8: /* 0xe0 */ 5574 /* File: x86_64/op_shl_int_lit8.S */ 5575 /* File: x86_64/binopLit8.S */ 5576 /* 5577 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5578 * that specifies an instruction that performs "result = eax op ecx". 5579 * This could be an x86 instruction or a function call. (If the result 5580 * comes back in a register other than r0, you can override "result".) 5581 * 5582 * For: add-int/lit8, rsub-int/lit8 5583 * and-int/lit8, or-int/lit8, xor-int/lit8, 5584 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5585 */ 5586 /* binop/lit8 vAA, vBB, #+CC */ 5587 movzbq 2(rPC), %rax # rax <- BB 5588 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5589 GET_VREG %eax, %rax # eax <- rBB 5590 sall %cl, %eax # ex: addl %ecx,%eax 5591 SET_VREG %eax, rINSTq 5592 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5593 5594 5595 /* ------------------------------ */ 5596 .balign 128 5597 .L_op_shr_int_lit8: /* 0xe1 */ 5598 /* File: x86_64/op_shr_int_lit8.S */ 5599 /* File: x86_64/binopLit8.S */ 5600 /* 5601 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5602 * that specifies an instruction that performs "result = eax op ecx". 5603 * This could be an x86 instruction or a function call. (If the result 5604 * comes back in a register other than r0, you can override "result".) 5605 * 5606 * For: add-int/lit8, rsub-int/lit8 5607 * and-int/lit8, or-int/lit8, xor-int/lit8, 5608 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5609 */ 5610 /* binop/lit8 vAA, vBB, #+CC */ 5611 movzbq 2(rPC), %rax # rax <- BB 5612 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5613 GET_VREG %eax, %rax # eax <- rBB 5614 sarl %cl, %eax # ex: addl %ecx,%eax 5615 SET_VREG %eax, rINSTq 5616 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5617 5618 5619 /* ------------------------------ */ 5620 .balign 128 5621 .L_op_ushr_int_lit8: /* 0xe2 */ 5622 /* File: x86_64/op_ushr_int_lit8.S */ 5623 /* File: x86_64/binopLit8.S */ 5624 /* 5625 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5626 * that specifies an instruction that performs "result = eax op ecx". 5627 * This could be an x86 instruction or a function call. (If the result 5628 * comes back in a register other than r0, you can override "result".) 5629 * 5630 * For: add-int/lit8, rsub-int/lit8 5631 * and-int/lit8, or-int/lit8, xor-int/lit8, 5632 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5633 */ 5634 /* binop/lit8 vAA, vBB, #+CC */ 5635 movzbq 2(rPC), %rax # rax <- BB 5636 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5637 GET_VREG %eax, %rax # eax <- rBB 5638 shrl %cl, %eax # ex: addl %ecx,%eax 5639 SET_VREG %eax, rINSTq 5640 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5641 5642 5643 /* ------------------------------ */ 5644 .balign 128 5645 .L_op_iget_quick: /* 0xe3 */ 5646 /* File: x86_64/op_iget_quick.S */ 5647 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5648 /* op vA, vB, offset@CCCC */ 5649 movl rINST, %ecx # rcx <- BA 5650 sarl $4, %ecx # ecx <- B 5651 GET_VREG %ecx, %rcx # vB (object we're operating on) 5652 movzwq 2(rPC), %rax # eax <- field byte offset 5653 testl %ecx, %ecx # is object null? 5654 je common_errNullObject 5655 andb $0xf,rINSTbl # rINST <- A 5656 .if 0 5657 movq (%rcx,%rax,1), %rax 5658 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5659 .else 5660 movl (%rcx,%rax,1), %eax 5661 SET_VREG %eax, rINSTq # fp[A] <- value 5662 .endif 5663 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5664 5665 /* ------------------------------ */ 5666 .balign 128 5667 .L_op_iget_wide_quick: /* 0xe4 */ 5668 /* File: x86_64/op_iget_wide_quick.S */ 5669 /* File: x86_64/op_iget_quick.S */ 5670 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5671 /* op vA, vB, offset@CCCC */ 5672 movl rINST, %ecx # rcx <- BA 5673 sarl $4, %ecx # ecx <- B 5674 GET_VREG %ecx, %rcx # vB (object we're operating on) 5675 movzwq 2(rPC), %rax # eax <- field byte offset 5676 testl %ecx, %ecx # is object null? 5677 je common_errNullObject 5678 andb $0xf,rINSTbl # rINST <- A 5679 .if 1 5680 movq (%rcx,%rax,1), %rax 5681 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5682 .else 5683 movswl (%rcx,%rax,1), %eax 5684 SET_VREG %eax, rINSTq # fp[A] <- value 5685 .endif 5686 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5687 5688 5689 /* ------------------------------ */ 5690 .balign 128 5691 .L_op_iget_object_quick: /* 0xe5 */ 5692 /* File: x86_64/op_iget_object_quick.S */ 5693 /* For: iget-object-quick */ 5694 /* op vA, vB, offset@CCCC */ 5695 .extern artIGetObjectFromMterp 5696 movzbq rINSTbl, %rcx # rcx <- BA 5697 sarl $4, %ecx # ecx <- B 5698 GET_VREG OUT_32_ARG0, %rcx # vB (object we're operating on) 5699 movzwl 2(rPC), OUT_32_ARG1 # eax <- field byte offset 5700 EXPORT_PC 5701 callq SYMBOL(artIGetObjectFromMterp) # (obj, offset) 5702 movq rSELF, %rcx 5703 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 5704 jnz MterpException # bail out 5705 andb $0xf, rINSTbl # rINST <- A 5706 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 5707 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5708 5709 /* ------------------------------ */ 5710 .balign 128 5711 .L_op_iput_quick: /* 0xe6 */ 5712 /* File: x86_64/op_iput_quick.S */ 5713 /* For: iput-quick, iput-object-quick */ 5714 /* op vA, vB, offset@CCCC */ 5715 movzbq rINSTbl, %rcx # rcx <- BA 5716 sarl $4, %ecx # ecx <- B 5717 GET_VREG %ecx, %rcx # vB (object we're operating on) 5718 testl %ecx, %ecx # is object null? 5719 je common_errNullObject 5720 andb $0xf, rINSTbl # rINST <- A 5721 GET_VREG rINST, rINSTq # rINST <- v[A] 5722 movzwq 2(rPC), %rax # rax <- field byte offset 5723 movl rINST, (%rcx,%rax,1) 5724 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5725 5726 /* ------------------------------ */ 5727 .balign 128 5728 .L_op_iput_wide_quick: /* 0xe7 */ 5729 /* File: x86_64/op_iput_wide_quick.S */ 5730 /* iput-wide-quick vA, vB, offset@CCCC */ 5731 movzbq rINSTbl, %rcx # rcx<- BA 5732 sarl $4, %ecx # ecx<- B 5733 GET_VREG %ecx, %rcx # vB (object we're operating on) 5734 testl %ecx, %ecx # is object null? 5735 je common_errNullObject 5736 movzwq 2(rPC), %rax # rax<- field byte offset 5737 leaq (%rcx,%rax,1), %rcx # ecx<- Address of 64-bit target 5738 andb $0xf, rINSTbl # rINST<- A 5739 GET_WIDE_VREG %rax, rINSTq # rax<- fp[A]/fp[A+1] 5740 movq %rax, (%rcx) # obj.field<- r0/r1 5741 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5742 5743 /* ------------------------------ */ 5744 .balign 128 5745 .L_op_iput_object_quick: /* 0xe8 */ 5746 /* File: x86_64/op_iput_object_quick.S */ 5747 EXPORT_PC 5748 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 5749 movq rPC, OUT_ARG1 5750 REFRESH_INST 232 5751 movl rINST, OUT_32_ARG2 5752 call SYMBOL(MterpIputObjectQuick) 5753 testb %al, %al 5754 jz MterpException 5755 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5756 5757 /* ------------------------------ */ 5758 .balign 128 5759 .L_op_invoke_virtual_quick: /* 0xe9 */ 5760 /* File: x86_64/op_invoke_virtual_quick.S */ 5761 /* File: x86_64/invoke.S */ 5762 /* 5763 * Generic invoke handler wrapper. 5764 */ 5765 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 5766 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 5767 .extern MterpInvokeVirtualQuick 5768 EXPORT_PC 5769 movq rSELF, OUT_ARG0 5770 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 5771 movq rPC, OUT_ARG2 5772 REFRESH_INST 233 5773 movl rINST, OUT_32_ARG3 5774 call SYMBOL(MterpInvokeVirtualQuick) 5775 testb %al, %al 5776 jz MterpException 5777 ADVANCE_PC 3 5778 call SYMBOL(MterpShouldSwitchInterpreters) 5779 testb %al, %al 5780 jnz MterpFallback 5781 FETCH_INST 5782 GOTO_NEXT 5783 5784 5785 /* ------------------------------ */ 5786 .balign 128 5787 .L_op_invoke_virtual_range_quick: /* 0xea */ 5788 /* File: x86_64/op_invoke_virtual_range_quick.S */ 5789 /* File: x86_64/invoke.S */ 5790 /* 5791 * Generic invoke handler wrapper. 5792 */ 5793 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 5794 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 5795 .extern MterpInvokeVirtualQuickRange 5796 EXPORT_PC 5797 movq rSELF, OUT_ARG0 5798 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 5799 movq rPC, OUT_ARG2 5800 REFRESH_INST 234 5801 movl rINST, OUT_32_ARG3 5802 call SYMBOL(MterpInvokeVirtualQuickRange) 5803 testb %al, %al 5804 jz MterpException 5805 ADVANCE_PC 3 5806 call SYMBOL(MterpShouldSwitchInterpreters) 5807 testb %al, %al 5808 jnz MterpFallback 5809 FETCH_INST 5810 GOTO_NEXT 5811 5812 5813 /* ------------------------------ */ 5814 .balign 128 5815 .L_op_iput_boolean_quick: /* 0xeb */ 5816 /* File: x86_64/op_iput_boolean_quick.S */ 5817 /* File: x86_64/op_iput_quick.S */ 5818 /* For: iput-quick, iput-object-quick */ 5819 /* op vA, vB, offset@CCCC */ 5820 movzbq rINSTbl, %rcx # rcx <- BA 5821 sarl $4, %ecx # ecx <- B 5822 GET_VREG %ecx, %rcx # vB (object we're operating on) 5823 testl %ecx, %ecx # is object null? 5824 je common_errNullObject 5825 andb $0xf, rINSTbl # rINST <- A 5826 GET_VREG rINST, rINSTq # rINST <- v[A] 5827 movzwq 2(rPC), %rax # rax <- field byte offset 5828 movb rINSTbl, (%rcx,%rax,1) 5829 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5830 5831 5832 /* ------------------------------ */ 5833 .balign 128 5834 .L_op_iput_byte_quick: /* 0xec */ 5835 /* File: x86_64/op_iput_byte_quick.S */ 5836 /* File: x86_64/op_iput_quick.S */ 5837 /* For: iput-quick, iput-object-quick */ 5838 /* op vA, vB, offset@CCCC */ 5839 movzbq rINSTbl, %rcx # rcx <- BA 5840 sarl $4, %ecx # ecx <- B 5841 GET_VREG %ecx, %rcx # vB (object we're operating on) 5842 testl %ecx, %ecx # is object null? 5843 je common_errNullObject 5844 andb $0xf, rINSTbl # rINST <- A 5845 GET_VREG rINST, rINSTq # rINST <- v[A] 5846 movzwq 2(rPC), %rax # rax <- field byte offset 5847 movb rINSTbl, (%rcx,%rax,1) 5848 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5849 5850 5851 /* ------------------------------ */ 5852 .balign 128 5853 .L_op_iput_char_quick: /* 0xed */ 5854 /* File: x86_64/op_iput_char_quick.S */ 5855 /* File: x86_64/op_iput_quick.S */ 5856 /* For: iput-quick, iput-object-quick */ 5857 /* op vA, vB, offset@CCCC */ 5858 movzbq rINSTbl, %rcx # rcx <- BA 5859 sarl $4, %ecx # ecx <- B 5860 GET_VREG %ecx, %rcx # vB (object we're operating on) 5861 testl %ecx, %ecx # is object null? 5862 je common_errNullObject 5863 andb $0xf, rINSTbl # rINST <- A 5864 GET_VREG rINST, rINSTq # rINST <- v[A] 5865 movzwq 2(rPC), %rax # rax <- field byte offset 5866 movw rINSTw, (%rcx,%rax,1) 5867 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5868 5869 5870 /* ------------------------------ */ 5871 .balign 128 5872 .L_op_iput_short_quick: /* 0xee */ 5873 /* File: x86_64/op_iput_short_quick.S */ 5874 /* File: x86_64/op_iput_quick.S */ 5875 /* For: iput-quick, iput-object-quick */ 5876 /* op vA, vB, offset@CCCC */ 5877 movzbq rINSTbl, %rcx # rcx <- BA 5878 sarl $4, %ecx # ecx <- B 5879 GET_VREG %ecx, %rcx # vB (object we're operating on) 5880 testl %ecx, %ecx # is object null? 5881 je common_errNullObject 5882 andb $0xf, rINSTbl # rINST <- A 5883 GET_VREG rINST, rINSTq # rINST <- v[A] 5884 movzwq 2(rPC), %rax # rax <- field byte offset 5885 movw rINSTw, (%rcx,%rax,1) 5886 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5887 5888 5889 /* ------------------------------ */ 5890 .balign 128 5891 .L_op_iget_boolean_quick: /* 0xef */ 5892 /* File: x86_64/op_iget_boolean_quick.S */ 5893 /* File: x86_64/op_iget_quick.S */ 5894 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5895 /* op vA, vB, offset@CCCC */ 5896 movl rINST, %ecx # rcx <- BA 5897 sarl $4, %ecx # ecx <- B 5898 GET_VREG %ecx, %rcx # vB (object we're operating on) 5899 movzwq 2(rPC), %rax # eax <- field byte offset 5900 testl %ecx, %ecx # is object null? 5901 je common_errNullObject 5902 andb $0xf,rINSTbl # rINST <- A 5903 .if 0 5904 movq (%rcx,%rax,1), %rax 5905 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5906 .else 5907 movsbl (%rcx,%rax,1), %eax 5908 SET_VREG %eax, rINSTq # fp[A] <- value 5909 .endif 5910 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5911 5912 5913 /* ------------------------------ */ 5914 .balign 128 5915 .L_op_iget_byte_quick: /* 0xf0 */ 5916 /* File: x86_64/op_iget_byte_quick.S */ 5917 /* File: x86_64/op_iget_quick.S */ 5918 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5919 /* op vA, vB, offset@CCCC */ 5920 movl rINST, %ecx # rcx <- BA 5921 sarl $4, %ecx # ecx <- B 5922 GET_VREG %ecx, %rcx # vB (object we're operating on) 5923 movzwq 2(rPC), %rax # eax <- field byte offset 5924 testl %ecx, %ecx # is object null? 5925 je common_errNullObject 5926 andb $0xf,rINSTbl # rINST <- A 5927 .if 0 5928 movq (%rcx,%rax,1), %rax 5929 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5930 .else 5931 movsbl (%rcx,%rax,1), %eax 5932 SET_VREG %eax, rINSTq # fp[A] <- value 5933 .endif 5934 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5935 5936 5937 /* ------------------------------ */ 5938 .balign 128 5939 .L_op_iget_char_quick: /* 0xf1 */ 5940 /* File: x86_64/op_iget_char_quick.S */ 5941 /* File: x86_64/op_iget_quick.S */ 5942 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5943 /* op vA, vB, offset@CCCC */ 5944 movl rINST, %ecx # rcx <- BA 5945 sarl $4, %ecx # ecx <- B 5946 GET_VREG %ecx, %rcx # vB (object we're operating on) 5947 movzwq 2(rPC), %rax # eax <- field byte offset 5948 testl %ecx, %ecx # is object null? 5949 je common_errNullObject 5950 andb $0xf,rINSTbl # rINST <- A 5951 .if 0 5952 movq (%rcx,%rax,1), %rax 5953 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5954 .else 5955 movzwl (%rcx,%rax,1), %eax 5956 SET_VREG %eax, rINSTq # fp[A] <- value 5957 .endif 5958 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5959 5960 5961 /* ------------------------------ */ 5962 .balign 128 5963 .L_op_iget_short_quick: /* 0xf2 */ 5964 /* File: x86_64/op_iget_short_quick.S */ 5965 /* File: x86_64/op_iget_quick.S */ 5966 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5967 /* op vA, vB, offset@CCCC */ 5968 movl rINST, %ecx # rcx <- BA 5969 sarl $4, %ecx # ecx <- B 5970 GET_VREG %ecx, %rcx # vB (object we're operating on) 5971 movzwq 2(rPC), %rax # eax <- field byte offset 5972 testl %ecx, %ecx # is object null? 5973 je common_errNullObject 5974 andb $0xf,rINSTbl # rINST <- A 5975 .if 0 5976 movq (%rcx,%rax,1), %rax 5977 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5978 .else 5979 movswl (%rcx,%rax,1), %eax 5980 SET_VREG %eax, rINSTq # fp[A] <- value 5981 .endif 5982 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5983 5984 5985 /* ------------------------------ */ 5986 .balign 128 5987 .L_op_unused_f3: /* 0xf3 */ 5988 /* File: x86_64/op_unused_f3.S */ 5989 /* File: x86_64/unused.S */ 5990 /* 5991 * Bail to reference interpreter to throw. 5992 */ 5993 jmp MterpFallback 5994 5995 5996 /* ------------------------------ */ 5997 .balign 128 5998 .L_op_unused_f4: /* 0xf4 */ 5999 /* File: x86_64/op_unused_f4.S */ 6000 /* File: x86_64/unused.S */ 6001 /* 6002 * Bail to reference interpreter to throw. 6003 */ 6004 jmp MterpFallback 6005 6006 6007 /* ------------------------------ */ 6008 .balign 128 6009 .L_op_unused_f5: /* 0xf5 */ 6010 /* File: x86_64/op_unused_f5.S */ 6011 /* File: x86_64/unused.S */ 6012 /* 6013 * Bail to reference interpreter to throw. 6014 */ 6015 jmp MterpFallback 6016 6017 6018 /* ------------------------------ */ 6019 .balign 128 6020 .L_op_unused_f6: /* 0xf6 */ 6021 /* File: x86_64/op_unused_f6.S */ 6022 /* File: x86_64/unused.S */ 6023 /* 6024 * Bail to reference interpreter to throw. 6025 */ 6026 jmp MterpFallback 6027 6028 6029 /* ------------------------------ */ 6030 .balign 128 6031 .L_op_unused_f7: /* 0xf7 */ 6032 /* File: x86_64/op_unused_f7.S */ 6033 /* File: x86_64/unused.S */ 6034 /* 6035 * Bail to reference interpreter to throw. 6036 */ 6037 jmp MterpFallback 6038 6039 6040 /* ------------------------------ */ 6041 .balign 128 6042 .L_op_unused_f8: /* 0xf8 */ 6043 /* File: x86_64/op_unused_f8.S */ 6044 /* File: x86_64/unused.S */ 6045 /* 6046 * Bail to reference interpreter to throw. 6047 */ 6048 jmp MterpFallback 6049 6050 6051 /* ------------------------------ */ 6052 .balign 128 6053 .L_op_unused_f9: /* 0xf9 */ 6054 /* File: x86_64/op_unused_f9.S */ 6055 /* File: x86_64/unused.S */ 6056 /* 6057 * Bail to reference interpreter to throw. 6058 */ 6059 jmp MterpFallback 6060 6061 6062 /* ------------------------------ */ 6063 .balign 128 6064 .L_op_invoke_polymorphic: /* 0xfa */ 6065 /* File: x86_64/op_invoke_polymorphic.S */ 6066 /* File: x86_64/invoke_polymorphic.S */ 6067 /* 6068 * invoke-polymorphic handler wrapper. 6069 */ 6070 /* op {vC, vD, vE, vF, vG}, meth@BBBB, proto@HHHH */ 6071 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB, proto@HHHH */ 6072 .extern MterpInvokePolymorphic 6073 EXPORT_PC 6074 movq rSELF, OUT_ARG0 6075 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6076 movq rPC, OUT_ARG2 6077 REFRESH_INST 250 6078 movl rINST, OUT_32_ARG3 6079 call SYMBOL(MterpInvokePolymorphic) 6080 testb %al, %al 6081 jz MterpException 6082 ADVANCE_PC 4 6083 call SYMBOL(MterpShouldSwitchInterpreters) 6084 testb %al, %al 6085 jnz MterpFallback 6086 FETCH_INST 6087 GOTO_NEXT 6088 6089 6090 /* ------------------------------ */ 6091 .balign 128 6092 .L_op_invoke_polymorphic_range: /* 0xfb */ 6093 /* File: x86_64/op_invoke_polymorphic_range.S */ 6094 /* File: x86_64/invoke_polymorphic.S */ 6095 /* 6096 * invoke-polymorphic handler wrapper. 6097 */ 6098 /* op {vC, vD, vE, vF, vG}, meth@BBBB, proto@HHHH */ 6099 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB, proto@HHHH */ 6100 .extern MterpInvokePolymorphicRange 6101 EXPORT_PC 6102 movq rSELF, OUT_ARG0 6103 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6104 movq rPC, OUT_ARG2 6105 REFRESH_INST 251 6106 movl rINST, OUT_32_ARG3 6107 call SYMBOL(MterpInvokePolymorphicRange) 6108 testb %al, %al 6109 jz MterpException 6110 ADVANCE_PC 4 6111 call SYMBOL(MterpShouldSwitchInterpreters) 6112 testb %al, %al 6113 jnz MterpFallback 6114 FETCH_INST 6115 GOTO_NEXT 6116 6117 6118 /* ------------------------------ */ 6119 .balign 128 6120 .L_op_invoke_custom: /* 0xfc */ 6121 /* File: x86_64/op_invoke_custom.S */ 6122 /* File: x86_64/invoke.S */ 6123 /* 6124 * Generic invoke handler wrapper. 6125 */ 6126 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 6127 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 6128 .extern MterpInvokeCustom 6129 EXPORT_PC 6130 movq rSELF, OUT_ARG0 6131 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6132 movq rPC, OUT_ARG2 6133 REFRESH_INST 252 6134 movl rINST, OUT_32_ARG3 6135 call SYMBOL(MterpInvokeCustom) 6136 testb %al, %al 6137 jz MterpException 6138 ADVANCE_PC 3 6139 call SYMBOL(MterpShouldSwitchInterpreters) 6140 testb %al, %al 6141 jnz MterpFallback 6142 FETCH_INST 6143 GOTO_NEXT 6144 6145 6146 /* ------------------------------ */ 6147 .balign 128 6148 .L_op_invoke_custom_range: /* 0xfd */ 6149 /* File: x86_64/op_invoke_custom_range.S */ 6150 /* File: x86_64/invoke.S */ 6151 /* 6152 * Generic invoke handler wrapper. 6153 */ 6154 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 6155 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 6156 .extern MterpInvokeCustomRange 6157 EXPORT_PC 6158 movq rSELF, OUT_ARG0 6159 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6160 movq rPC, OUT_ARG2 6161 REFRESH_INST 253 6162 movl rINST, OUT_32_ARG3 6163 call SYMBOL(MterpInvokeCustomRange) 6164 testb %al, %al 6165 jz MterpException 6166 ADVANCE_PC 3 6167 call SYMBOL(MterpShouldSwitchInterpreters) 6168 testb %al, %al 6169 jnz MterpFallback 6170 FETCH_INST 6171 GOTO_NEXT 6172 6173 6174 /* ------------------------------ */ 6175 .balign 128 6176 .L_op_const_method_handle: /* 0xfe */ 6177 /* File: x86_64/op_const_method_handle.S */ 6178 /* File: x86_64/const.S */ 6179 /* const/class vAA, type@BBBB */ 6180 /* const/method-handle vAA, method_handle@BBBB */ 6181 /* const/method-type vAA, proto@BBBB */ 6182 /* const/string vAA, string@@BBBB */ 6183 .extern MterpConstMethodHandle 6184 EXPORT_PC 6185 movzwq 2(rPC), OUT_ARG0 # eax <- OUT_ARG0 6186 movq rINSTq, OUT_ARG1 6187 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 6188 movq rSELF, OUT_ARG3 6189 call SYMBOL(MterpConstMethodHandle) # (index, tgt_reg, shadow_frame, self) 6190 testb %al, %al 6191 jnz MterpPossibleException 6192 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6193 6194 6195 /* ------------------------------ */ 6196 .balign 128 6197 .L_op_const_method_type: /* 0xff */ 6198 /* File: x86_64/op_const_method_type.S */ 6199 /* File: x86_64/const.S */ 6200 /* const/class vAA, type@BBBB */ 6201 /* const/method-handle vAA, method_handle@BBBB */ 6202 /* const/method-type vAA, proto@BBBB */ 6203 /* const/string vAA, string@@BBBB */ 6204 .extern MterpConstMethodType 6205 EXPORT_PC 6206 movzwq 2(rPC), OUT_ARG0 # eax <- OUT_ARG0 6207 movq rINSTq, OUT_ARG1 6208 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 6209 movq rSELF, OUT_ARG3 6210 call SYMBOL(MterpConstMethodType) # (index, tgt_reg, shadow_frame, self) 6211 testb %al, %al 6212 jnz MterpPossibleException 6213 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6214 6215 6216 .balign 128 6217 .global SYMBOL(artMterpAsmInstructionEnd) 6218 SYMBOL(artMterpAsmInstructionEnd): 6219 6220 /* 6221 * =========================================================================== 6222 * Sister implementations 6223 * =========================================================================== 6224 */ 6225 .global SYMBOL(artMterpAsmSisterStart) 6226 .text 6227 .balign 4 6228 SYMBOL(artMterpAsmSisterStart): 6229 .global SYMBOL(artMterpAsmSisterEnd) 6230 SYMBOL(artMterpAsmSisterEnd): 6231 6232 6233 .global SYMBOL(artMterpAsmAltInstructionStart) 6234 .text 6235 6236 SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop 6237 /* ------------------------------ */ 6238 .balign 128 6239 .L_ALT_op_nop: /* 0x00 */ 6240 /* File: x86_64/alt_stub.S */ 6241 /* 6242 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6243 * any interesting requests and then jump to the real instruction 6244 * handler. Unlike the Arm handler, we can't do this as a tail call 6245 * because rIBASE is caller save and we need to reload it. 6246 * 6247 * Note that unlike in the Arm implementation, we should never arrive 6248 * here with a zero breakFlag because we always refresh rIBASE on 6249 * return. 6250 */ 6251 .extern MterpCheckBefore 6252 REFRESH_IBASE 6253 movq rSELF, OUT_ARG0 6254 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6255 movq rPC, OUT_ARG2 6256 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6257 jmp .L_op_nop+(0*128) 6258 6259 /* ------------------------------ */ 6260 .balign 128 6261 .L_ALT_op_move: /* 0x01 */ 6262 /* File: x86_64/alt_stub.S */ 6263 /* 6264 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6265 * any interesting requests and then jump to the real instruction 6266 * handler. Unlike the Arm handler, we can't do this as a tail call 6267 * because rIBASE is caller save and we need to reload it. 6268 * 6269 * Note that unlike in the Arm implementation, we should never arrive 6270 * here with a zero breakFlag because we always refresh rIBASE on 6271 * return. 6272 */ 6273 .extern MterpCheckBefore 6274 REFRESH_IBASE 6275 movq rSELF, OUT_ARG0 6276 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6277 movq rPC, OUT_ARG2 6278 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6279 jmp .L_op_nop+(1*128) 6280 6281 /* ------------------------------ */ 6282 .balign 128 6283 .L_ALT_op_move_from16: /* 0x02 */ 6284 /* File: x86_64/alt_stub.S */ 6285 /* 6286 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6287 * any interesting requests and then jump to the real instruction 6288 * handler. Unlike the Arm handler, we can't do this as a tail call 6289 * because rIBASE is caller save and we need to reload it. 6290 * 6291 * Note that unlike in the Arm implementation, we should never arrive 6292 * here with a zero breakFlag because we always refresh rIBASE on 6293 * return. 6294 */ 6295 .extern MterpCheckBefore 6296 REFRESH_IBASE 6297 movq rSELF, OUT_ARG0 6298 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6299 movq rPC, OUT_ARG2 6300 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6301 jmp .L_op_nop+(2*128) 6302 6303 /* ------------------------------ */ 6304 .balign 128 6305 .L_ALT_op_move_16: /* 0x03 */ 6306 /* File: x86_64/alt_stub.S */ 6307 /* 6308 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6309 * any interesting requests and then jump to the real instruction 6310 * handler. Unlike the Arm handler, we can't do this as a tail call 6311 * because rIBASE is caller save and we need to reload it. 6312 * 6313 * Note that unlike in the Arm implementation, we should never arrive 6314 * here with a zero breakFlag because we always refresh rIBASE on 6315 * return. 6316 */ 6317 .extern MterpCheckBefore 6318 REFRESH_IBASE 6319 movq rSELF, OUT_ARG0 6320 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6321 movq rPC, OUT_ARG2 6322 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6323 jmp .L_op_nop+(3*128) 6324 6325 /* ------------------------------ */ 6326 .balign 128 6327 .L_ALT_op_move_wide: /* 0x04 */ 6328 /* File: x86_64/alt_stub.S */ 6329 /* 6330 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6331 * any interesting requests and then jump to the real instruction 6332 * handler. Unlike the Arm handler, we can't do this as a tail call 6333 * because rIBASE is caller save and we need to reload it. 6334 * 6335 * Note that unlike in the Arm implementation, we should never arrive 6336 * here with a zero breakFlag because we always refresh rIBASE on 6337 * return. 6338 */ 6339 .extern MterpCheckBefore 6340 REFRESH_IBASE 6341 movq rSELF, OUT_ARG0 6342 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6343 movq rPC, OUT_ARG2 6344 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6345 jmp .L_op_nop+(4*128) 6346 6347 /* ------------------------------ */ 6348 .balign 128 6349 .L_ALT_op_move_wide_from16: /* 0x05 */ 6350 /* File: x86_64/alt_stub.S */ 6351 /* 6352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6353 * any interesting requests and then jump to the real instruction 6354 * handler. Unlike the Arm handler, we can't do this as a tail call 6355 * because rIBASE is caller save and we need to reload it. 6356 * 6357 * Note that unlike in the Arm implementation, we should never arrive 6358 * here with a zero breakFlag because we always refresh rIBASE on 6359 * return. 6360 */ 6361 .extern MterpCheckBefore 6362 REFRESH_IBASE 6363 movq rSELF, OUT_ARG0 6364 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6365 movq rPC, OUT_ARG2 6366 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6367 jmp .L_op_nop+(5*128) 6368 6369 /* ------------------------------ */ 6370 .balign 128 6371 .L_ALT_op_move_wide_16: /* 0x06 */ 6372 /* File: x86_64/alt_stub.S */ 6373 /* 6374 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6375 * any interesting requests and then jump to the real instruction 6376 * handler. Unlike the Arm handler, we can't do this as a tail call 6377 * because rIBASE is caller save and we need to reload it. 6378 * 6379 * Note that unlike in the Arm implementation, we should never arrive 6380 * here with a zero breakFlag because we always refresh rIBASE on 6381 * return. 6382 */ 6383 .extern MterpCheckBefore 6384 REFRESH_IBASE 6385 movq rSELF, OUT_ARG0 6386 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6387 movq rPC, OUT_ARG2 6388 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6389 jmp .L_op_nop+(6*128) 6390 6391 /* ------------------------------ */ 6392 .balign 128 6393 .L_ALT_op_move_object: /* 0x07 */ 6394 /* File: x86_64/alt_stub.S */ 6395 /* 6396 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6397 * any interesting requests and then jump to the real instruction 6398 * handler. Unlike the Arm handler, we can't do this as a tail call 6399 * because rIBASE is caller save and we need to reload it. 6400 * 6401 * Note that unlike in the Arm implementation, we should never arrive 6402 * here with a zero breakFlag because we always refresh rIBASE on 6403 * return. 6404 */ 6405 .extern MterpCheckBefore 6406 REFRESH_IBASE 6407 movq rSELF, OUT_ARG0 6408 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6409 movq rPC, OUT_ARG2 6410 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6411 jmp .L_op_nop+(7*128) 6412 6413 /* ------------------------------ */ 6414 .balign 128 6415 .L_ALT_op_move_object_from16: /* 0x08 */ 6416 /* File: x86_64/alt_stub.S */ 6417 /* 6418 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6419 * any interesting requests and then jump to the real instruction 6420 * handler. Unlike the Arm handler, we can't do this as a tail call 6421 * because rIBASE is caller save and we need to reload it. 6422 * 6423 * Note that unlike in the Arm implementation, we should never arrive 6424 * here with a zero breakFlag because we always refresh rIBASE on 6425 * return. 6426 */ 6427 .extern MterpCheckBefore 6428 REFRESH_IBASE 6429 movq rSELF, OUT_ARG0 6430 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6431 movq rPC, OUT_ARG2 6432 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6433 jmp .L_op_nop+(8*128) 6434 6435 /* ------------------------------ */ 6436 .balign 128 6437 .L_ALT_op_move_object_16: /* 0x09 */ 6438 /* File: x86_64/alt_stub.S */ 6439 /* 6440 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6441 * any interesting requests and then jump to the real instruction 6442 * handler. Unlike the Arm handler, we can't do this as a tail call 6443 * because rIBASE is caller save and we need to reload it. 6444 * 6445 * Note that unlike in the Arm implementation, we should never arrive 6446 * here with a zero breakFlag because we always refresh rIBASE on 6447 * return. 6448 */ 6449 .extern MterpCheckBefore 6450 REFRESH_IBASE 6451 movq rSELF, OUT_ARG0 6452 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6453 movq rPC, OUT_ARG2 6454 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6455 jmp .L_op_nop+(9*128) 6456 6457 /* ------------------------------ */ 6458 .balign 128 6459 .L_ALT_op_move_result: /* 0x0a */ 6460 /* File: x86_64/alt_stub.S */ 6461 /* 6462 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6463 * any interesting requests and then jump to the real instruction 6464 * handler. Unlike the Arm handler, we can't do this as a tail call 6465 * because rIBASE is caller save and we need to reload it. 6466 * 6467 * Note that unlike in the Arm implementation, we should never arrive 6468 * here with a zero breakFlag because we always refresh rIBASE on 6469 * return. 6470 */ 6471 .extern MterpCheckBefore 6472 REFRESH_IBASE 6473 movq rSELF, OUT_ARG0 6474 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6475 movq rPC, OUT_ARG2 6476 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6477 jmp .L_op_nop+(10*128) 6478 6479 /* ------------------------------ */ 6480 .balign 128 6481 .L_ALT_op_move_result_wide: /* 0x0b */ 6482 /* File: x86_64/alt_stub.S */ 6483 /* 6484 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6485 * any interesting requests and then jump to the real instruction 6486 * handler. Unlike the Arm handler, we can't do this as a tail call 6487 * because rIBASE is caller save and we need to reload it. 6488 * 6489 * Note that unlike in the Arm implementation, we should never arrive 6490 * here with a zero breakFlag because we always refresh rIBASE on 6491 * return. 6492 */ 6493 .extern MterpCheckBefore 6494 REFRESH_IBASE 6495 movq rSELF, OUT_ARG0 6496 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6497 movq rPC, OUT_ARG2 6498 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6499 jmp .L_op_nop+(11*128) 6500 6501 /* ------------------------------ */ 6502 .balign 128 6503 .L_ALT_op_move_result_object: /* 0x0c */ 6504 /* File: x86_64/alt_stub.S */ 6505 /* 6506 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6507 * any interesting requests and then jump to the real instruction 6508 * handler. Unlike the Arm handler, we can't do this as a tail call 6509 * because rIBASE is caller save and we need to reload it. 6510 * 6511 * Note that unlike in the Arm implementation, we should never arrive 6512 * here with a zero breakFlag because we always refresh rIBASE on 6513 * return. 6514 */ 6515 .extern MterpCheckBefore 6516 REFRESH_IBASE 6517 movq rSELF, OUT_ARG0 6518 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6519 movq rPC, OUT_ARG2 6520 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6521 jmp .L_op_nop+(12*128) 6522 6523 /* ------------------------------ */ 6524 .balign 128 6525 .L_ALT_op_move_exception: /* 0x0d */ 6526 /* File: x86_64/alt_stub.S */ 6527 /* 6528 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6529 * any interesting requests and then jump to the real instruction 6530 * handler. Unlike the Arm handler, we can't do this as a tail call 6531 * because rIBASE is caller save and we need to reload it. 6532 * 6533 * Note that unlike in the Arm implementation, we should never arrive 6534 * here with a zero breakFlag because we always refresh rIBASE on 6535 * return. 6536 */ 6537 .extern MterpCheckBefore 6538 REFRESH_IBASE 6539 movq rSELF, OUT_ARG0 6540 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6541 movq rPC, OUT_ARG2 6542 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6543 jmp .L_op_nop+(13*128) 6544 6545 /* ------------------------------ */ 6546 .balign 128 6547 .L_ALT_op_return_void: /* 0x0e */ 6548 /* File: x86_64/alt_stub.S */ 6549 /* 6550 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6551 * any interesting requests and then jump to the real instruction 6552 * handler. Unlike the Arm handler, we can't do this as a tail call 6553 * because rIBASE is caller save and we need to reload it. 6554 * 6555 * Note that unlike in the Arm implementation, we should never arrive 6556 * here with a zero breakFlag because we always refresh rIBASE on 6557 * return. 6558 */ 6559 .extern MterpCheckBefore 6560 REFRESH_IBASE 6561 movq rSELF, OUT_ARG0 6562 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6563 movq rPC, OUT_ARG2 6564 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6565 jmp .L_op_nop+(14*128) 6566 6567 /* ------------------------------ */ 6568 .balign 128 6569 .L_ALT_op_return: /* 0x0f */ 6570 /* File: x86_64/alt_stub.S */ 6571 /* 6572 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6573 * any interesting requests and then jump to the real instruction 6574 * handler. Unlike the Arm handler, we can't do this as a tail call 6575 * because rIBASE is caller save and we need to reload it. 6576 * 6577 * Note that unlike in the Arm implementation, we should never arrive 6578 * here with a zero breakFlag because we always refresh rIBASE on 6579 * return. 6580 */ 6581 .extern MterpCheckBefore 6582 REFRESH_IBASE 6583 movq rSELF, OUT_ARG0 6584 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6585 movq rPC, OUT_ARG2 6586 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6587 jmp .L_op_nop+(15*128) 6588 6589 /* ------------------------------ */ 6590 .balign 128 6591 .L_ALT_op_return_wide: /* 0x10 */ 6592 /* File: x86_64/alt_stub.S */ 6593 /* 6594 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6595 * any interesting requests and then jump to the real instruction 6596 * handler. Unlike the Arm handler, we can't do this as a tail call 6597 * because rIBASE is caller save and we need to reload it. 6598 * 6599 * Note that unlike in the Arm implementation, we should never arrive 6600 * here with a zero breakFlag because we always refresh rIBASE on 6601 * return. 6602 */ 6603 .extern MterpCheckBefore 6604 REFRESH_IBASE 6605 movq rSELF, OUT_ARG0 6606 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6607 movq rPC, OUT_ARG2 6608 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6609 jmp .L_op_nop+(16*128) 6610 6611 /* ------------------------------ */ 6612 .balign 128 6613 .L_ALT_op_return_object: /* 0x11 */ 6614 /* File: x86_64/alt_stub.S */ 6615 /* 6616 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6617 * any interesting requests and then jump to the real instruction 6618 * handler. Unlike the Arm handler, we can't do this as a tail call 6619 * because rIBASE is caller save and we need to reload it. 6620 * 6621 * Note that unlike in the Arm implementation, we should never arrive 6622 * here with a zero breakFlag because we always refresh rIBASE on 6623 * return. 6624 */ 6625 .extern MterpCheckBefore 6626 REFRESH_IBASE 6627 movq rSELF, OUT_ARG0 6628 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6629 movq rPC, OUT_ARG2 6630 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6631 jmp .L_op_nop+(17*128) 6632 6633 /* ------------------------------ */ 6634 .balign 128 6635 .L_ALT_op_const_4: /* 0x12 */ 6636 /* File: x86_64/alt_stub.S */ 6637 /* 6638 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6639 * any interesting requests and then jump to the real instruction 6640 * handler. Unlike the Arm handler, we can't do this as a tail call 6641 * because rIBASE is caller save and we need to reload it. 6642 * 6643 * Note that unlike in the Arm implementation, we should never arrive 6644 * here with a zero breakFlag because we always refresh rIBASE on 6645 * return. 6646 */ 6647 .extern MterpCheckBefore 6648 REFRESH_IBASE 6649 movq rSELF, OUT_ARG0 6650 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6651 movq rPC, OUT_ARG2 6652 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6653 jmp .L_op_nop+(18*128) 6654 6655 /* ------------------------------ */ 6656 .balign 128 6657 .L_ALT_op_const_16: /* 0x13 */ 6658 /* File: x86_64/alt_stub.S */ 6659 /* 6660 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6661 * any interesting requests and then jump to the real instruction 6662 * handler. Unlike the Arm handler, we can't do this as a tail call 6663 * because rIBASE is caller save and we need to reload it. 6664 * 6665 * Note that unlike in the Arm implementation, we should never arrive 6666 * here with a zero breakFlag because we always refresh rIBASE on 6667 * return. 6668 */ 6669 .extern MterpCheckBefore 6670 REFRESH_IBASE 6671 movq rSELF, OUT_ARG0 6672 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6673 movq rPC, OUT_ARG2 6674 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6675 jmp .L_op_nop+(19*128) 6676 6677 /* ------------------------------ */ 6678 .balign 128 6679 .L_ALT_op_const: /* 0x14 */ 6680 /* File: x86_64/alt_stub.S */ 6681 /* 6682 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6683 * any interesting requests and then jump to the real instruction 6684 * handler. Unlike the Arm handler, we can't do this as a tail call 6685 * because rIBASE is caller save and we need to reload it. 6686 * 6687 * Note that unlike in the Arm implementation, we should never arrive 6688 * here with a zero breakFlag because we always refresh rIBASE on 6689 * return. 6690 */ 6691 .extern MterpCheckBefore 6692 REFRESH_IBASE 6693 movq rSELF, OUT_ARG0 6694 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6695 movq rPC, OUT_ARG2 6696 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6697 jmp .L_op_nop+(20*128) 6698 6699 /* ------------------------------ */ 6700 .balign 128 6701 .L_ALT_op_const_high16: /* 0x15 */ 6702 /* File: x86_64/alt_stub.S */ 6703 /* 6704 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6705 * any interesting requests and then jump to the real instruction 6706 * handler. Unlike the Arm handler, we can't do this as a tail call 6707 * because rIBASE is caller save and we need to reload it. 6708 * 6709 * Note that unlike in the Arm implementation, we should never arrive 6710 * here with a zero breakFlag because we always refresh rIBASE on 6711 * return. 6712 */ 6713 .extern MterpCheckBefore 6714 REFRESH_IBASE 6715 movq rSELF, OUT_ARG0 6716 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6717 movq rPC, OUT_ARG2 6718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6719 jmp .L_op_nop+(21*128) 6720 6721 /* ------------------------------ */ 6722 .balign 128 6723 .L_ALT_op_const_wide_16: /* 0x16 */ 6724 /* File: x86_64/alt_stub.S */ 6725 /* 6726 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6727 * any interesting requests and then jump to the real instruction 6728 * handler. Unlike the Arm handler, we can't do this as a tail call 6729 * because rIBASE is caller save and we need to reload it. 6730 * 6731 * Note that unlike in the Arm implementation, we should never arrive 6732 * here with a zero breakFlag because we always refresh rIBASE on 6733 * return. 6734 */ 6735 .extern MterpCheckBefore 6736 REFRESH_IBASE 6737 movq rSELF, OUT_ARG0 6738 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6739 movq rPC, OUT_ARG2 6740 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6741 jmp .L_op_nop+(22*128) 6742 6743 /* ------------------------------ */ 6744 .balign 128 6745 .L_ALT_op_const_wide_32: /* 0x17 */ 6746 /* File: x86_64/alt_stub.S */ 6747 /* 6748 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6749 * any interesting requests and then jump to the real instruction 6750 * handler. Unlike the Arm handler, we can't do this as a tail call 6751 * because rIBASE is caller save and we need to reload it. 6752 * 6753 * Note that unlike in the Arm implementation, we should never arrive 6754 * here with a zero breakFlag because we always refresh rIBASE on 6755 * return. 6756 */ 6757 .extern MterpCheckBefore 6758 REFRESH_IBASE 6759 movq rSELF, OUT_ARG0 6760 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6761 movq rPC, OUT_ARG2 6762 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6763 jmp .L_op_nop+(23*128) 6764 6765 /* ------------------------------ */ 6766 .balign 128 6767 .L_ALT_op_const_wide: /* 0x18 */ 6768 /* File: x86_64/alt_stub.S */ 6769 /* 6770 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6771 * any interesting requests and then jump to the real instruction 6772 * handler. Unlike the Arm handler, we can't do this as a tail call 6773 * because rIBASE is caller save and we need to reload it. 6774 * 6775 * Note that unlike in the Arm implementation, we should never arrive 6776 * here with a zero breakFlag because we always refresh rIBASE on 6777 * return. 6778 */ 6779 .extern MterpCheckBefore 6780 REFRESH_IBASE 6781 movq rSELF, OUT_ARG0 6782 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6783 movq rPC, OUT_ARG2 6784 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6785 jmp .L_op_nop+(24*128) 6786 6787 /* ------------------------------ */ 6788 .balign 128 6789 .L_ALT_op_const_wide_high16: /* 0x19 */ 6790 /* File: x86_64/alt_stub.S */ 6791 /* 6792 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6793 * any interesting requests and then jump to the real instruction 6794 * handler. Unlike the Arm handler, we can't do this as a tail call 6795 * because rIBASE is caller save and we need to reload it. 6796 * 6797 * Note that unlike in the Arm implementation, we should never arrive 6798 * here with a zero breakFlag because we always refresh rIBASE on 6799 * return. 6800 */ 6801 .extern MterpCheckBefore 6802 REFRESH_IBASE 6803 movq rSELF, OUT_ARG0 6804 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6805 movq rPC, OUT_ARG2 6806 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6807 jmp .L_op_nop+(25*128) 6808 6809 /* ------------------------------ */ 6810 .balign 128 6811 .L_ALT_op_const_string: /* 0x1a */ 6812 /* File: x86_64/alt_stub.S */ 6813 /* 6814 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6815 * any interesting requests and then jump to the real instruction 6816 * handler. Unlike the Arm handler, we can't do this as a tail call 6817 * because rIBASE is caller save and we need to reload it. 6818 * 6819 * Note that unlike in the Arm implementation, we should never arrive 6820 * here with a zero breakFlag because we always refresh rIBASE on 6821 * return. 6822 */ 6823 .extern MterpCheckBefore 6824 REFRESH_IBASE 6825 movq rSELF, OUT_ARG0 6826 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6827 movq rPC, OUT_ARG2 6828 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6829 jmp .L_op_nop+(26*128) 6830 6831 /* ------------------------------ */ 6832 .balign 128 6833 .L_ALT_op_const_string_jumbo: /* 0x1b */ 6834 /* File: x86_64/alt_stub.S */ 6835 /* 6836 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6837 * any interesting requests and then jump to the real instruction 6838 * handler. Unlike the Arm handler, we can't do this as a tail call 6839 * because rIBASE is caller save and we need to reload it. 6840 * 6841 * Note that unlike in the Arm implementation, we should never arrive 6842 * here with a zero breakFlag because we always refresh rIBASE on 6843 * return. 6844 */ 6845 .extern MterpCheckBefore 6846 REFRESH_IBASE 6847 movq rSELF, OUT_ARG0 6848 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6849 movq rPC, OUT_ARG2 6850 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6851 jmp .L_op_nop+(27*128) 6852 6853 /* ------------------------------ */ 6854 .balign 128 6855 .L_ALT_op_const_class: /* 0x1c */ 6856 /* File: x86_64/alt_stub.S */ 6857 /* 6858 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6859 * any interesting requests and then jump to the real instruction 6860 * handler. Unlike the Arm handler, we can't do this as a tail call 6861 * because rIBASE is caller save and we need to reload it. 6862 * 6863 * Note that unlike in the Arm implementation, we should never arrive 6864 * here with a zero breakFlag because we always refresh rIBASE on 6865 * return. 6866 */ 6867 .extern MterpCheckBefore 6868 REFRESH_IBASE 6869 movq rSELF, OUT_ARG0 6870 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6871 movq rPC, OUT_ARG2 6872 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6873 jmp .L_op_nop+(28*128) 6874 6875 /* ------------------------------ */ 6876 .balign 128 6877 .L_ALT_op_monitor_enter: /* 0x1d */ 6878 /* File: x86_64/alt_stub.S */ 6879 /* 6880 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6881 * any interesting requests and then jump to the real instruction 6882 * handler. Unlike the Arm handler, we can't do this as a tail call 6883 * because rIBASE is caller save and we need to reload it. 6884 * 6885 * Note that unlike in the Arm implementation, we should never arrive 6886 * here with a zero breakFlag because we always refresh rIBASE on 6887 * return. 6888 */ 6889 .extern MterpCheckBefore 6890 REFRESH_IBASE 6891 movq rSELF, OUT_ARG0 6892 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6893 movq rPC, OUT_ARG2 6894 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6895 jmp .L_op_nop+(29*128) 6896 6897 /* ------------------------------ */ 6898 .balign 128 6899 .L_ALT_op_monitor_exit: /* 0x1e */ 6900 /* File: x86_64/alt_stub.S */ 6901 /* 6902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6903 * any interesting requests and then jump to the real instruction 6904 * handler. Unlike the Arm handler, we can't do this as a tail call 6905 * because rIBASE is caller save and we need to reload it. 6906 * 6907 * Note that unlike in the Arm implementation, we should never arrive 6908 * here with a zero breakFlag because we always refresh rIBASE on 6909 * return. 6910 */ 6911 .extern MterpCheckBefore 6912 REFRESH_IBASE 6913 movq rSELF, OUT_ARG0 6914 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6915 movq rPC, OUT_ARG2 6916 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6917 jmp .L_op_nop+(30*128) 6918 6919 /* ------------------------------ */ 6920 .balign 128 6921 .L_ALT_op_check_cast: /* 0x1f */ 6922 /* File: x86_64/alt_stub.S */ 6923 /* 6924 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6925 * any interesting requests and then jump to the real instruction 6926 * handler. Unlike the Arm handler, we can't do this as a tail call 6927 * because rIBASE is caller save and we need to reload it. 6928 * 6929 * Note that unlike in the Arm implementation, we should never arrive 6930 * here with a zero breakFlag because we always refresh rIBASE on 6931 * return. 6932 */ 6933 .extern MterpCheckBefore 6934 REFRESH_IBASE 6935 movq rSELF, OUT_ARG0 6936 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6937 movq rPC, OUT_ARG2 6938 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6939 jmp .L_op_nop+(31*128) 6940 6941 /* ------------------------------ */ 6942 .balign 128 6943 .L_ALT_op_instance_of: /* 0x20 */ 6944 /* File: x86_64/alt_stub.S */ 6945 /* 6946 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6947 * any interesting requests and then jump to the real instruction 6948 * handler. Unlike the Arm handler, we can't do this as a tail call 6949 * because rIBASE is caller save and we need to reload it. 6950 * 6951 * Note that unlike in the Arm implementation, we should never arrive 6952 * here with a zero breakFlag because we always refresh rIBASE on 6953 * return. 6954 */ 6955 .extern MterpCheckBefore 6956 REFRESH_IBASE 6957 movq rSELF, OUT_ARG0 6958 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6959 movq rPC, OUT_ARG2 6960 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6961 jmp .L_op_nop+(32*128) 6962 6963 /* ------------------------------ */ 6964 .balign 128 6965 .L_ALT_op_array_length: /* 0x21 */ 6966 /* File: x86_64/alt_stub.S */ 6967 /* 6968 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6969 * any interesting requests and then jump to the real instruction 6970 * handler. Unlike the Arm handler, we can't do this as a tail call 6971 * because rIBASE is caller save and we need to reload it. 6972 * 6973 * Note that unlike in the Arm implementation, we should never arrive 6974 * here with a zero breakFlag because we always refresh rIBASE on 6975 * return. 6976 */ 6977 .extern MterpCheckBefore 6978 REFRESH_IBASE 6979 movq rSELF, OUT_ARG0 6980 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6981 movq rPC, OUT_ARG2 6982 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6983 jmp .L_op_nop+(33*128) 6984 6985 /* ------------------------------ */ 6986 .balign 128 6987 .L_ALT_op_new_instance: /* 0x22 */ 6988 /* File: x86_64/alt_stub.S */ 6989 /* 6990 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6991 * any interesting requests and then jump to the real instruction 6992 * handler. Unlike the Arm handler, we can't do this as a tail call 6993 * because rIBASE is caller save and we need to reload it. 6994 * 6995 * Note that unlike in the Arm implementation, we should never arrive 6996 * here with a zero breakFlag because we always refresh rIBASE on 6997 * return. 6998 */ 6999 .extern MterpCheckBefore 7000 REFRESH_IBASE 7001 movq rSELF, OUT_ARG0 7002 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7003 movq rPC, OUT_ARG2 7004 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7005 jmp .L_op_nop+(34*128) 7006 7007 /* ------------------------------ */ 7008 .balign 128 7009 .L_ALT_op_new_array: /* 0x23 */ 7010 /* File: x86_64/alt_stub.S */ 7011 /* 7012 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7013 * any interesting requests and then jump to the real instruction 7014 * handler. Unlike the Arm handler, we can't do this as a tail call 7015 * because rIBASE is caller save and we need to reload it. 7016 * 7017 * Note that unlike in the Arm implementation, we should never arrive 7018 * here with a zero breakFlag because we always refresh rIBASE on 7019 * return. 7020 */ 7021 .extern MterpCheckBefore 7022 REFRESH_IBASE 7023 movq rSELF, OUT_ARG0 7024 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7025 movq rPC, OUT_ARG2 7026 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7027 jmp .L_op_nop+(35*128) 7028 7029 /* ------------------------------ */ 7030 .balign 128 7031 .L_ALT_op_filled_new_array: /* 0x24 */ 7032 /* File: x86_64/alt_stub.S */ 7033 /* 7034 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7035 * any interesting requests and then jump to the real instruction 7036 * handler. Unlike the Arm handler, we can't do this as a tail call 7037 * because rIBASE is caller save and we need to reload it. 7038 * 7039 * Note that unlike in the Arm implementation, we should never arrive 7040 * here with a zero breakFlag because we always refresh rIBASE on 7041 * return. 7042 */ 7043 .extern MterpCheckBefore 7044 REFRESH_IBASE 7045 movq rSELF, OUT_ARG0 7046 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7047 movq rPC, OUT_ARG2 7048 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7049 jmp .L_op_nop+(36*128) 7050 7051 /* ------------------------------ */ 7052 .balign 128 7053 .L_ALT_op_filled_new_array_range: /* 0x25 */ 7054 /* File: x86_64/alt_stub.S */ 7055 /* 7056 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7057 * any interesting requests and then jump to the real instruction 7058 * handler. Unlike the Arm handler, we can't do this as a tail call 7059 * because rIBASE is caller save and we need to reload it. 7060 * 7061 * Note that unlike in the Arm implementation, we should never arrive 7062 * here with a zero breakFlag because we always refresh rIBASE on 7063 * return. 7064 */ 7065 .extern MterpCheckBefore 7066 REFRESH_IBASE 7067 movq rSELF, OUT_ARG0 7068 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7069 movq rPC, OUT_ARG2 7070 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7071 jmp .L_op_nop+(37*128) 7072 7073 /* ------------------------------ */ 7074 .balign 128 7075 .L_ALT_op_fill_array_data: /* 0x26 */ 7076 /* File: x86_64/alt_stub.S */ 7077 /* 7078 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7079 * any interesting requests and then jump to the real instruction 7080 * handler. Unlike the Arm handler, we can't do this as a tail call 7081 * because rIBASE is caller save and we need to reload it. 7082 * 7083 * Note that unlike in the Arm implementation, we should never arrive 7084 * here with a zero breakFlag because we always refresh rIBASE on 7085 * return. 7086 */ 7087 .extern MterpCheckBefore 7088 REFRESH_IBASE 7089 movq rSELF, OUT_ARG0 7090 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7091 movq rPC, OUT_ARG2 7092 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7093 jmp .L_op_nop+(38*128) 7094 7095 /* ------------------------------ */ 7096 .balign 128 7097 .L_ALT_op_throw: /* 0x27 */ 7098 /* File: x86_64/alt_stub.S */ 7099 /* 7100 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7101 * any interesting requests and then jump to the real instruction 7102 * handler. Unlike the Arm handler, we can't do this as a tail call 7103 * because rIBASE is caller save and we need to reload it. 7104 * 7105 * Note that unlike in the Arm implementation, we should never arrive 7106 * here with a zero breakFlag because we always refresh rIBASE on 7107 * return. 7108 */ 7109 .extern MterpCheckBefore 7110 REFRESH_IBASE 7111 movq rSELF, OUT_ARG0 7112 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7113 movq rPC, OUT_ARG2 7114 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7115 jmp .L_op_nop+(39*128) 7116 7117 /* ------------------------------ */ 7118 .balign 128 7119 .L_ALT_op_goto: /* 0x28 */ 7120 /* File: x86_64/alt_stub.S */ 7121 /* 7122 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7123 * any interesting requests and then jump to the real instruction 7124 * handler. Unlike the Arm handler, we can't do this as a tail call 7125 * because rIBASE is caller save and we need to reload it. 7126 * 7127 * Note that unlike in the Arm implementation, we should never arrive 7128 * here with a zero breakFlag because we always refresh rIBASE on 7129 * return. 7130 */ 7131 .extern MterpCheckBefore 7132 REFRESH_IBASE 7133 movq rSELF, OUT_ARG0 7134 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7135 movq rPC, OUT_ARG2 7136 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7137 jmp .L_op_nop+(40*128) 7138 7139 /* ------------------------------ */ 7140 .balign 128 7141 .L_ALT_op_goto_16: /* 0x29 */ 7142 /* File: x86_64/alt_stub.S */ 7143 /* 7144 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7145 * any interesting requests and then jump to the real instruction 7146 * handler. Unlike the Arm handler, we can't do this as a tail call 7147 * because rIBASE is caller save and we need to reload it. 7148 * 7149 * Note that unlike in the Arm implementation, we should never arrive 7150 * here with a zero breakFlag because we always refresh rIBASE on 7151 * return. 7152 */ 7153 .extern MterpCheckBefore 7154 REFRESH_IBASE 7155 movq rSELF, OUT_ARG0 7156 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7157 movq rPC, OUT_ARG2 7158 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7159 jmp .L_op_nop+(41*128) 7160 7161 /* ------------------------------ */ 7162 .balign 128 7163 .L_ALT_op_goto_32: /* 0x2a */ 7164 /* File: x86_64/alt_stub.S */ 7165 /* 7166 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7167 * any interesting requests and then jump to the real instruction 7168 * handler. Unlike the Arm handler, we can't do this as a tail call 7169 * because rIBASE is caller save and we need to reload it. 7170 * 7171 * Note that unlike in the Arm implementation, we should never arrive 7172 * here with a zero breakFlag because we always refresh rIBASE on 7173 * return. 7174 */ 7175 .extern MterpCheckBefore 7176 REFRESH_IBASE 7177 movq rSELF, OUT_ARG0 7178 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7179 movq rPC, OUT_ARG2 7180 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7181 jmp .L_op_nop+(42*128) 7182 7183 /* ------------------------------ */ 7184 .balign 128 7185 .L_ALT_op_packed_switch: /* 0x2b */ 7186 /* File: x86_64/alt_stub.S */ 7187 /* 7188 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7189 * any interesting requests and then jump to the real instruction 7190 * handler. Unlike the Arm handler, we can't do this as a tail call 7191 * because rIBASE is caller save and we need to reload it. 7192 * 7193 * Note that unlike in the Arm implementation, we should never arrive 7194 * here with a zero breakFlag because we always refresh rIBASE on 7195 * return. 7196 */ 7197 .extern MterpCheckBefore 7198 REFRESH_IBASE 7199 movq rSELF, OUT_ARG0 7200 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7201 movq rPC, OUT_ARG2 7202 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7203 jmp .L_op_nop+(43*128) 7204 7205 /* ------------------------------ */ 7206 .balign 128 7207 .L_ALT_op_sparse_switch: /* 0x2c */ 7208 /* File: x86_64/alt_stub.S */ 7209 /* 7210 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7211 * any interesting requests and then jump to the real instruction 7212 * handler. Unlike the Arm handler, we can't do this as a tail call 7213 * because rIBASE is caller save and we need to reload it. 7214 * 7215 * Note that unlike in the Arm implementation, we should never arrive 7216 * here with a zero breakFlag because we always refresh rIBASE on 7217 * return. 7218 */ 7219 .extern MterpCheckBefore 7220 REFRESH_IBASE 7221 movq rSELF, OUT_ARG0 7222 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7223 movq rPC, OUT_ARG2 7224 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7225 jmp .L_op_nop+(44*128) 7226 7227 /* ------------------------------ */ 7228 .balign 128 7229 .L_ALT_op_cmpl_float: /* 0x2d */ 7230 /* File: x86_64/alt_stub.S */ 7231 /* 7232 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7233 * any interesting requests and then jump to the real instruction 7234 * handler. Unlike the Arm handler, we can't do this as a tail call 7235 * because rIBASE is caller save and we need to reload it. 7236 * 7237 * Note that unlike in the Arm implementation, we should never arrive 7238 * here with a zero breakFlag because we always refresh rIBASE on 7239 * return. 7240 */ 7241 .extern MterpCheckBefore 7242 REFRESH_IBASE 7243 movq rSELF, OUT_ARG0 7244 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7245 movq rPC, OUT_ARG2 7246 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7247 jmp .L_op_nop+(45*128) 7248 7249 /* ------------------------------ */ 7250 .balign 128 7251 .L_ALT_op_cmpg_float: /* 0x2e */ 7252 /* File: x86_64/alt_stub.S */ 7253 /* 7254 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7255 * any interesting requests and then jump to the real instruction 7256 * handler. Unlike the Arm handler, we can't do this as a tail call 7257 * because rIBASE is caller save and we need to reload it. 7258 * 7259 * Note that unlike in the Arm implementation, we should never arrive 7260 * here with a zero breakFlag because we always refresh rIBASE on 7261 * return. 7262 */ 7263 .extern MterpCheckBefore 7264 REFRESH_IBASE 7265 movq rSELF, OUT_ARG0 7266 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7267 movq rPC, OUT_ARG2 7268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7269 jmp .L_op_nop+(46*128) 7270 7271 /* ------------------------------ */ 7272 .balign 128 7273 .L_ALT_op_cmpl_double: /* 0x2f */ 7274 /* File: x86_64/alt_stub.S */ 7275 /* 7276 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7277 * any interesting requests and then jump to the real instruction 7278 * handler. Unlike the Arm handler, we can't do this as a tail call 7279 * because rIBASE is caller save and we need to reload it. 7280 * 7281 * Note that unlike in the Arm implementation, we should never arrive 7282 * here with a zero breakFlag because we always refresh rIBASE on 7283 * return. 7284 */ 7285 .extern MterpCheckBefore 7286 REFRESH_IBASE 7287 movq rSELF, OUT_ARG0 7288 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7289 movq rPC, OUT_ARG2 7290 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7291 jmp .L_op_nop+(47*128) 7292 7293 /* ------------------------------ */ 7294 .balign 128 7295 .L_ALT_op_cmpg_double: /* 0x30 */ 7296 /* File: x86_64/alt_stub.S */ 7297 /* 7298 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7299 * any interesting requests and then jump to the real instruction 7300 * handler. Unlike the Arm handler, we can't do this as a tail call 7301 * because rIBASE is caller save and we need to reload it. 7302 * 7303 * Note that unlike in the Arm implementation, we should never arrive 7304 * here with a zero breakFlag because we always refresh rIBASE on 7305 * return. 7306 */ 7307 .extern MterpCheckBefore 7308 REFRESH_IBASE 7309 movq rSELF, OUT_ARG0 7310 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7311 movq rPC, OUT_ARG2 7312 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7313 jmp .L_op_nop+(48*128) 7314 7315 /* ------------------------------ */ 7316 .balign 128 7317 .L_ALT_op_cmp_long: /* 0x31 */ 7318 /* File: x86_64/alt_stub.S */ 7319 /* 7320 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7321 * any interesting requests and then jump to the real instruction 7322 * handler. Unlike the Arm handler, we can't do this as a tail call 7323 * because rIBASE is caller save and we need to reload it. 7324 * 7325 * Note that unlike in the Arm implementation, we should never arrive 7326 * here with a zero breakFlag because we always refresh rIBASE on 7327 * return. 7328 */ 7329 .extern MterpCheckBefore 7330 REFRESH_IBASE 7331 movq rSELF, OUT_ARG0 7332 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7333 movq rPC, OUT_ARG2 7334 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7335 jmp .L_op_nop+(49*128) 7336 7337 /* ------------------------------ */ 7338 .balign 128 7339 .L_ALT_op_if_eq: /* 0x32 */ 7340 /* File: x86_64/alt_stub.S */ 7341 /* 7342 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7343 * any interesting requests and then jump to the real instruction 7344 * handler. Unlike the Arm handler, we can't do this as a tail call 7345 * because rIBASE is caller save and we need to reload it. 7346 * 7347 * Note that unlike in the Arm implementation, we should never arrive 7348 * here with a zero breakFlag because we always refresh rIBASE on 7349 * return. 7350 */ 7351 .extern MterpCheckBefore 7352 REFRESH_IBASE 7353 movq rSELF, OUT_ARG0 7354 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7355 movq rPC, OUT_ARG2 7356 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7357 jmp .L_op_nop+(50*128) 7358 7359 /* ------------------------------ */ 7360 .balign 128 7361 .L_ALT_op_if_ne: /* 0x33 */ 7362 /* File: x86_64/alt_stub.S */ 7363 /* 7364 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7365 * any interesting requests and then jump to the real instruction 7366 * handler. Unlike the Arm handler, we can't do this as a tail call 7367 * because rIBASE is caller save and we need to reload it. 7368 * 7369 * Note that unlike in the Arm implementation, we should never arrive 7370 * here with a zero breakFlag because we always refresh rIBASE on 7371 * return. 7372 */ 7373 .extern MterpCheckBefore 7374 REFRESH_IBASE 7375 movq rSELF, OUT_ARG0 7376 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7377 movq rPC, OUT_ARG2 7378 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7379 jmp .L_op_nop+(51*128) 7380 7381 /* ------------------------------ */ 7382 .balign 128 7383 .L_ALT_op_if_lt: /* 0x34 */ 7384 /* File: x86_64/alt_stub.S */ 7385 /* 7386 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7387 * any interesting requests and then jump to the real instruction 7388 * handler. Unlike the Arm handler, we can't do this as a tail call 7389 * because rIBASE is caller save and we need to reload it. 7390 * 7391 * Note that unlike in the Arm implementation, we should never arrive 7392 * here with a zero breakFlag because we always refresh rIBASE on 7393 * return. 7394 */ 7395 .extern MterpCheckBefore 7396 REFRESH_IBASE 7397 movq rSELF, OUT_ARG0 7398 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7399 movq rPC, OUT_ARG2 7400 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7401 jmp .L_op_nop+(52*128) 7402 7403 /* ------------------------------ */ 7404 .balign 128 7405 .L_ALT_op_if_ge: /* 0x35 */ 7406 /* File: x86_64/alt_stub.S */ 7407 /* 7408 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7409 * any interesting requests and then jump to the real instruction 7410 * handler. Unlike the Arm handler, we can't do this as a tail call 7411 * because rIBASE is caller save and we need to reload it. 7412 * 7413 * Note that unlike in the Arm implementation, we should never arrive 7414 * here with a zero breakFlag because we always refresh rIBASE on 7415 * return. 7416 */ 7417 .extern MterpCheckBefore 7418 REFRESH_IBASE 7419 movq rSELF, OUT_ARG0 7420 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7421 movq rPC, OUT_ARG2 7422 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7423 jmp .L_op_nop+(53*128) 7424 7425 /* ------------------------------ */ 7426 .balign 128 7427 .L_ALT_op_if_gt: /* 0x36 */ 7428 /* File: x86_64/alt_stub.S */ 7429 /* 7430 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7431 * any interesting requests and then jump to the real instruction 7432 * handler. Unlike the Arm handler, we can't do this as a tail call 7433 * because rIBASE is caller save and we need to reload it. 7434 * 7435 * Note that unlike in the Arm implementation, we should never arrive 7436 * here with a zero breakFlag because we always refresh rIBASE on 7437 * return. 7438 */ 7439 .extern MterpCheckBefore 7440 REFRESH_IBASE 7441 movq rSELF, OUT_ARG0 7442 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7443 movq rPC, OUT_ARG2 7444 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7445 jmp .L_op_nop+(54*128) 7446 7447 /* ------------------------------ */ 7448 .balign 128 7449 .L_ALT_op_if_le: /* 0x37 */ 7450 /* File: x86_64/alt_stub.S */ 7451 /* 7452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7453 * any interesting requests and then jump to the real instruction 7454 * handler. Unlike the Arm handler, we can't do this as a tail call 7455 * because rIBASE is caller save and we need to reload it. 7456 * 7457 * Note that unlike in the Arm implementation, we should never arrive 7458 * here with a zero breakFlag because we always refresh rIBASE on 7459 * return. 7460 */ 7461 .extern MterpCheckBefore 7462 REFRESH_IBASE 7463 movq rSELF, OUT_ARG0 7464 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7465 movq rPC, OUT_ARG2 7466 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7467 jmp .L_op_nop+(55*128) 7468 7469 /* ------------------------------ */ 7470 .balign 128 7471 .L_ALT_op_if_eqz: /* 0x38 */ 7472 /* File: x86_64/alt_stub.S */ 7473 /* 7474 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7475 * any interesting requests and then jump to the real instruction 7476 * handler. Unlike the Arm handler, we can't do this as a tail call 7477 * because rIBASE is caller save and we need to reload it. 7478 * 7479 * Note that unlike in the Arm implementation, we should never arrive 7480 * here with a zero breakFlag because we always refresh rIBASE on 7481 * return. 7482 */ 7483 .extern MterpCheckBefore 7484 REFRESH_IBASE 7485 movq rSELF, OUT_ARG0 7486 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7487 movq rPC, OUT_ARG2 7488 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7489 jmp .L_op_nop+(56*128) 7490 7491 /* ------------------------------ */ 7492 .balign 128 7493 .L_ALT_op_if_nez: /* 0x39 */ 7494 /* File: x86_64/alt_stub.S */ 7495 /* 7496 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7497 * any interesting requests and then jump to the real instruction 7498 * handler. Unlike the Arm handler, we can't do this as a tail call 7499 * because rIBASE is caller save and we need to reload it. 7500 * 7501 * Note that unlike in the Arm implementation, we should never arrive 7502 * here with a zero breakFlag because we always refresh rIBASE on 7503 * return. 7504 */ 7505 .extern MterpCheckBefore 7506 REFRESH_IBASE 7507 movq rSELF, OUT_ARG0 7508 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7509 movq rPC, OUT_ARG2 7510 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7511 jmp .L_op_nop+(57*128) 7512 7513 /* ------------------------------ */ 7514 .balign 128 7515 .L_ALT_op_if_ltz: /* 0x3a */ 7516 /* File: x86_64/alt_stub.S */ 7517 /* 7518 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7519 * any interesting requests and then jump to the real instruction 7520 * handler. Unlike the Arm handler, we can't do this as a tail call 7521 * because rIBASE is caller save and we need to reload it. 7522 * 7523 * Note that unlike in the Arm implementation, we should never arrive 7524 * here with a zero breakFlag because we always refresh rIBASE on 7525 * return. 7526 */ 7527 .extern MterpCheckBefore 7528 REFRESH_IBASE 7529 movq rSELF, OUT_ARG0 7530 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7531 movq rPC, OUT_ARG2 7532 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7533 jmp .L_op_nop+(58*128) 7534 7535 /* ------------------------------ */ 7536 .balign 128 7537 .L_ALT_op_if_gez: /* 0x3b */ 7538 /* File: x86_64/alt_stub.S */ 7539 /* 7540 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7541 * any interesting requests and then jump to the real instruction 7542 * handler. Unlike the Arm handler, we can't do this as a tail call 7543 * because rIBASE is caller save and we need to reload it. 7544 * 7545 * Note that unlike in the Arm implementation, we should never arrive 7546 * here with a zero breakFlag because we always refresh rIBASE on 7547 * return. 7548 */ 7549 .extern MterpCheckBefore 7550 REFRESH_IBASE 7551 movq rSELF, OUT_ARG0 7552 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7553 movq rPC, OUT_ARG2 7554 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7555 jmp .L_op_nop+(59*128) 7556 7557 /* ------------------------------ */ 7558 .balign 128 7559 .L_ALT_op_if_gtz: /* 0x3c */ 7560 /* File: x86_64/alt_stub.S */ 7561 /* 7562 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7563 * any interesting requests and then jump to the real instruction 7564 * handler. Unlike the Arm handler, we can't do this as a tail call 7565 * because rIBASE is caller save and we need to reload it. 7566 * 7567 * Note that unlike in the Arm implementation, we should never arrive 7568 * here with a zero breakFlag because we always refresh rIBASE on 7569 * return. 7570 */ 7571 .extern MterpCheckBefore 7572 REFRESH_IBASE 7573 movq rSELF, OUT_ARG0 7574 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7575 movq rPC, OUT_ARG2 7576 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7577 jmp .L_op_nop+(60*128) 7578 7579 /* ------------------------------ */ 7580 .balign 128 7581 .L_ALT_op_if_lez: /* 0x3d */ 7582 /* File: x86_64/alt_stub.S */ 7583 /* 7584 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7585 * any interesting requests and then jump to the real instruction 7586 * handler. Unlike the Arm handler, we can't do this as a tail call 7587 * because rIBASE is caller save and we need to reload it. 7588 * 7589 * Note that unlike in the Arm implementation, we should never arrive 7590 * here with a zero breakFlag because we always refresh rIBASE on 7591 * return. 7592 */ 7593 .extern MterpCheckBefore 7594 REFRESH_IBASE 7595 movq rSELF, OUT_ARG0 7596 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7597 movq rPC, OUT_ARG2 7598 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7599 jmp .L_op_nop+(61*128) 7600 7601 /* ------------------------------ */ 7602 .balign 128 7603 .L_ALT_op_unused_3e: /* 0x3e */ 7604 /* File: x86_64/alt_stub.S */ 7605 /* 7606 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7607 * any interesting requests and then jump to the real instruction 7608 * handler. Unlike the Arm handler, we can't do this as a tail call 7609 * because rIBASE is caller save and we need to reload it. 7610 * 7611 * Note that unlike in the Arm implementation, we should never arrive 7612 * here with a zero breakFlag because we always refresh rIBASE on 7613 * return. 7614 */ 7615 .extern MterpCheckBefore 7616 REFRESH_IBASE 7617 movq rSELF, OUT_ARG0 7618 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7619 movq rPC, OUT_ARG2 7620 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7621 jmp .L_op_nop+(62*128) 7622 7623 /* ------------------------------ */ 7624 .balign 128 7625 .L_ALT_op_unused_3f: /* 0x3f */ 7626 /* File: x86_64/alt_stub.S */ 7627 /* 7628 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7629 * any interesting requests and then jump to the real instruction 7630 * handler. Unlike the Arm handler, we can't do this as a tail call 7631 * because rIBASE is caller save and we need to reload it. 7632 * 7633 * Note that unlike in the Arm implementation, we should never arrive 7634 * here with a zero breakFlag because we always refresh rIBASE on 7635 * return. 7636 */ 7637 .extern MterpCheckBefore 7638 REFRESH_IBASE 7639 movq rSELF, OUT_ARG0 7640 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7641 movq rPC, OUT_ARG2 7642 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7643 jmp .L_op_nop+(63*128) 7644 7645 /* ------------------------------ */ 7646 .balign 128 7647 .L_ALT_op_unused_40: /* 0x40 */ 7648 /* File: x86_64/alt_stub.S */ 7649 /* 7650 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7651 * any interesting requests and then jump to the real instruction 7652 * handler. Unlike the Arm handler, we can't do this as a tail call 7653 * because rIBASE is caller save and we need to reload it. 7654 * 7655 * Note that unlike in the Arm implementation, we should never arrive 7656 * here with a zero breakFlag because we always refresh rIBASE on 7657 * return. 7658 */ 7659 .extern MterpCheckBefore 7660 REFRESH_IBASE 7661 movq rSELF, OUT_ARG0 7662 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7663 movq rPC, OUT_ARG2 7664 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7665 jmp .L_op_nop+(64*128) 7666 7667 /* ------------------------------ */ 7668 .balign 128 7669 .L_ALT_op_unused_41: /* 0x41 */ 7670 /* File: x86_64/alt_stub.S */ 7671 /* 7672 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7673 * any interesting requests and then jump to the real instruction 7674 * handler. Unlike the Arm handler, we can't do this as a tail call 7675 * because rIBASE is caller save and we need to reload it. 7676 * 7677 * Note that unlike in the Arm implementation, we should never arrive 7678 * here with a zero breakFlag because we always refresh rIBASE on 7679 * return. 7680 */ 7681 .extern MterpCheckBefore 7682 REFRESH_IBASE 7683 movq rSELF, OUT_ARG0 7684 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7685 movq rPC, OUT_ARG2 7686 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7687 jmp .L_op_nop+(65*128) 7688 7689 /* ------------------------------ */ 7690 .balign 128 7691 .L_ALT_op_unused_42: /* 0x42 */ 7692 /* File: x86_64/alt_stub.S */ 7693 /* 7694 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7695 * any interesting requests and then jump to the real instruction 7696 * handler. Unlike the Arm handler, we can't do this as a tail call 7697 * because rIBASE is caller save and we need to reload it. 7698 * 7699 * Note that unlike in the Arm implementation, we should never arrive 7700 * here with a zero breakFlag because we always refresh rIBASE on 7701 * return. 7702 */ 7703 .extern MterpCheckBefore 7704 REFRESH_IBASE 7705 movq rSELF, OUT_ARG0 7706 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7707 movq rPC, OUT_ARG2 7708 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7709 jmp .L_op_nop+(66*128) 7710 7711 /* ------------------------------ */ 7712 .balign 128 7713 .L_ALT_op_unused_43: /* 0x43 */ 7714 /* File: x86_64/alt_stub.S */ 7715 /* 7716 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7717 * any interesting requests and then jump to the real instruction 7718 * handler. Unlike the Arm handler, we can't do this as a tail call 7719 * because rIBASE is caller save and we need to reload it. 7720 * 7721 * Note that unlike in the Arm implementation, we should never arrive 7722 * here with a zero breakFlag because we always refresh rIBASE on 7723 * return. 7724 */ 7725 .extern MterpCheckBefore 7726 REFRESH_IBASE 7727 movq rSELF, OUT_ARG0 7728 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7729 movq rPC, OUT_ARG2 7730 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7731 jmp .L_op_nop+(67*128) 7732 7733 /* ------------------------------ */ 7734 .balign 128 7735 .L_ALT_op_aget: /* 0x44 */ 7736 /* File: x86_64/alt_stub.S */ 7737 /* 7738 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7739 * any interesting requests and then jump to the real instruction 7740 * handler. Unlike the Arm handler, we can't do this as a tail call 7741 * because rIBASE is caller save and we need to reload it. 7742 * 7743 * Note that unlike in the Arm implementation, we should never arrive 7744 * here with a zero breakFlag because we always refresh rIBASE on 7745 * return. 7746 */ 7747 .extern MterpCheckBefore 7748 REFRESH_IBASE 7749 movq rSELF, OUT_ARG0 7750 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7751 movq rPC, OUT_ARG2 7752 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7753 jmp .L_op_nop+(68*128) 7754 7755 /* ------------------------------ */ 7756 .balign 128 7757 .L_ALT_op_aget_wide: /* 0x45 */ 7758 /* File: x86_64/alt_stub.S */ 7759 /* 7760 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7761 * any interesting requests and then jump to the real instruction 7762 * handler. Unlike the Arm handler, we can't do this as a tail call 7763 * because rIBASE is caller save and we need to reload it. 7764 * 7765 * Note that unlike in the Arm implementation, we should never arrive 7766 * here with a zero breakFlag because we always refresh rIBASE on 7767 * return. 7768 */ 7769 .extern MterpCheckBefore 7770 REFRESH_IBASE 7771 movq rSELF, OUT_ARG0 7772 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7773 movq rPC, OUT_ARG2 7774 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7775 jmp .L_op_nop+(69*128) 7776 7777 /* ------------------------------ */ 7778 .balign 128 7779 .L_ALT_op_aget_object: /* 0x46 */ 7780 /* File: x86_64/alt_stub.S */ 7781 /* 7782 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7783 * any interesting requests and then jump to the real instruction 7784 * handler. Unlike the Arm handler, we can't do this as a tail call 7785 * because rIBASE is caller save and we need to reload it. 7786 * 7787 * Note that unlike in the Arm implementation, we should never arrive 7788 * here with a zero breakFlag because we always refresh rIBASE on 7789 * return. 7790 */ 7791 .extern MterpCheckBefore 7792 REFRESH_IBASE 7793 movq rSELF, OUT_ARG0 7794 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7795 movq rPC, OUT_ARG2 7796 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7797 jmp .L_op_nop+(70*128) 7798 7799 /* ------------------------------ */ 7800 .balign 128 7801 .L_ALT_op_aget_boolean: /* 0x47 */ 7802 /* File: x86_64/alt_stub.S */ 7803 /* 7804 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7805 * any interesting requests and then jump to the real instruction 7806 * handler. Unlike the Arm handler, we can't do this as a tail call 7807 * because rIBASE is caller save and we need to reload it. 7808 * 7809 * Note that unlike in the Arm implementation, we should never arrive 7810 * here with a zero breakFlag because we always refresh rIBASE on 7811 * return. 7812 */ 7813 .extern MterpCheckBefore 7814 REFRESH_IBASE 7815 movq rSELF, OUT_ARG0 7816 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7817 movq rPC, OUT_ARG2 7818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7819 jmp .L_op_nop+(71*128) 7820 7821 /* ------------------------------ */ 7822 .balign 128 7823 .L_ALT_op_aget_byte: /* 0x48 */ 7824 /* File: x86_64/alt_stub.S */ 7825 /* 7826 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7827 * any interesting requests and then jump to the real instruction 7828 * handler. Unlike the Arm handler, we can't do this as a tail call 7829 * because rIBASE is caller save and we need to reload it. 7830 * 7831 * Note that unlike in the Arm implementation, we should never arrive 7832 * here with a zero breakFlag because we always refresh rIBASE on 7833 * return. 7834 */ 7835 .extern MterpCheckBefore 7836 REFRESH_IBASE 7837 movq rSELF, OUT_ARG0 7838 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7839 movq rPC, OUT_ARG2 7840 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7841 jmp .L_op_nop+(72*128) 7842 7843 /* ------------------------------ */ 7844 .balign 128 7845 .L_ALT_op_aget_char: /* 0x49 */ 7846 /* File: x86_64/alt_stub.S */ 7847 /* 7848 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7849 * any interesting requests and then jump to the real instruction 7850 * handler. Unlike the Arm handler, we can't do this as a tail call 7851 * because rIBASE is caller save and we need to reload it. 7852 * 7853 * Note that unlike in the Arm implementation, we should never arrive 7854 * here with a zero breakFlag because we always refresh rIBASE on 7855 * return. 7856 */ 7857 .extern MterpCheckBefore 7858 REFRESH_IBASE 7859 movq rSELF, OUT_ARG0 7860 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7861 movq rPC, OUT_ARG2 7862 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7863 jmp .L_op_nop+(73*128) 7864 7865 /* ------------------------------ */ 7866 .balign 128 7867 .L_ALT_op_aget_short: /* 0x4a */ 7868 /* File: x86_64/alt_stub.S */ 7869 /* 7870 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7871 * any interesting requests and then jump to the real instruction 7872 * handler. Unlike the Arm handler, we can't do this as a tail call 7873 * because rIBASE is caller save and we need to reload it. 7874 * 7875 * Note that unlike in the Arm implementation, we should never arrive 7876 * here with a zero breakFlag because we always refresh rIBASE on 7877 * return. 7878 */ 7879 .extern MterpCheckBefore 7880 REFRESH_IBASE 7881 movq rSELF, OUT_ARG0 7882 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7883 movq rPC, OUT_ARG2 7884 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7885 jmp .L_op_nop+(74*128) 7886 7887 /* ------------------------------ */ 7888 .balign 128 7889 .L_ALT_op_aput: /* 0x4b */ 7890 /* File: x86_64/alt_stub.S */ 7891 /* 7892 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7893 * any interesting requests and then jump to the real instruction 7894 * handler. Unlike the Arm handler, we can't do this as a tail call 7895 * because rIBASE is caller save and we need to reload it. 7896 * 7897 * Note that unlike in the Arm implementation, we should never arrive 7898 * here with a zero breakFlag because we always refresh rIBASE on 7899 * return. 7900 */ 7901 .extern MterpCheckBefore 7902 REFRESH_IBASE 7903 movq rSELF, OUT_ARG0 7904 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7905 movq rPC, OUT_ARG2 7906 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7907 jmp .L_op_nop+(75*128) 7908 7909 /* ------------------------------ */ 7910 .balign 128 7911 .L_ALT_op_aput_wide: /* 0x4c */ 7912 /* File: x86_64/alt_stub.S */ 7913 /* 7914 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7915 * any interesting requests and then jump to the real instruction 7916 * handler. Unlike the Arm handler, we can't do this as a tail call 7917 * because rIBASE is caller save and we need to reload it. 7918 * 7919 * Note that unlike in the Arm implementation, we should never arrive 7920 * here with a zero breakFlag because we always refresh rIBASE on 7921 * return. 7922 */ 7923 .extern MterpCheckBefore 7924 REFRESH_IBASE 7925 movq rSELF, OUT_ARG0 7926 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7927 movq rPC, OUT_ARG2 7928 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7929 jmp .L_op_nop+(76*128) 7930 7931 /* ------------------------------ */ 7932 .balign 128 7933 .L_ALT_op_aput_object: /* 0x4d */ 7934 /* File: x86_64/alt_stub.S */ 7935 /* 7936 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7937 * any interesting requests and then jump to the real instruction 7938 * handler. Unlike the Arm handler, we can't do this as a tail call 7939 * because rIBASE is caller save and we need to reload it. 7940 * 7941 * Note that unlike in the Arm implementation, we should never arrive 7942 * here with a zero breakFlag because we always refresh rIBASE on 7943 * return. 7944 */ 7945 .extern MterpCheckBefore 7946 REFRESH_IBASE 7947 movq rSELF, OUT_ARG0 7948 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7949 movq rPC, OUT_ARG2 7950 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7951 jmp .L_op_nop+(77*128) 7952 7953 /* ------------------------------ */ 7954 .balign 128 7955 .L_ALT_op_aput_boolean: /* 0x4e */ 7956 /* File: x86_64/alt_stub.S */ 7957 /* 7958 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7959 * any interesting requests and then jump to the real instruction 7960 * handler. Unlike the Arm handler, we can't do this as a tail call 7961 * because rIBASE is caller save and we need to reload it. 7962 * 7963 * Note that unlike in the Arm implementation, we should never arrive 7964 * here with a zero breakFlag because we always refresh rIBASE on 7965 * return. 7966 */ 7967 .extern MterpCheckBefore 7968 REFRESH_IBASE 7969 movq rSELF, OUT_ARG0 7970 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7971 movq rPC, OUT_ARG2 7972 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7973 jmp .L_op_nop+(78*128) 7974 7975 /* ------------------------------ */ 7976 .balign 128 7977 .L_ALT_op_aput_byte: /* 0x4f */ 7978 /* File: x86_64/alt_stub.S */ 7979 /* 7980 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7981 * any interesting requests and then jump to the real instruction 7982 * handler. Unlike the Arm handler, we can't do this as a tail call 7983 * because rIBASE is caller save and we need to reload it. 7984 * 7985 * Note that unlike in the Arm implementation, we should never arrive 7986 * here with a zero breakFlag because we always refresh rIBASE on 7987 * return. 7988 */ 7989 .extern MterpCheckBefore 7990 REFRESH_IBASE 7991 movq rSELF, OUT_ARG0 7992 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7993 movq rPC, OUT_ARG2 7994 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7995 jmp .L_op_nop+(79*128) 7996 7997 /* ------------------------------ */ 7998 .balign 128 7999 .L_ALT_op_aput_char: /* 0x50 */ 8000 /* File: x86_64/alt_stub.S */ 8001 /* 8002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8003 * any interesting requests and then jump to the real instruction 8004 * handler. Unlike the Arm handler, we can't do this as a tail call 8005 * because rIBASE is caller save and we need to reload it. 8006 * 8007 * Note that unlike in the Arm implementation, we should never arrive 8008 * here with a zero breakFlag because we always refresh rIBASE on 8009 * return. 8010 */ 8011 .extern MterpCheckBefore 8012 REFRESH_IBASE 8013 movq rSELF, OUT_ARG0 8014 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8015 movq rPC, OUT_ARG2 8016 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8017 jmp .L_op_nop+(80*128) 8018 8019 /* ------------------------------ */ 8020 .balign 128 8021 .L_ALT_op_aput_short: /* 0x51 */ 8022 /* File: x86_64/alt_stub.S */ 8023 /* 8024 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8025 * any interesting requests and then jump to the real instruction 8026 * handler. Unlike the Arm handler, we can't do this as a tail call 8027 * because rIBASE is caller save and we need to reload it. 8028 * 8029 * Note that unlike in the Arm implementation, we should never arrive 8030 * here with a zero breakFlag because we always refresh rIBASE on 8031 * return. 8032 */ 8033 .extern MterpCheckBefore 8034 REFRESH_IBASE 8035 movq rSELF, OUT_ARG0 8036 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8037 movq rPC, OUT_ARG2 8038 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8039 jmp .L_op_nop+(81*128) 8040 8041 /* ------------------------------ */ 8042 .balign 128 8043 .L_ALT_op_iget: /* 0x52 */ 8044 /* File: x86_64/alt_stub.S */ 8045 /* 8046 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8047 * any interesting requests and then jump to the real instruction 8048 * handler. Unlike the Arm handler, we can't do this as a tail call 8049 * because rIBASE is caller save and we need to reload it. 8050 * 8051 * Note that unlike in the Arm implementation, we should never arrive 8052 * here with a zero breakFlag because we always refresh rIBASE on 8053 * return. 8054 */ 8055 .extern MterpCheckBefore 8056 REFRESH_IBASE 8057 movq rSELF, OUT_ARG0 8058 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8059 movq rPC, OUT_ARG2 8060 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8061 jmp .L_op_nop+(82*128) 8062 8063 /* ------------------------------ */ 8064 .balign 128 8065 .L_ALT_op_iget_wide: /* 0x53 */ 8066 /* File: x86_64/alt_stub.S */ 8067 /* 8068 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8069 * any interesting requests and then jump to the real instruction 8070 * handler. Unlike the Arm handler, we can't do this as a tail call 8071 * because rIBASE is caller save and we need to reload it. 8072 * 8073 * Note that unlike in the Arm implementation, we should never arrive 8074 * here with a zero breakFlag because we always refresh rIBASE on 8075 * return. 8076 */ 8077 .extern MterpCheckBefore 8078 REFRESH_IBASE 8079 movq rSELF, OUT_ARG0 8080 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8081 movq rPC, OUT_ARG2 8082 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8083 jmp .L_op_nop+(83*128) 8084 8085 /* ------------------------------ */ 8086 .balign 128 8087 .L_ALT_op_iget_object: /* 0x54 */ 8088 /* File: x86_64/alt_stub.S */ 8089 /* 8090 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8091 * any interesting requests and then jump to the real instruction 8092 * handler. Unlike the Arm handler, we can't do this as a tail call 8093 * because rIBASE is caller save and we need to reload it. 8094 * 8095 * Note that unlike in the Arm implementation, we should never arrive 8096 * here with a zero breakFlag because we always refresh rIBASE on 8097 * return. 8098 */ 8099 .extern MterpCheckBefore 8100 REFRESH_IBASE 8101 movq rSELF, OUT_ARG0 8102 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8103 movq rPC, OUT_ARG2 8104 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8105 jmp .L_op_nop+(84*128) 8106 8107 /* ------------------------------ */ 8108 .balign 128 8109 .L_ALT_op_iget_boolean: /* 0x55 */ 8110 /* File: x86_64/alt_stub.S */ 8111 /* 8112 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8113 * any interesting requests and then jump to the real instruction 8114 * handler. Unlike the Arm handler, we can't do this as a tail call 8115 * because rIBASE is caller save and we need to reload it. 8116 * 8117 * Note that unlike in the Arm implementation, we should never arrive 8118 * here with a zero breakFlag because we always refresh rIBASE on 8119 * return. 8120 */ 8121 .extern MterpCheckBefore 8122 REFRESH_IBASE 8123 movq rSELF, OUT_ARG0 8124 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8125 movq rPC, OUT_ARG2 8126 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8127 jmp .L_op_nop+(85*128) 8128 8129 /* ------------------------------ */ 8130 .balign 128 8131 .L_ALT_op_iget_byte: /* 0x56 */ 8132 /* File: x86_64/alt_stub.S */ 8133 /* 8134 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8135 * any interesting requests and then jump to the real instruction 8136 * handler. Unlike the Arm handler, we can't do this as a tail call 8137 * because rIBASE is caller save and we need to reload it. 8138 * 8139 * Note that unlike in the Arm implementation, we should never arrive 8140 * here with a zero breakFlag because we always refresh rIBASE on 8141 * return. 8142 */ 8143 .extern MterpCheckBefore 8144 REFRESH_IBASE 8145 movq rSELF, OUT_ARG0 8146 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8147 movq rPC, OUT_ARG2 8148 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8149 jmp .L_op_nop+(86*128) 8150 8151 /* ------------------------------ */ 8152 .balign 128 8153 .L_ALT_op_iget_char: /* 0x57 */ 8154 /* File: x86_64/alt_stub.S */ 8155 /* 8156 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8157 * any interesting requests and then jump to the real instruction 8158 * handler. Unlike the Arm handler, we can't do this as a tail call 8159 * because rIBASE is caller save and we need to reload it. 8160 * 8161 * Note that unlike in the Arm implementation, we should never arrive 8162 * here with a zero breakFlag because we always refresh rIBASE on 8163 * return. 8164 */ 8165 .extern MterpCheckBefore 8166 REFRESH_IBASE 8167 movq rSELF, OUT_ARG0 8168 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8169 movq rPC, OUT_ARG2 8170 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8171 jmp .L_op_nop+(87*128) 8172 8173 /* ------------------------------ */ 8174 .balign 128 8175 .L_ALT_op_iget_short: /* 0x58 */ 8176 /* File: x86_64/alt_stub.S */ 8177 /* 8178 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8179 * any interesting requests and then jump to the real instruction 8180 * handler. Unlike the Arm handler, we can't do this as a tail call 8181 * because rIBASE is caller save and we need to reload it. 8182 * 8183 * Note that unlike in the Arm implementation, we should never arrive 8184 * here with a zero breakFlag because we always refresh rIBASE on 8185 * return. 8186 */ 8187 .extern MterpCheckBefore 8188 REFRESH_IBASE 8189 movq rSELF, OUT_ARG0 8190 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8191 movq rPC, OUT_ARG2 8192 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8193 jmp .L_op_nop+(88*128) 8194 8195 /* ------------------------------ */ 8196 .balign 128 8197 .L_ALT_op_iput: /* 0x59 */ 8198 /* File: x86_64/alt_stub.S */ 8199 /* 8200 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8201 * any interesting requests and then jump to the real instruction 8202 * handler. Unlike the Arm handler, we can't do this as a tail call 8203 * because rIBASE is caller save and we need to reload it. 8204 * 8205 * Note that unlike in the Arm implementation, we should never arrive 8206 * here with a zero breakFlag because we always refresh rIBASE on 8207 * return. 8208 */ 8209 .extern MterpCheckBefore 8210 REFRESH_IBASE 8211 movq rSELF, OUT_ARG0 8212 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8213 movq rPC, OUT_ARG2 8214 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8215 jmp .L_op_nop+(89*128) 8216 8217 /* ------------------------------ */ 8218 .balign 128 8219 .L_ALT_op_iput_wide: /* 0x5a */ 8220 /* File: x86_64/alt_stub.S */ 8221 /* 8222 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8223 * any interesting requests and then jump to the real instruction 8224 * handler. Unlike the Arm handler, we can't do this as a tail call 8225 * because rIBASE is caller save and we need to reload it. 8226 * 8227 * Note that unlike in the Arm implementation, we should never arrive 8228 * here with a zero breakFlag because we always refresh rIBASE on 8229 * return. 8230 */ 8231 .extern MterpCheckBefore 8232 REFRESH_IBASE 8233 movq rSELF, OUT_ARG0 8234 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8235 movq rPC, OUT_ARG2 8236 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8237 jmp .L_op_nop+(90*128) 8238 8239 /* ------------------------------ */ 8240 .balign 128 8241 .L_ALT_op_iput_object: /* 0x5b */ 8242 /* File: x86_64/alt_stub.S */ 8243 /* 8244 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8245 * any interesting requests and then jump to the real instruction 8246 * handler. Unlike the Arm handler, we can't do this as a tail call 8247 * because rIBASE is caller save and we need to reload it. 8248 * 8249 * Note that unlike in the Arm implementation, we should never arrive 8250 * here with a zero breakFlag because we always refresh rIBASE on 8251 * return. 8252 */ 8253 .extern MterpCheckBefore 8254 REFRESH_IBASE 8255 movq rSELF, OUT_ARG0 8256 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8257 movq rPC, OUT_ARG2 8258 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8259 jmp .L_op_nop+(91*128) 8260 8261 /* ------------------------------ */ 8262 .balign 128 8263 .L_ALT_op_iput_boolean: /* 0x5c */ 8264 /* File: x86_64/alt_stub.S */ 8265 /* 8266 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8267 * any interesting requests and then jump to the real instruction 8268 * handler. Unlike the Arm handler, we can't do this as a tail call 8269 * because rIBASE is caller save and we need to reload it. 8270 * 8271 * Note that unlike in the Arm implementation, we should never arrive 8272 * here with a zero breakFlag because we always refresh rIBASE on 8273 * return. 8274 */ 8275 .extern MterpCheckBefore 8276 REFRESH_IBASE 8277 movq rSELF, OUT_ARG0 8278 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8279 movq rPC, OUT_ARG2 8280 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8281 jmp .L_op_nop+(92*128) 8282 8283 /* ------------------------------ */ 8284 .balign 128 8285 .L_ALT_op_iput_byte: /* 0x5d */ 8286 /* File: x86_64/alt_stub.S */ 8287 /* 8288 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8289 * any interesting requests and then jump to the real instruction 8290 * handler. Unlike the Arm handler, we can't do this as a tail call 8291 * because rIBASE is caller save and we need to reload it. 8292 * 8293 * Note that unlike in the Arm implementation, we should never arrive 8294 * here with a zero breakFlag because we always refresh rIBASE on 8295 * return. 8296 */ 8297 .extern MterpCheckBefore 8298 REFRESH_IBASE 8299 movq rSELF, OUT_ARG0 8300 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8301 movq rPC, OUT_ARG2 8302 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8303 jmp .L_op_nop+(93*128) 8304 8305 /* ------------------------------ */ 8306 .balign 128 8307 .L_ALT_op_iput_char: /* 0x5e */ 8308 /* File: x86_64/alt_stub.S */ 8309 /* 8310 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8311 * any interesting requests and then jump to the real instruction 8312 * handler. Unlike the Arm handler, we can't do this as a tail call 8313 * because rIBASE is caller save and we need to reload it. 8314 * 8315 * Note that unlike in the Arm implementation, we should never arrive 8316 * here with a zero breakFlag because we always refresh rIBASE on 8317 * return. 8318 */ 8319 .extern MterpCheckBefore 8320 REFRESH_IBASE 8321 movq rSELF, OUT_ARG0 8322 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8323 movq rPC, OUT_ARG2 8324 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8325 jmp .L_op_nop+(94*128) 8326 8327 /* ------------------------------ */ 8328 .balign 128 8329 .L_ALT_op_iput_short: /* 0x5f */ 8330 /* File: x86_64/alt_stub.S */ 8331 /* 8332 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8333 * any interesting requests and then jump to the real instruction 8334 * handler. Unlike the Arm handler, we can't do this as a tail call 8335 * because rIBASE is caller save and we need to reload it. 8336 * 8337 * Note that unlike in the Arm implementation, we should never arrive 8338 * here with a zero breakFlag because we always refresh rIBASE on 8339 * return. 8340 */ 8341 .extern MterpCheckBefore 8342 REFRESH_IBASE 8343 movq rSELF, OUT_ARG0 8344 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8345 movq rPC, OUT_ARG2 8346 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8347 jmp .L_op_nop+(95*128) 8348 8349 /* ------------------------------ */ 8350 .balign 128 8351 .L_ALT_op_sget: /* 0x60 */ 8352 /* File: x86_64/alt_stub.S */ 8353 /* 8354 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8355 * any interesting requests and then jump to the real instruction 8356 * handler. Unlike the Arm handler, we can't do this as a tail call 8357 * because rIBASE is caller save and we need to reload it. 8358 * 8359 * Note that unlike in the Arm implementation, we should never arrive 8360 * here with a zero breakFlag because we always refresh rIBASE on 8361 * return. 8362 */ 8363 .extern MterpCheckBefore 8364 REFRESH_IBASE 8365 movq rSELF, OUT_ARG0 8366 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8367 movq rPC, OUT_ARG2 8368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8369 jmp .L_op_nop+(96*128) 8370 8371 /* ------------------------------ */ 8372 .balign 128 8373 .L_ALT_op_sget_wide: /* 0x61 */ 8374 /* File: x86_64/alt_stub.S */ 8375 /* 8376 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8377 * any interesting requests and then jump to the real instruction 8378 * handler. Unlike the Arm handler, we can't do this as a tail call 8379 * because rIBASE is caller save and we need to reload it. 8380 * 8381 * Note that unlike in the Arm implementation, we should never arrive 8382 * here with a zero breakFlag because we always refresh rIBASE on 8383 * return. 8384 */ 8385 .extern MterpCheckBefore 8386 REFRESH_IBASE 8387 movq rSELF, OUT_ARG0 8388 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8389 movq rPC, OUT_ARG2 8390 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8391 jmp .L_op_nop+(97*128) 8392 8393 /* ------------------------------ */ 8394 .balign 128 8395 .L_ALT_op_sget_object: /* 0x62 */ 8396 /* File: x86_64/alt_stub.S */ 8397 /* 8398 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8399 * any interesting requests and then jump to the real instruction 8400 * handler. Unlike the Arm handler, we can't do this as a tail call 8401 * because rIBASE is caller save and we need to reload it. 8402 * 8403 * Note that unlike in the Arm implementation, we should never arrive 8404 * here with a zero breakFlag because we always refresh rIBASE on 8405 * return. 8406 */ 8407 .extern MterpCheckBefore 8408 REFRESH_IBASE 8409 movq rSELF, OUT_ARG0 8410 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8411 movq rPC, OUT_ARG2 8412 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8413 jmp .L_op_nop+(98*128) 8414 8415 /* ------------------------------ */ 8416 .balign 128 8417 .L_ALT_op_sget_boolean: /* 0x63 */ 8418 /* File: x86_64/alt_stub.S */ 8419 /* 8420 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8421 * any interesting requests and then jump to the real instruction 8422 * handler. Unlike the Arm handler, we can't do this as a tail call 8423 * because rIBASE is caller save and we need to reload it. 8424 * 8425 * Note that unlike in the Arm implementation, we should never arrive 8426 * here with a zero breakFlag because we always refresh rIBASE on 8427 * return. 8428 */ 8429 .extern MterpCheckBefore 8430 REFRESH_IBASE 8431 movq rSELF, OUT_ARG0 8432 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8433 movq rPC, OUT_ARG2 8434 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8435 jmp .L_op_nop+(99*128) 8436 8437 /* ------------------------------ */ 8438 .balign 128 8439 .L_ALT_op_sget_byte: /* 0x64 */ 8440 /* File: x86_64/alt_stub.S */ 8441 /* 8442 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8443 * any interesting requests and then jump to the real instruction 8444 * handler. Unlike the Arm handler, we can't do this as a tail call 8445 * because rIBASE is caller save and we need to reload it. 8446 * 8447 * Note that unlike in the Arm implementation, we should never arrive 8448 * here with a zero breakFlag because we always refresh rIBASE on 8449 * return. 8450 */ 8451 .extern MterpCheckBefore 8452 REFRESH_IBASE 8453 movq rSELF, OUT_ARG0 8454 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8455 movq rPC, OUT_ARG2 8456 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8457 jmp .L_op_nop+(100*128) 8458 8459 /* ------------------------------ */ 8460 .balign 128 8461 .L_ALT_op_sget_char: /* 0x65 */ 8462 /* File: x86_64/alt_stub.S */ 8463 /* 8464 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8465 * any interesting requests and then jump to the real instruction 8466 * handler. Unlike the Arm handler, we can't do this as a tail call 8467 * because rIBASE is caller save and we need to reload it. 8468 * 8469 * Note that unlike in the Arm implementation, we should never arrive 8470 * here with a zero breakFlag because we always refresh rIBASE on 8471 * return. 8472 */ 8473 .extern MterpCheckBefore 8474 REFRESH_IBASE 8475 movq rSELF, OUT_ARG0 8476 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8477 movq rPC, OUT_ARG2 8478 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8479 jmp .L_op_nop+(101*128) 8480 8481 /* ------------------------------ */ 8482 .balign 128 8483 .L_ALT_op_sget_short: /* 0x66 */ 8484 /* File: x86_64/alt_stub.S */ 8485 /* 8486 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8487 * any interesting requests and then jump to the real instruction 8488 * handler. Unlike the Arm handler, we can't do this as a tail call 8489 * because rIBASE is caller save and we need to reload it. 8490 * 8491 * Note that unlike in the Arm implementation, we should never arrive 8492 * here with a zero breakFlag because we always refresh rIBASE on 8493 * return. 8494 */ 8495 .extern MterpCheckBefore 8496 REFRESH_IBASE 8497 movq rSELF, OUT_ARG0 8498 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8499 movq rPC, OUT_ARG2 8500 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8501 jmp .L_op_nop+(102*128) 8502 8503 /* ------------------------------ */ 8504 .balign 128 8505 .L_ALT_op_sput: /* 0x67 */ 8506 /* File: x86_64/alt_stub.S */ 8507 /* 8508 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8509 * any interesting requests and then jump to the real instruction 8510 * handler. Unlike the Arm handler, we can't do this as a tail call 8511 * because rIBASE is caller save and we need to reload it. 8512 * 8513 * Note that unlike in the Arm implementation, we should never arrive 8514 * here with a zero breakFlag because we always refresh rIBASE on 8515 * return. 8516 */ 8517 .extern MterpCheckBefore 8518 REFRESH_IBASE 8519 movq rSELF, OUT_ARG0 8520 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8521 movq rPC, OUT_ARG2 8522 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8523 jmp .L_op_nop+(103*128) 8524 8525 /* ------------------------------ */ 8526 .balign 128 8527 .L_ALT_op_sput_wide: /* 0x68 */ 8528 /* File: x86_64/alt_stub.S */ 8529 /* 8530 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8531 * any interesting requests and then jump to the real instruction 8532 * handler. Unlike the Arm handler, we can't do this as a tail call 8533 * because rIBASE is caller save and we need to reload it. 8534 * 8535 * Note that unlike in the Arm implementation, we should never arrive 8536 * here with a zero breakFlag because we always refresh rIBASE on 8537 * return. 8538 */ 8539 .extern MterpCheckBefore 8540 REFRESH_IBASE 8541 movq rSELF, OUT_ARG0 8542 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8543 movq rPC, OUT_ARG2 8544 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8545 jmp .L_op_nop+(104*128) 8546 8547 /* ------------------------------ */ 8548 .balign 128 8549 .L_ALT_op_sput_object: /* 0x69 */ 8550 /* File: x86_64/alt_stub.S */ 8551 /* 8552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8553 * any interesting requests and then jump to the real instruction 8554 * handler. Unlike the Arm handler, we can't do this as a tail call 8555 * because rIBASE is caller save and we need to reload it. 8556 * 8557 * Note that unlike in the Arm implementation, we should never arrive 8558 * here with a zero breakFlag because we always refresh rIBASE on 8559 * return. 8560 */ 8561 .extern MterpCheckBefore 8562 REFRESH_IBASE 8563 movq rSELF, OUT_ARG0 8564 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8565 movq rPC, OUT_ARG2 8566 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8567 jmp .L_op_nop+(105*128) 8568 8569 /* ------------------------------ */ 8570 .balign 128 8571 .L_ALT_op_sput_boolean: /* 0x6a */ 8572 /* File: x86_64/alt_stub.S */ 8573 /* 8574 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8575 * any interesting requests and then jump to the real instruction 8576 * handler. Unlike the Arm handler, we can't do this as a tail call 8577 * because rIBASE is caller save and we need to reload it. 8578 * 8579 * Note that unlike in the Arm implementation, we should never arrive 8580 * here with a zero breakFlag because we always refresh rIBASE on 8581 * return. 8582 */ 8583 .extern MterpCheckBefore 8584 REFRESH_IBASE 8585 movq rSELF, OUT_ARG0 8586 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8587 movq rPC, OUT_ARG2 8588 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8589 jmp .L_op_nop+(106*128) 8590 8591 /* ------------------------------ */ 8592 .balign 128 8593 .L_ALT_op_sput_byte: /* 0x6b */ 8594 /* File: x86_64/alt_stub.S */ 8595 /* 8596 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8597 * any interesting requests and then jump to the real instruction 8598 * handler. Unlike the Arm handler, we can't do this as a tail call 8599 * because rIBASE is caller save and we need to reload it. 8600 * 8601 * Note that unlike in the Arm implementation, we should never arrive 8602 * here with a zero breakFlag because we always refresh rIBASE on 8603 * return. 8604 */ 8605 .extern MterpCheckBefore 8606 REFRESH_IBASE 8607 movq rSELF, OUT_ARG0 8608 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8609 movq rPC, OUT_ARG2 8610 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8611 jmp .L_op_nop+(107*128) 8612 8613 /* ------------------------------ */ 8614 .balign 128 8615 .L_ALT_op_sput_char: /* 0x6c */ 8616 /* File: x86_64/alt_stub.S */ 8617 /* 8618 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8619 * any interesting requests and then jump to the real instruction 8620 * handler. Unlike the Arm handler, we can't do this as a tail call 8621 * because rIBASE is caller save and we need to reload it. 8622 * 8623 * Note that unlike in the Arm implementation, we should never arrive 8624 * here with a zero breakFlag because we always refresh rIBASE on 8625 * return. 8626 */ 8627 .extern MterpCheckBefore 8628 REFRESH_IBASE 8629 movq rSELF, OUT_ARG0 8630 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8631 movq rPC, OUT_ARG2 8632 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8633 jmp .L_op_nop+(108*128) 8634 8635 /* ------------------------------ */ 8636 .balign 128 8637 .L_ALT_op_sput_short: /* 0x6d */ 8638 /* File: x86_64/alt_stub.S */ 8639 /* 8640 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8641 * any interesting requests and then jump to the real instruction 8642 * handler. Unlike the Arm handler, we can't do this as a tail call 8643 * because rIBASE is caller save and we need to reload it. 8644 * 8645 * Note that unlike in the Arm implementation, we should never arrive 8646 * here with a zero breakFlag because we always refresh rIBASE on 8647 * return. 8648 */ 8649 .extern MterpCheckBefore 8650 REFRESH_IBASE 8651 movq rSELF, OUT_ARG0 8652 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8653 movq rPC, OUT_ARG2 8654 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8655 jmp .L_op_nop+(109*128) 8656 8657 /* ------------------------------ */ 8658 .balign 128 8659 .L_ALT_op_invoke_virtual: /* 0x6e */ 8660 /* File: x86_64/alt_stub.S */ 8661 /* 8662 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8663 * any interesting requests and then jump to the real instruction 8664 * handler. Unlike the Arm handler, we can't do this as a tail call 8665 * because rIBASE is caller save and we need to reload it. 8666 * 8667 * Note that unlike in the Arm implementation, we should never arrive 8668 * here with a zero breakFlag because we always refresh rIBASE on 8669 * return. 8670 */ 8671 .extern MterpCheckBefore 8672 REFRESH_IBASE 8673 movq rSELF, OUT_ARG0 8674 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8675 movq rPC, OUT_ARG2 8676 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8677 jmp .L_op_nop+(110*128) 8678 8679 /* ------------------------------ */ 8680 .balign 128 8681 .L_ALT_op_invoke_super: /* 0x6f */ 8682 /* File: x86_64/alt_stub.S */ 8683 /* 8684 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8685 * any interesting requests and then jump to the real instruction 8686 * handler. Unlike the Arm handler, we can't do this as a tail call 8687 * because rIBASE is caller save and we need to reload it. 8688 * 8689 * Note that unlike in the Arm implementation, we should never arrive 8690 * here with a zero breakFlag because we always refresh rIBASE on 8691 * return. 8692 */ 8693 .extern MterpCheckBefore 8694 REFRESH_IBASE 8695 movq rSELF, OUT_ARG0 8696 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8697 movq rPC, OUT_ARG2 8698 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8699 jmp .L_op_nop+(111*128) 8700 8701 /* ------------------------------ */ 8702 .balign 128 8703 .L_ALT_op_invoke_direct: /* 0x70 */ 8704 /* File: x86_64/alt_stub.S */ 8705 /* 8706 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8707 * any interesting requests and then jump to the real instruction 8708 * handler. Unlike the Arm handler, we can't do this as a tail call 8709 * because rIBASE is caller save and we need to reload it. 8710 * 8711 * Note that unlike in the Arm implementation, we should never arrive 8712 * here with a zero breakFlag because we always refresh rIBASE on 8713 * return. 8714 */ 8715 .extern MterpCheckBefore 8716 REFRESH_IBASE 8717 movq rSELF, OUT_ARG0 8718 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8719 movq rPC, OUT_ARG2 8720 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8721 jmp .L_op_nop+(112*128) 8722 8723 /* ------------------------------ */ 8724 .balign 128 8725 .L_ALT_op_invoke_static: /* 0x71 */ 8726 /* File: x86_64/alt_stub.S */ 8727 /* 8728 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8729 * any interesting requests and then jump to the real instruction 8730 * handler. Unlike the Arm handler, we can't do this as a tail call 8731 * because rIBASE is caller save and we need to reload it. 8732 * 8733 * Note that unlike in the Arm implementation, we should never arrive 8734 * here with a zero breakFlag because we always refresh rIBASE on 8735 * return. 8736 */ 8737 .extern MterpCheckBefore 8738 REFRESH_IBASE 8739 movq rSELF, OUT_ARG0 8740 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8741 movq rPC, OUT_ARG2 8742 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8743 jmp .L_op_nop+(113*128) 8744 8745 /* ------------------------------ */ 8746 .balign 128 8747 .L_ALT_op_invoke_interface: /* 0x72 */ 8748 /* File: x86_64/alt_stub.S */ 8749 /* 8750 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8751 * any interesting requests and then jump to the real instruction 8752 * handler. Unlike the Arm handler, we can't do this as a tail call 8753 * because rIBASE is caller save and we need to reload it. 8754 * 8755 * Note that unlike in the Arm implementation, we should never arrive 8756 * here with a zero breakFlag because we always refresh rIBASE on 8757 * return. 8758 */ 8759 .extern MterpCheckBefore 8760 REFRESH_IBASE 8761 movq rSELF, OUT_ARG0 8762 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8763 movq rPC, OUT_ARG2 8764 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8765 jmp .L_op_nop+(114*128) 8766 8767 /* ------------------------------ */ 8768 .balign 128 8769 .L_ALT_op_return_void_no_barrier: /* 0x73 */ 8770 /* File: x86_64/alt_stub.S */ 8771 /* 8772 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8773 * any interesting requests and then jump to the real instruction 8774 * handler. Unlike the Arm handler, we can't do this as a tail call 8775 * because rIBASE is caller save and we need to reload it. 8776 * 8777 * Note that unlike in the Arm implementation, we should never arrive 8778 * here with a zero breakFlag because we always refresh rIBASE on 8779 * return. 8780 */ 8781 .extern MterpCheckBefore 8782 REFRESH_IBASE 8783 movq rSELF, OUT_ARG0 8784 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8785 movq rPC, OUT_ARG2 8786 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8787 jmp .L_op_nop+(115*128) 8788 8789 /* ------------------------------ */ 8790 .balign 128 8791 .L_ALT_op_invoke_virtual_range: /* 0x74 */ 8792 /* File: x86_64/alt_stub.S */ 8793 /* 8794 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8795 * any interesting requests and then jump to the real instruction 8796 * handler. Unlike the Arm handler, we can't do this as a tail call 8797 * because rIBASE is caller save and we need to reload it. 8798 * 8799 * Note that unlike in the Arm implementation, we should never arrive 8800 * here with a zero breakFlag because we always refresh rIBASE on 8801 * return. 8802 */ 8803 .extern MterpCheckBefore 8804 REFRESH_IBASE 8805 movq rSELF, OUT_ARG0 8806 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8807 movq rPC, OUT_ARG2 8808 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8809 jmp .L_op_nop+(116*128) 8810 8811 /* ------------------------------ */ 8812 .balign 128 8813 .L_ALT_op_invoke_super_range: /* 0x75 */ 8814 /* File: x86_64/alt_stub.S */ 8815 /* 8816 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8817 * any interesting requests and then jump to the real instruction 8818 * handler. Unlike the Arm handler, we can't do this as a tail call 8819 * because rIBASE is caller save and we need to reload it. 8820 * 8821 * Note that unlike in the Arm implementation, we should never arrive 8822 * here with a zero breakFlag because we always refresh rIBASE on 8823 * return. 8824 */ 8825 .extern MterpCheckBefore 8826 REFRESH_IBASE 8827 movq rSELF, OUT_ARG0 8828 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8829 movq rPC, OUT_ARG2 8830 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8831 jmp .L_op_nop+(117*128) 8832 8833 /* ------------------------------ */ 8834 .balign 128 8835 .L_ALT_op_invoke_direct_range: /* 0x76 */ 8836 /* File: x86_64/alt_stub.S */ 8837 /* 8838 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8839 * any interesting requests and then jump to the real instruction 8840 * handler. Unlike the Arm handler, we can't do this as a tail call 8841 * because rIBASE is caller save and we need to reload it. 8842 * 8843 * Note that unlike in the Arm implementation, we should never arrive 8844 * here with a zero breakFlag because we always refresh rIBASE on 8845 * return. 8846 */ 8847 .extern MterpCheckBefore 8848 REFRESH_IBASE 8849 movq rSELF, OUT_ARG0 8850 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8851 movq rPC, OUT_ARG2 8852 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8853 jmp .L_op_nop+(118*128) 8854 8855 /* ------------------------------ */ 8856 .balign 128 8857 .L_ALT_op_invoke_static_range: /* 0x77 */ 8858 /* File: x86_64/alt_stub.S */ 8859 /* 8860 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8861 * any interesting requests and then jump to the real instruction 8862 * handler. Unlike the Arm handler, we can't do this as a tail call 8863 * because rIBASE is caller save and we need to reload it. 8864 * 8865 * Note that unlike in the Arm implementation, we should never arrive 8866 * here with a zero breakFlag because we always refresh rIBASE on 8867 * return. 8868 */ 8869 .extern MterpCheckBefore 8870 REFRESH_IBASE 8871 movq rSELF, OUT_ARG0 8872 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8873 movq rPC, OUT_ARG2 8874 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8875 jmp .L_op_nop+(119*128) 8876 8877 /* ------------------------------ */ 8878 .balign 128 8879 .L_ALT_op_invoke_interface_range: /* 0x78 */ 8880 /* File: x86_64/alt_stub.S */ 8881 /* 8882 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8883 * any interesting requests and then jump to the real instruction 8884 * handler. Unlike the Arm handler, we can't do this as a tail call 8885 * because rIBASE is caller save and we need to reload it. 8886 * 8887 * Note that unlike in the Arm implementation, we should never arrive 8888 * here with a zero breakFlag because we always refresh rIBASE on 8889 * return. 8890 */ 8891 .extern MterpCheckBefore 8892 REFRESH_IBASE 8893 movq rSELF, OUT_ARG0 8894 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8895 movq rPC, OUT_ARG2 8896 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8897 jmp .L_op_nop+(120*128) 8898 8899 /* ------------------------------ */ 8900 .balign 128 8901 .L_ALT_op_unused_79: /* 0x79 */ 8902 /* File: x86_64/alt_stub.S */ 8903 /* 8904 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8905 * any interesting requests and then jump to the real instruction 8906 * handler. Unlike the Arm handler, we can't do this as a tail call 8907 * because rIBASE is caller save and we need to reload it. 8908 * 8909 * Note that unlike in the Arm implementation, we should never arrive 8910 * here with a zero breakFlag because we always refresh rIBASE on 8911 * return. 8912 */ 8913 .extern MterpCheckBefore 8914 REFRESH_IBASE 8915 movq rSELF, OUT_ARG0 8916 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8917 movq rPC, OUT_ARG2 8918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8919 jmp .L_op_nop+(121*128) 8920 8921 /* ------------------------------ */ 8922 .balign 128 8923 .L_ALT_op_unused_7a: /* 0x7a */ 8924 /* File: x86_64/alt_stub.S */ 8925 /* 8926 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8927 * any interesting requests and then jump to the real instruction 8928 * handler. Unlike the Arm handler, we can't do this as a tail call 8929 * because rIBASE is caller save and we need to reload it. 8930 * 8931 * Note that unlike in the Arm implementation, we should never arrive 8932 * here with a zero breakFlag because we always refresh rIBASE on 8933 * return. 8934 */ 8935 .extern MterpCheckBefore 8936 REFRESH_IBASE 8937 movq rSELF, OUT_ARG0 8938 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8939 movq rPC, OUT_ARG2 8940 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8941 jmp .L_op_nop+(122*128) 8942 8943 /* ------------------------------ */ 8944 .balign 128 8945 .L_ALT_op_neg_int: /* 0x7b */ 8946 /* File: x86_64/alt_stub.S */ 8947 /* 8948 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8949 * any interesting requests and then jump to the real instruction 8950 * handler. Unlike the Arm handler, we can't do this as a tail call 8951 * because rIBASE is caller save and we need to reload it. 8952 * 8953 * Note that unlike in the Arm implementation, we should never arrive 8954 * here with a zero breakFlag because we always refresh rIBASE on 8955 * return. 8956 */ 8957 .extern MterpCheckBefore 8958 REFRESH_IBASE 8959 movq rSELF, OUT_ARG0 8960 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8961 movq rPC, OUT_ARG2 8962 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8963 jmp .L_op_nop+(123*128) 8964 8965 /* ------------------------------ */ 8966 .balign 128 8967 .L_ALT_op_not_int: /* 0x7c */ 8968 /* File: x86_64/alt_stub.S */ 8969 /* 8970 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8971 * any interesting requests and then jump to the real instruction 8972 * handler. Unlike the Arm handler, we can't do this as a tail call 8973 * because rIBASE is caller save and we need to reload it. 8974 * 8975 * Note that unlike in the Arm implementation, we should never arrive 8976 * here with a zero breakFlag because we always refresh rIBASE on 8977 * return. 8978 */ 8979 .extern MterpCheckBefore 8980 REFRESH_IBASE 8981 movq rSELF, OUT_ARG0 8982 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8983 movq rPC, OUT_ARG2 8984 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8985 jmp .L_op_nop+(124*128) 8986 8987 /* ------------------------------ */ 8988 .balign 128 8989 .L_ALT_op_neg_long: /* 0x7d */ 8990 /* File: x86_64/alt_stub.S */ 8991 /* 8992 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8993 * any interesting requests and then jump to the real instruction 8994 * handler. Unlike the Arm handler, we can't do this as a tail call 8995 * because rIBASE is caller save and we need to reload it. 8996 * 8997 * Note that unlike in the Arm implementation, we should never arrive 8998 * here with a zero breakFlag because we always refresh rIBASE on 8999 * return. 9000 */ 9001 .extern MterpCheckBefore 9002 REFRESH_IBASE 9003 movq rSELF, OUT_ARG0 9004 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9005 movq rPC, OUT_ARG2 9006 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9007 jmp .L_op_nop+(125*128) 9008 9009 /* ------------------------------ */ 9010 .balign 128 9011 .L_ALT_op_not_long: /* 0x7e */ 9012 /* File: x86_64/alt_stub.S */ 9013 /* 9014 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9015 * any interesting requests and then jump to the real instruction 9016 * handler. Unlike the Arm handler, we can't do this as a tail call 9017 * because rIBASE is caller save and we need to reload it. 9018 * 9019 * Note that unlike in the Arm implementation, we should never arrive 9020 * here with a zero breakFlag because we always refresh rIBASE on 9021 * return. 9022 */ 9023 .extern MterpCheckBefore 9024 REFRESH_IBASE 9025 movq rSELF, OUT_ARG0 9026 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9027 movq rPC, OUT_ARG2 9028 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9029 jmp .L_op_nop+(126*128) 9030 9031 /* ------------------------------ */ 9032 .balign 128 9033 .L_ALT_op_neg_float: /* 0x7f */ 9034 /* File: x86_64/alt_stub.S */ 9035 /* 9036 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9037 * any interesting requests and then jump to the real instruction 9038 * handler. Unlike the Arm handler, we can't do this as a tail call 9039 * because rIBASE is caller save and we need to reload it. 9040 * 9041 * Note that unlike in the Arm implementation, we should never arrive 9042 * here with a zero breakFlag because we always refresh rIBASE on 9043 * return. 9044 */ 9045 .extern MterpCheckBefore 9046 REFRESH_IBASE 9047 movq rSELF, OUT_ARG0 9048 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9049 movq rPC, OUT_ARG2 9050 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9051 jmp .L_op_nop+(127*128) 9052 9053 /* ------------------------------ */ 9054 .balign 128 9055 .L_ALT_op_neg_double: /* 0x80 */ 9056 /* File: x86_64/alt_stub.S */ 9057 /* 9058 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9059 * any interesting requests and then jump to the real instruction 9060 * handler. Unlike the Arm handler, we can't do this as a tail call 9061 * because rIBASE is caller save and we need to reload it. 9062 * 9063 * Note that unlike in the Arm implementation, we should never arrive 9064 * here with a zero breakFlag because we always refresh rIBASE on 9065 * return. 9066 */ 9067 .extern MterpCheckBefore 9068 REFRESH_IBASE 9069 movq rSELF, OUT_ARG0 9070 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9071 movq rPC, OUT_ARG2 9072 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9073 jmp .L_op_nop+(128*128) 9074 9075 /* ------------------------------ */ 9076 .balign 128 9077 .L_ALT_op_int_to_long: /* 0x81 */ 9078 /* File: x86_64/alt_stub.S */ 9079 /* 9080 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9081 * any interesting requests and then jump to the real instruction 9082 * handler. Unlike the Arm handler, we can't do this as a tail call 9083 * because rIBASE is caller save and we need to reload it. 9084 * 9085 * Note that unlike in the Arm implementation, we should never arrive 9086 * here with a zero breakFlag because we always refresh rIBASE on 9087 * return. 9088 */ 9089 .extern MterpCheckBefore 9090 REFRESH_IBASE 9091 movq rSELF, OUT_ARG0 9092 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9093 movq rPC, OUT_ARG2 9094 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9095 jmp .L_op_nop+(129*128) 9096 9097 /* ------------------------------ */ 9098 .balign 128 9099 .L_ALT_op_int_to_float: /* 0x82 */ 9100 /* File: x86_64/alt_stub.S */ 9101 /* 9102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9103 * any interesting requests and then jump to the real instruction 9104 * handler. Unlike the Arm handler, we can't do this as a tail call 9105 * because rIBASE is caller save and we need to reload it. 9106 * 9107 * Note that unlike in the Arm implementation, we should never arrive 9108 * here with a zero breakFlag because we always refresh rIBASE on 9109 * return. 9110 */ 9111 .extern MterpCheckBefore 9112 REFRESH_IBASE 9113 movq rSELF, OUT_ARG0 9114 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9115 movq rPC, OUT_ARG2 9116 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9117 jmp .L_op_nop+(130*128) 9118 9119 /* ------------------------------ */ 9120 .balign 128 9121 .L_ALT_op_int_to_double: /* 0x83 */ 9122 /* File: x86_64/alt_stub.S */ 9123 /* 9124 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9125 * any interesting requests and then jump to the real instruction 9126 * handler. Unlike the Arm handler, we can't do this as a tail call 9127 * because rIBASE is caller save and we need to reload it. 9128 * 9129 * Note that unlike in the Arm implementation, we should never arrive 9130 * here with a zero breakFlag because we always refresh rIBASE on 9131 * return. 9132 */ 9133 .extern MterpCheckBefore 9134 REFRESH_IBASE 9135 movq rSELF, OUT_ARG0 9136 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9137 movq rPC, OUT_ARG2 9138 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9139 jmp .L_op_nop+(131*128) 9140 9141 /* ------------------------------ */ 9142 .balign 128 9143 .L_ALT_op_long_to_int: /* 0x84 */ 9144 /* File: x86_64/alt_stub.S */ 9145 /* 9146 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9147 * any interesting requests and then jump to the real instruction 9148 * handler. Unlike the Arm handler, we can't do this as a tail call 9149 * because rIBASE is caller save and we need to reload it. 9150 * 9151 * Note that unlike in the Arm implementation, we should never arrive 9152 * here with a zero breakFlag because we always refresh rIBASE on 9153 * return. 9154 */ 9155 .extern MterpCheckBefore 9156 REFRESH_IBASE 9157 movq rSELF, OUT_ARG0 9158 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9159 movq rPC, OUT_ARG2 9160 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9161 jmp .L_op_nop+(132*128) 9162 9163 /* ------------------------------ */ 9164 .balign 128 9165 .L_ALT_op_long_to_float: /* 0x85 */ 9166 /* File: x86_64/alt_stub.S */ 9167 /* 9168 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9169 * any interesting requests and then jump to the real instruction 9170 * handler. Unlike the Arm handler, we can't do this as a tail call 9171 * because rIBASE is caller save and we need to reload it. 9172 * 9173 * Note that unlike in the Arm implementation, we should never arrive 9174 * here with a zero breakFlag because we always refresh rIBASE on 9175 * return. 9176 */ 9177 .extern MterpCheckBefore 9178 REFRESH_IBASE 9179 movq rSELF, OUT_ARG0 9180 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9181 movq rPC, OUT_ARG2 9182 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9183 jmp .L_op_nop+(133*128) 9184 9185 /* ------------------------------ */ 9186 .balign 128 9187 .L_ALT_op_long_to_double: /* 0x86 */ 9188 /* File: x86_64/alt_stub.S */ 9189 /* 9190 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9191 * any interesting requests and then jump to the real instruction 9192 * handler. Unlike the Arm handler, we can't do this as a tail call 9193 * because rIBASE is caller save and we need to reload it. 9194 * 9195 * Note that unlike in the Arm implementation, we should never arrive 9196 * here with a zero breakFlag because we always refresh rIBASE on 9197 * return. 9198 */ 9199 .extern MterpCheckBefore 9200 REFRESH_IBASE 9201 movq rSELF, OUT_ARG0 9202 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9203 movq rPC, OUT_ARG2 9204 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9205 jmp .L_op_nop+(134*128) 9206 9207 /* ------------------------------ */ 9208 .balign 128 9209 .L_ALT_op_float_to_int: /* 0x87 */ 9210 /* File: x86_64/alt_stub.S */ 9211 /* 9212 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9213 * any interesting requests and then jump to the real instruction 9214 * handler. Unlike the Arm handler, we can't do this as a tail call 9215 * because rIBASE is caller save and we need to reload it. 9216 * 9217 * Note that unlike in the Arm implementation, we should never arrive 9218 * here with a zero breakFlag because we always refresh rIBASE on 9219 * return. 9220 */ 9221 .extern MterpCheckBefore 9222 REFRESH_IBASE 9223 movq rSELF, OUT_ARG0 9224 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9225 movq rPC, OUT_ARG2 9226 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9227 jmp .L_op_nop+(135*128) 9228 9229 /* ------------------------------ */ 9230 .balign 128 9231 .L_ALT_op_float_to_long: /* 0x88 */ 9232 /* File: x86_64/alt_stub.S */ 9233 /* 9234 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9235 * any interesting requests and then jump to the real instruction 9236 * handler. Unlike the Arm handler, we can't do this as a tail call 9237 * because rIBASE is caller save and we need to reload it. 9238 * 9239 * Note that unlike in the Arm implementation, we should never arrive 9240 * here with a zero breakFlag because we always refresh rIBASE on 9241 * return. 9242 */ 9243 .extern MterpCheckBefore 9244 REFRESH_IBASE 9245 movq rSELF, OUT_ARG0 9246 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9247 movq rPC, OUT_ARG2 9248 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9249 jmp .L_op_nop+(136*128) 9250 9251 /* ------------------------------ */ 9252 .balign 128 9253 .L_ALT_op_float_to_double: /* 0x89 */ 9254 /* File: x86_64/alt_stub.S */ 9255 /* 9256 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9257 * any interesting requests and then jump to the real instruction 9258 * handler. Unlike the Arm handler, we can't do this as a tail call 9259 * because rIBASE is caller save and we need to reload it. 9260 * 9261 * Note that unlike in the Arm implementation, we should never arrive 9262 * here with a zero breakFlag because we always refresh rIBASE on 9263 * return. 9264 */ 9265 .extern MterpCheckBefore 9266 REFRESH_IBASE 9267 movq rSELF, OUT_ARG0 9268 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9269 movq rPC, OUT_ARG2 9270 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9271 jmp .L_op_nop+(137*128) 9272 9273 /* ------------------------------ */ 9274 .balign 128 9275 .L_ALT_op_double_to_int: /* 0x8a */ 9276 /* File: x86_64/alt_stub.S */ 9277 /* 9278 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9279 * any interesting requests and then jump to the real instruction 9280 * handler. Unlike the Arm handler, we can't do this as a tail call 9281 * because rIBASE is caller save and we need to reload it. 9282 * 9283 * Note that unlike in the Arm implementation, we should never arrive 9284 * here with a zero breakFlag because we always refresh rIBASE on 9285 * return. 9286 */ 9287 .extern MterpCheckBefore 9288 REFRESH_IBASE 9289 movq rSELF, OUT_ARG0 9290 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9291 movq rPC, OUT_ARG2 9292 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9293 jmp .L_op_nop+(138*128) 9294 9295 /* ------------------------------ */ 9296 .balign 128 9297 .L_ALT_op_double_to_long: /* 0x8b */ 9298 /* File: x86_64/alt_stub.S */ 9299 /* 9300 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9301 * any interesting requests and then jump to the real instruction 9302 * handler. Unlike the Arm handler, we can't do this as a tail call 9303 * because rIBASE is caller save and we need to reload it. 9304 * 9305 * Note that unlike in the Arm implementation, we should never arrive 9306 * here with a zero breakFlag because we always refresh rIBASE on 9307 * return. 9308 */ 9309 .extern MterpCheckBefore 9310 REFRESH_IBASE 9311 movq rSELF, OUT_ARG0 9312 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9313 movq rPC, OUT_ARG2 9314 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9315 jmp .L_op_nop+(139*128) 9316 9317 /* ------------------------------ */ 9318 .balign 128 9319 .L_ALT_op_double_to_float: /* 0x8c */ 9320 /* File: x86_64/alt_stub.S */ 9321 /* 9322 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9323 * any interesting requests and then jump to the real instruction 9324 * handler. Unlike the Arm handler, we can't do this as a tail call 9325 * because rIBASE is caller save and we need to reload it. 9326 * 9327 * Note that unlike in the Arm implementation, we should never arrive 9328 * here with a zero breakFlag because we always refresh rIBASE on 9329 * return. 9330 */ 9331 .extern MterpCheckBefore 9332 REFRESH_IBASE 9333 movq rSELF, OUT_ARG0 9334 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9335 movq rPC, OUT_ARG2 9336 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9337 jmp .L_op_nop+(140*128) 9338 9339 /* ------------------------------ */ 9340 .balign 128 9341 .L_ALT_op_int_to_byte: /* 0x8d */ 9342 /* File: x86_64/alt_stub.S */ 9343 /* 9344 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9345 * any interesting requests and then jump to the real instruction 9346 * handler. Unlike the Arm handler, we can't do this as a tail call 9347 * because rIBASE is caller save and we need to reload it. 9348 * 9349 * Note that unlike in the Arm implementation, we should never arrive 9350 * here with a zero breakFlag because we always refresh rIBASE on 9351 * return. 9352 */ 9353 .extern MterpCheckBefore 9354 REFRESH_IBASE 9355 movq rSELF, OUT_ARG0 9356 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9357 movq rPC, OUT_ARG2 9358 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9359 jmp .L_op_nop+(141*128) 9360 9361 /* ------------------------------ */ 9362 .balign 128 9363 .L_ALT_op_int_to_char: /* 0x8e */ 9364 /* File: x86_64/alt_stub.S */ 9365 /* 9366 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9367 * any interesting requests and then jump to the real instruction 9368 * handler. Unlike the Arm handler, we can't do this as a tail call 9369 * because rIBASE is caller save and we need to reload it. 9370 * 9371 * Note that unlike in the Arm implementation, we should never arrive 9372 * here with a zero breakFlag because we always refresh rIBASE on 9373 * return. 9374 */ 9375 .extern MterpCheckBefore 9376 REFRESH_IBASE 9377 movq rSELF, OUT_ARG0 9378 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9379 movq rPC, OUT_ARG2 9380 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9381 jmp .L_op_nop+(142*128) 9382 9383 /* ------------------------------ */ 9384 .balign 128 9385 .L_ALT_op_int_to_short: /* 0x8f */ 9386 /* File: x86_64/alt_stub.S */ 9387 /* 9388 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9389 * any interesting requests and then jump to the real instruction 9390 * handler. Unlike the Arm handler, we can't do this as a tail call 9391 * because rIBASE is caller save and we need to reload it. 9392 * 9393 * Note that unlike in the Arm implementation, we should never arrive 9394 * here with a zero breakFlag because we always refresh rIBASE on 9395 * return. 9396 */ 9397 .extern MterpCheckBefore 9398 REFRESH_IBASE 9399 movq rSELF, OUT_ARG0 9400 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9401 movq rPC, OUT_ARG2 9402 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9403 jmp .L_op_nop+(143*128) 9404 9405 /* ------------------------------ */ 9406 .balign 128 9407 .L_ALT_op_add_int: /* 0x90 */ 9408 /* File: x86_64/alt_stub.S */ 9409 /* 9410 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9411 * any interesting requests and then jump to the real instruction 9412 * handler. Unlike the Arm handler, we can't do this as a tail call 9413 * because rIBASE is caller save and we need to reload it. 9414 * 9415 * Note that unlike in the Arm implementation, we should never arrive 9416 * here with a zero breakFlag because we always refresh rIBASE on 9417 * return. 9418 */ 9419 .extern MterpCheckBefore 9420 REFRESH_IBASE 9421 movq rSELF, OUT_ARG0 9422 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9423 movq rPC, OUT_ARG2 9424 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9425 jmp .L_op_nop+(144*128) 9426 9427 /* ------------------------------ */ 9428 .balign 128 9429 .L_ALT_op_sub_int: /* 0x91 */ 9430 /* File: x86_64/alt_stub.S */ 9431 /* 9432 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9433 * any interesting requests and then jump to the real instruction 9434 * handler. Unlike the Arm handler, we can't do this as a tail call 9435 * because rIBASE is caller save and we need to reload it. 9436 * 9437 * Note that unlike in the Arm implementation, we should never arrive 9438 * here with a zero breakFlag because we always refresh rIBASE on 9439 * return. 9440 */ 9441 .extern MterpCheckBefore 9442 REFRESH_IBASE 9443 movq rSELF, OUT_ARG0 9444 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9445 movq rPC, OUT_ARG2 9446 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9447 jmp .L_op_nop+(145*128) 9448 9449 /* ------------------------------ */ 9450 .balign 128 9451 .L_ALT_op_mul_int: /* 0x92 */ 9452 /* File: x86_64/alt_stub.S */ 9453 /* 9454 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9455 * any interesting requests and then jump to the real instruction 9456 * handler. Unlike the Arm handler, we can't do this as a tail call 9457 * because rIBASE is caller save and we need to reload it. 9458 * 9459 * Note that unlike in the Arm implementation, we should never arrive 9460 * here with a zero breakFlag because we always refresh rIBASE on 9461 * return. 9462 */ 9463 .extern MterpCheckBefore 9464 REFRESH_IBASE 9465 movq rSELF, OUT_ARG0 9466 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9467 movq rPC, OUT_ARG2 9468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9469 jmp .L_op_nop+(146*128) 9470 9471 /* ------------------------------ */ 9472 .balign 128 9473 .L_ALT_op_div_int: /* 0x93 */ 9474 /* File: x86_64/alt_stub.S */ 9475 /* 9476 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9477 * any interesting requests and then jump to the real instruction 9478 * handler. Unlike the Arm handler, we can't do this as a tail call 9479 * because rIBASE is caller save and we need to reload it. 9480 * 9481 * Note that unlike in the Arm implementation, we should never arrive 9482 * here with a zero breakFlag because we always refresh rIBASE on 9483 * return. 9484 */ 9485 .extern MterpCheckBefore 9486 REFRESH_IBASE 9487 movq rSELF, OUT_ARG0 9488 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9489 movq rPC, OUT_ARG2 9490 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9491 jmp .L_op_nop+(147*128) 9492 9493 /* ------------------------------ */ 9494 .balign 128 9495 .L_ALT_op_rem_int: /* 0x94 */ 9496 /* File: x86_64/alt_stub.S */ 9497 /* 9498 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9499 * any interesting requests and then jump to the real instruction 9500 * handler. Unlike the Arm handler, we can't do this as a tail call 9501 * because rIBASE is caller save and we need to reload it. 9502 * 9503 * Note that unlike in the Arm implementation, we should never arrive 9504 * here with a zero breakFlag because we always refresh rIBASE on 9505 * return. 9506 */ 9507 .extern MterpCheckBefore 9508 REFRESH_IBASE 9509 movq rSELF, OUT_ARG0 9510 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9511 movq rPC, OUT_ARG2 9512 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9513 jmp .L_op_nop+(148*128) 9514 9515 /* ------------------------------ */ 9516 .balign 128 9517 .L_ALT_op_and_int: /* 0x95 */ 9518 /* File: x86_64/alt_stub.S */ 9519 /* 9520 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9521 * any interesting requests and then jump to the real instruction 9522 * handler. Unlike the Arm handler, we can't do this as a tail call 9523 * because rIBASE is caller save and we need to reload it. 9524 * 9525 * Note that unlike in the Arm implementation, we should never arrive 9526 * here with a zero breakFlag because we always refresh rIBASE on 9527 * return. 9528 */ 9529 .extern MterpCheckBefore 9530 REFRESH_IBASE 9531 movq rSELF, OUT_ARG0 9532 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9533 movq rPC, OUT_ARG2 9534 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9535 jmp .L_op_nop+(149*128) 9536 9537 /* ------------------------------ */ 9538 .balign 128 9539 .L_ALT_op_or_int: /* 0x96 */ 9540 /* File: x86_64/alt_stub.S */ 9541 /* 9542 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9543 * any interesting requests and then jump to the real instruction 9544 * handler. Unlike the Arm handler, we can't do this as a tail call 9545 * because rIBASE is caller save and we need to reload it. 9546 * 9547 * Note that unlike in the Arm implementation, we should never arrive 9548 * here with a zero breakFlag because we always refresh rIBASE on 9549 * return. 9550 */ 9551 .extern MterpCheckBefore 9552 REFRESH_IBASE 9553 movq rSELF, OUT_ARG0 9554 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9555 movq rPC, OUT_ARG2 9556 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9557 jmp .L_op_nop+(150*128) 9558 9559 /* ------------------------------ */ 9560 .balign 128 9561 .L_ALT_op_xor_int: /* 0x97 */ 9562 /* File: x86_64/alt_stub.S */ 9563 /* 9564 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9565 * any interesting requests and then jump to the real instruction 9566 * handler. Unlike the Arm handler, we can't do this as a tail call 9567 * because rIBASE is caller save and we need to reload it. 9568 * 9569 * Note that unlike in the Arm implementation, we should never arrive 9570 * here with a zero breakFlag because we always refresh rIBASE on 9571 * return. 9572 */ 9573 .extern MterpCheckBefore 9574 REFRESH_IBASE 9575 movq rSELF, OUT_ARG0 9576 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9577 movq rPC, OUT_ARG2 9578 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9579 jmp .L_op_nop+(151*128) 9580 9581 /* ------------------------------ */ 9582 .balign 128 9583 .L_ALT_op_shl_int: /* 0x98 */ 9584 /* File: x86_64/alt_stub.S */ 9585 /* 9586 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9587 * any interesting requests and then jump to the real instruction 9588 * handler. Unlike the Arm handler, we can't do this as a tail call 9589 * because rIBASE is caller save and we need to reload it. 9590 * 9591 * Note that unlike in the Arm implementation, we should never arrive 9592 * here with a zero breakFlag because we always refresh rIBASE on 9593 * return. 9594 */ 9595 .extern MterpCheckBefore 9596 REFRESH_IBASE 9597 movq rSELF, OUT_ARG0 9598 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9599 movq rPC, OUT_ARG2 9600 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9601 jmp .L_op_nop+(152*128) 9602 9603 /* ------------------------------ */ 9604 .balign 128 9605 .L_ALT_op_shr_int: /* 0x99 */ 9606 /* File: x86_64/alt_stub.S */ 9607 /* 9608 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9609 * any interesting requests and then jump to the real instruction 9610 * handler. Unlike the Arm handler, we can't do this as a tail call 9611 * because rIBASE is caller save and we need to reload it. 9612 * 9613 * Note that unlike in the Arm implementation, we should never arrive 9614 * here with a zero breakFlag because we always refresh rIBASE on 9615 * return. 9616 */ 9617 .extern MterpCheckBefore 9618 REFRESH_IBASE 9619 movq rSELF, OUT_ARG0 9620 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9621 movq rPC, OUT_ARG2 9622 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9623 jmp .L_op_nop+(153*128) 9624 9625 /* ------------------------------ */ 9626 .balign 128 9627 .L_ALT_op_ushr_int: /* 0x9a */ 9628 /* File: x86_64/alt_stub.S */ 9629 /* 9630 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9631 * any interesting requests and then jump to the real instruction 9632 * handler. Unlike the Arm handler, we can't do this as a tail call 9633 * because rIBASE is caller save and we need to reload it. 9634 * 9635 * Note that unlike in the Arm implementation, we should never arrive 9636 * here with a zero breakFlag because we always refresh rIBASE on 9637 * return. 9638 */ 9639 .extern MterpCheckBefore 9640 REFRESH_IBASE 9641 movq rSELF, OUT_ARG0 9642 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9643 movq rPC, OUT_ARG2 9644 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9645 jmp .L_op_nop+(154*128) 9646 9647 /* ------------------------------ */ 9648 .balign 128 9649 .L_ALT_op_add_long: /* 0x9b */ 9650 /* File: x86_64/alt_stub.S */ 9651 /* 9652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9653 * any interesting requests and then jump to the real instruction 9654 * handler. Unlike the Arm handler, we can't do this as a tail call 9655 * because rIBASE is caller save and we need to reload it. 9656 * 9657 * Note that unlike in the Arm implementation, we should never arrive 9658 * here with a zero breakFlag because we always refresh rIBASE on 9659 * return. 9660 */ 9661 .extern MterpCheckBefore 9662 REFRESH_IBASE 9663 movq rSELF, OUT_ARG0 9664 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9665 movq rPC, OUT_ARG2 9666 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9667 jmp .L_op_nop+(155*128) 9668 9669 /* ------------------------------ */ 9670 .balign 128 9671 .L_ALT_op_sub_long: /* 0x9c */ 9672 /* File: x86_64/alt_stub.S */ 9673 /* 9674 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9675 * any interesting requests and then jump to the real instruction 9676 * handler. Unlike the Arm handler, we can't do this as a tail call 9677 * because rIBASE is caller save and we need to reload it. 9678 * 9679 * Note that unlike in the Arm implementation, we should never arrive 9680 * here with a zero breakFlag because we always refresh rIBASE on 9681 * return. 9682 */ 9683 .extern MterpCheckBefore 9684 REFRESH_IBASE 9685 movq rSELF, OUT_ARG0 9686 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9687 movq rPC, OUT_ARG2 9688 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9689 jmp .L_op_nop+(156*128) 9690 9691 /* ------------------------------ */ 9692 .balign 128 9693 .L_ALT_op_mul_long: /* 0x9d */ 9694 /* File: x86_64/alt_stub.S */ 9695 /* 9696 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9697 * any interesting requests and then jump to the real instruction 9698 * handler. Unlike the Arm handler, we can't do this as a tail call 9699 * because rIBASE is caller save and we need to reload it. 9700 * 9701 * Note that unlike in the Arm implementation, we should never arrive 9702 * here with a zero breakFlag because we always refresh rIBASE on 9703 * return. 9704 */ 9705 .extern MterpCheckBefore 9706 REFRESH_IBASE 9707 movq rSELF, OUT_ARG0 9708 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9709 movq rPC, OUT_ARG2 9710 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9711 jmp .L_op_nop+(157*128) 9712 9713 /* ------------------------------ */ 9714 .balign 128 9715 .L_ALT_op_div_long: /* 0x9e */ 9716 /* File: x86_64/alt_stub.S */ 9717 /* 9718 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9719 * any interesting requests and then jump to the real instruction 9720 * handler. Unlike the Arm handler, we can't do this as a tail call 9721 * because rIBASE is caller save and we need to reload it. 9722 * 9723 * Note that unlike in the Arm implementation, we should never arrive 9724 * here with a zero breakFlag because we always refresh rIBASE on 9725 * return. 9726 */ 9727 .extern MterpCheckBefore 9728 REFRESH_IBASE 9729 movq rSELF, OUT_ARG0 9730 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9731 movq rPC, OUT_ARG2 9732 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9733 jmp .L_op_nop+(158*128) 9734 9735 /* ------------------------------ */ 9736 .balign 128 9737 .L_ALT_op_rem_long: /* 0x9f */ 9738 /* File: x86_64/alt_stub.S */ 9739 /* 9740 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9741 * any interesting requests and then jump to the real instruction 9742 * handler. Unlike the Arm handler, we can't do this as a tail call 9743 * because rIBASE is caller save and we need to reload it. 9744 * 9745 * Note that unlike in the Arm implementation, we should never arrive 9746 * here with a zero breakFlag because we always refresh rIBASE on 9747 * return. 9748 */ 9749 .extern MterpCheckBefore 9750 REFRESH_IBASE 9751 movq rSELF, OUT_ARG0 9752 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9753 movq rPC, OUT_ARG2 9754 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9755 jmp .L_op_nop+(159*128) 9756 9757 /* ------------------------------ */ 9758 .balign 128 9759 .L_ALT_op_and_long: /* 0xa0 */ 9760 /* File: x86_64/alt_stub.S */ 9761 /* 9762 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9763 * any interesting requests and then jump to the real instruction 9764 * handler. Unlike the Arm handler, we can't do this as a tail call 9765 * because rIBASE is caller save and we need to reload it. 9766 * 9767 * Note that unlike in the Arm implementation, we should never arrive 9768 * here with a zero breakFlag because we always refresh rIBASE on 9769 * return. 9770 */ 9771 .extern MterpCheckBefore 9772 REFRESH_IBASE 9773 movq rSELF, OUT_ARG0 9774 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9775 movq rPC, OUT_ARG2 9776 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9777 jmp .L_op_nop+(160*128) 9778 9779 /* ------------------------------ */ 9780 .balign 128 9781 .L_ALT_op_or_long: /* 0xa1 */ 9782 /* File: x86_64/alt_stub.S */ 9783 /* 9784 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9785 * any interesting requests and then jump to the real instruction 9786 * handler. Unlike the Arm handler, we can't do this as a tail call 9787 * because rIBASE is caller save and we need to reload it. 9788 * 9789 * Note that unlike in the Arm implementation, we should never arrive 9790 * here with a zero breakFlag because we always refresh rIBASE on 9791 * return. 9792 */ 9793 .extern MterpCheckBefore 9794 REFRESH_IBASE 9795 movq rSELF, OUT_ARG0 9796 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9797 movq rPC, OUT_ARG2 9798 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9799 jmp .L_op_nop+(161*128) 9800 9801 /* ------------------------------ */ 9802 .balign 128 9803 .L_ALT_op_xor_long: /* 0xa2 */ 9804 /* File: x86_64/alt_stub.S */ 9805 /* 9806 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9807 * any interesting requests and then jump to the real instruction 9808 * handler. Unlike the Arm handler, we can't do this as a tail call 9809 * because rIBASE is caller save and we need to reload it. 9810 * 9811 * Note that unlike in the Arm implementation, we should never arrive 9812 * here with a zero breakFlag because we always refresh rIBASE on 9813 * return. 9814 */ 9815 .extern MterpCheckBefore 9816 REFRESH_IBASE 9817 movq rSELF, OUT_ARG0 9818 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9819 movq rPC, OUT_ARG2 9820 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9821 jmp .L_op_nop+(162*128) 9822 9823 /* ------------------------------ */ 9824 .balign 128 9825 .L_ALT_op_shl_long: /* 0xa3 */ 9826 /* File: x86_64/alt_stub.S */ 9827 /* 9828 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9829 * any interesting requests and then jump to the real instruction 9830 * handler. Unlike the Arm handler, we can't do this as a tail call 9831 * because rIBASE is caller save and we need to reload it. 9832 * 9833 * Note that unlike in the Arm implementation, we should never arrive 9834 * here with a zero breakFlag because we always refresh rIBASE on 9835 * return. 9836 */ 9837 .extern MterpCheckBefore 9838 REFRESH_IBASE 9839 movq rSELF, OUT_ARG0 9840 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9841 movq rPC, OUT_ARG2 9842 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9843 jmp .L_op_nop+(163*128) 9844 9845 /* ------------------------------ */ 9846 .balign 128 9847 .L_ALT_op_shr_long: /* 0xa4 */ 9848 /* File: x86_64/alt_stub.S */ 9849 /* 9850 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9851 * any interesting requests and then jump to the real instruction 9852 * handler. Unlike the Arm handler, we can't do this as a tail call 9853 * because rIBASE is caller save and we need to reload it. 9854 * 9855 * Note that unlike in the Arm implementation, we should never arrive 9856 * here with a zero breakFlag because we always refresh rIBASE on 9857 * return. 9858 */ 9859 .extern MterpCheckBefore 9860 REFRESH_IBASE 9861 movq rSELF, OUT_ARG0 9862 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9863 movq rPC, OUT_ARG2 9864 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9865 jmp .L_op_nop+(164*128) 9866 9867 /* ------------------------------ */ 9868 .balign 128 9869 .L_ALT_op_ushr_long: /* 0xa5 */ 9870 /* File: x86_64/alt_stub.S */ 9871 /* 9872 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9873 * any interesting requests and then jump to the real instruction 9874 * handler. Unlike the Arm handler, we can't do this as a tail call 9875 * because rIBASE is caller save and we need to reload it. 9876 * 9877 * Note that unlike in the Arm implementation, we should never arrive 9878 * here with a zero breakFlag because we always refresh rIBASE on 9879 * return. 9880 */ 9881 .extern MterpCheckBefore 9882 REFRESH_IBASE 9883 movq rSELF, OUT_ARG0 9884 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9885 movq rPC, OUT_ARG2 9886 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9887 jmp .L_op_nop+(165*128) 9888 9889 /* ------------------------------ */ 9890 .balign 128 9891 .L_ALT_op_add_float: /* 0xa6 */ 9892 /* File: x86_64/alt_stub.S */ 9893 /* 9894 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9895 * any interesting requests and then jump to the real instruction 9896 * handler. Unlike the Arm handler, we can't do this as a tail call 9897 * because rIBASE is caller save and we need to reload it. 9898 * 9899 * Note that unlike in the Arm implementation, we should never arrive 9900 * here with a zero breakFlag because we always refresh rIBASE on 9901 * return. 9902 */ 9903 .extern MterpCheckBefore 9904 REFRESH_IBASE 9905 movq rSELF, OUT_ARG0 9906 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9907 movq rPC, OUT_ARG2 9908 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9909 jmp .L_op_nop+(166*128) 9910 9911 /* ------------------------------ */ 9912 .balign 128 9913 .L_ALT_op_sub_float: /* 0xa7 */ 9914 /* File: x86_64/alt_stub.S */ 9915 /* 9916 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9917 * any interesting requests and then jump to the real instruction 9918 * handler. Unlike the Arm handler, we can't do this as a tail call 9919 * because rIBASE is caller save and we need to reload it. 9920 * 9921 * Note that unlike in the Arm implementation, we should never arrive 9922 * here with a zero breakFlag because we always refresh rIBASE on 9923 * return. 9924 */ 9925 .extern MterpCheckBefore 9926 REFRESH_IBASE 9927 movq rSELF, OUT_ARG0 9928 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9929 movq rPC, OUT_ARG2 9930 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9931 jmp .L_op_nop+(167*128) 9932 9933 /* ------------------------------ */ 9934 .balign 128 9935 .L_ALT_op_mul_float: /* 0xa8 */ 9936 /* File: x86_64/alt_stub.S */ 9937 /* 9938 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9939 * any interesting requests and then jump to the real instruction 9940 * handler. Unlike the Arm handler, we can't do this as a tail call 9941 * because rIBASE is caller save and we need to reload it. 9942 * 9943 * Note that unlike in the Arm implementation, we should never arrive 9944 * here with a zero breakFlag because we always refresh rIBASE on 9945 * return. 9946 */ 9947 .extern MterpCheckBefore 9948 REFRESH_IBASE 9949 movq rSELF, OUT_ARG0 9950 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9951 movq rPC, OUT_ARG2 9952 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9953 jmp .L_op_nop+(168*128) 9954 9955 /* ------------------------------ */ 9956 .balign 128 9957 .L_ALT_op_div_float: /* 0xa9 */ 9958 /* File: x86_64/alt_stub.S */ 9959 /* 9960 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9961 * any interesting requests and then jump to the real instruction 9962 * handler. Unlike the Arm handler, we can't do this as a tail call 9963 * because rIBASE is caller save and we need to reload it. 9964 * 9965 * Note that unlike in the Arm implementation, we should never arrive 9966 * here with a zero breakFlag because we always refresh rIBASE on 9967 * return. 9968 */ 9969 .extern MterpCheckBefore 9970 REFRESH_IBASE 9971 movq rSELF, OUT_ARG0 9972 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9973 movq rPC, OUT_ARG2 9974 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9975 jmp .L_op_nop+(169*128) 9976 9977 /* ------------------------------ */ 9978 .balign 128 9979 .L_ALT_op_rem_float: /* 0xaa */ 9980 /* File: x86_64/alt_stub.S */ 9981 /* 9982 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9983 * any interesting requests and then jump to the real instruction 9984 * handler. Unlike the Arm handler, we can't do this as a tail call 9985 * because rIBASE is caller save and we need to reload it. 9986 * 9987 * Note that unlike in the Arm implementation, we should never arrive 9988 * here with a zero breakFlag because we always refresh rIBASE on 9989 * return. 9990 */ 9991 .extern MterpCheckBefore 9992 REFRESH_IBASE 9993 movq rSELF, OUT_ARG0 9994 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9995 movq rPC, OUT_ARG2 9996 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9997 jmp .L_op_nop+(170*128) 9998 9999 /* ------------------------------ */ 10000 .balign 128 10001 .L_ALT_op_add_double: /* 0xab */ 10002 /* File: x86_64/alt_stub.S */ 10003 /* 10004 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10005 * any interesting requests and then jump to the real instruction 10006 * handler. Unlike the Arm handler, we can't do this as a tail call 10007 * because rIBASE is caller save and we need to reload it. 10008 * 10009 * Note that unlike in the Arm implementation, we should never arrive 10010 * here with a zero breakFlag because we always refresh rIBASE on 10011 * return. 10012 */ 10013 .extern MterpCheckBefore 10014 REFRESH_IBASE 10015 movq rSELF, OUT_ARG0 10016 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10017 movq rPC, OUT_ARG2 10018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10019 jmp .L_op_nop+(171*128) 10020 10021 /* ------------------------------ */ 10022 .balign 128 10023 .L_ALT_op_sub_double: /* 0xac */ 10024 /* File: x86_64/alt_stub.S */ 10025 /* 10026 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10027 * any interesting requests and then jump to the real instruction 10028 * handler. Unlike the Arm handler, we can't do this as a tail call 10029 * because rIBASE is caller save and we need to reload it. 10030 * 10031 * Note that unlike in the Arm implementation, we should never arrive 10032 * here with a zero breakFlag because we always refresh rIBASE on 10033 * return. 10034 */ 10035 .extern MterpCheckBefore 10036 REFRESH_IBASE 10037 movq rSELF, OUT_ARG0 10038 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10039 movq rPC, OUT_ARG2 10040 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10041 jmp .L_op_nop+(172*128) 10042 10043 /* ------------------------------ */ 10044 .balign 128 10045 .L_ALT_op_mul_double: /* 0xad */ 10046 /* File: x86_64/alt_stub.S */ 10047 /* 10048 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10049 * any interesting requests and then jump to the real instruction 10050 * handler. Unlike the Arm handler, we can't do this as a tail call 10051 * because rIBASE is caller save and we need to reload it. 10052 * 10053 * Note that unlike in the Arm implementation, we should never arrive 10054 * here with a zero breakFlag because we always refresh rIBASE on 10055 * return. 10056 */ 10057 .extern MterpCheckBefore 10058 REFRESH_IBASE 10059 movq rSELF, OUT_ARG0 10060 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10061 movq rPC, OUT_ARG2 10062 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10063 jmp .L_op_nop+(173*128) 10064 10065 /* ------------------------------ */ 10066 .balign 128 10067 .L_ALT_op_div_double: /* 0xae */ 10068 /* File: x86_64/alt_stub.S */ 10069 /* 10070 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10071 * any interesting requests and then jump to the real instruction 10072 * handler. Unlike the Arm handler, we can't do this as a tail call 10073 * because rIBASE is caller save and we need to reload it. 10074 * 10075 * Note that unlike in the Arm implementation, we should never arrive 10076 * here with a zero breakFlag because we always refresh rIBASE on 10077 * return. 10078 */ 10079 .extern MterpCheckBefore 10080 REFRESH_IBASE 10081 movq rSELF, OUT_ARG0 10082 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10083 movq rPC, OUT_ARG2 10084 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10085 jmp .L_op_nop+(174*128) 10086 10087 /* ------------------------------ */ 10088 .balign 128 10089 .L_ALT_op_rem_double: /* 0xaf */ 10090 /* File: x86_64/alt_stub.S */ 10091 /* 10092 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10093 * any interesting requests and then jump to the real instruction 10094 * handler. Unlike the Arm handler, we can't do this as a tail call 10095 * because rIBASE is caller save and we need to reload it. 10096 * 10097 * Note that unlike in the Arm implementation, we should never arrive 10098 * here with a zero breakFlag because we always refresh rIBASE on 10099 * return. 10100 */ 10101 .extern MterpCheckBefore 10102 REFRESH_IBASE 10103 movq rSELF, OUT_ARG0 10104 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10105 movq rPC, OUT_ARG2 10106 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10107 jmp .L_op_nop+(175*128) 10108 10109 /* ------------------------------ */ 10110 .balign 128 10111 .L_ALT_op_add_int_2addr: /* 0xb0 */ 10112 /* File: x86_64/alt_stub.S */ 10113 /* 10114 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10115 * any interesting requests and then jump to the real instruction 10116 * handler. Unlike the Arm handler, we can't do this as a tail call 10117 * because rIBASE is caller save and we need to reload it. 10118 * 10119 * Note that unlike in the Arm implementation, we should never arrive 10120 * here with a zero breakFlag because we always refresh rIBASE on 10121 * return. 10122 */ 10123 .extern MterpCheckBefore 10124 REFRESH_IBASE 10125 movq rSELF, OUT_ARG0 10126 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10127 movq rPC, OUT_ARG2 10128 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10129 jmp .L_op_nop+(176*128) 10130 10131 /* ------------------------------ */ 10132 .balign 128 10133 .L_ALT_op_sub_int_2addr: /* 0xb1 */ 10134 /* File: x86_64/alt_stub.S */ 10135 /* 10136 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10137 * any interesting requests and then jump to the real instruction 10138 * handler. Unlike the Arm handler, we can't do this as a tail call 10139 * because rIBASE is caller save and we need to reload it. 10140 * 10141 * Note that unlike in the Arm implementation, we should never arrive 10142 * here with a zero breakFlag because we always refresh rIBASE on 10143 * return. 10144 */ 10145 .extern MterpCheckBefore 10146 REFRESH_IBASE 10147 movq rSELF, OUT_ARG0 10148 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10149 movq rPC, OUT_ARG2 10150 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10151 jmp .L_op_nop+(177*128) 10152 10153 /* ------------------------------ */ 10154 .balign 128 10155 .L_ALT_op_mul_int_2addr: /* 0xb2 */ 10156 /* File: x86_64/alt_stub.S */ 10157 /* 10158 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10159 * any interesting requests and then jump to the real instruction 10160 * handler. Unlike the Arm handler, we can't do this as a tail call 10161 * because rIBASE is caller save and we need to reload it. 10162 * 10163 * Note that unlike in the Arm implementation, we should never arrive 10164 * here with a zero breakFlag because we always refresh rIBASE on 10165 * return. 10166 */ 10167 .extern MterpCheckBefore 10168 REFRESH_IBASE 10169 movq rSELF, OUT_ARG0 10170 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10171 movq rPC, OUT_ARG2 10172 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10173 jmp .L_op_nop+(178*128) 10174 10175 /* ------------------------------ */ 10176 .balign 128 10177 .L_ALT_op_div_int_2addr: /* 0xb3 */ 10178 /* File: x86_64/alt_stub.S */ 10179 /* 10180 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10181 * any interesting requests and then jump to the real instruction 10182 * handler. Unlike the Arm handler, we can't do this as a tail call 10183 * because rIBASE is caller save and we need to reload it. 10184 * 10185 * Note that unlike in the Arm implementation, we should never arrive 10186 * here with a zero breakFlag because we always refresh rIBASE on 10187 * return. 10188 */ 10189 .extern MterpCheckBefore 10190 REFRESH_IBASE 10191 movq rSELF, OUT_ARG0 10192 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10193 movq rPC, OUT_ARG2 10194 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10195 jmp .L_op_nop+(179*128) 10196 10197 /* ------------------------------ */ 10198 .balign 128 10199 .L_ALT_op_rem_int_2addr: /* 0xb4 */ 10200 /* File: x86_64/alt_stub.S */ 10201 /* 10202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10203 * any interesting requests and then jump to the real instruction 10204 * handler. Unlike the Arm handler, we can't do this as a tail call 10205 * because rIBASE is caller save and we need to reload it. 10206 * 10207 * Note that unlike in the Arm implementation, we should never arrive 10208 * here with a zero breakFlag because we always refresh rIBASE on 10209 * return. 10210 */ 10211 .extern MterpCheckBefore 10212 REFRESH_IBASE 10213 movq rSELF, OUT_ARG0 10214 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10215 movq rPC, OUT_ARG2 10216 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10217 jmp .L_op_nop+(180*128) 10218 10219 /* ------------------------------ */ 10220 .balign 128 10221 .L_ALT_op_and_int_2addr: /* 0xb5 */ 10222 /* File: x86_64/alt_stub.S */ 10223 /* 10224 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10225 * any interesting requests and then jump to the real instruction 10226 * handler. Unlike the Arm handler, we can't do this as a tail call 10227 * because rIBASE is caller save and we need to reload it. 10228 * 10229 * Note that unlike in the Arm implementation, we should never arrive 10230 * here with a zero breakFlag because we always refresh rIBASE on 10231 * return. 10232 */ 10233 .extern MterpCheckBefore 10234 REFRESH_IBASE 10235 movq rSELF, OUT_ARG0 10236 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10237 movq rPC, OUT_ARG2 10238 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10239 jmp .L_op_nop+(181*128) 10240 10241 /* ------------------------------ */ 10242 .balign 128 10243 .L_ALT_op_or_int_2addr: /* 0xb6 */ 10244 /* File: x86_64/alt_stub.S */ 10245 /* 10246 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10247 * any interesting requests and then jump to the real instruction 10248 * handler. Unlike the Arm handler, we can't do this as a tail call 10249 * because rIBASE is caller save and we need to reload it. 10250 * 10251 * Note that unlike in the Arm implementation, we should never arrive 10252 * here with a zero breakFlag because we always refresh rIBASE on 10253 * return. 10254 */ 10255 .extern MterpCheckBefore 10256 REFRESH_IBASE 10257 movq rSELF, OUT_ARG0 10258 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10259 movq rPC, OUT_ARG2 10260 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10261 jmp .L_op_nop+(182*128) 10262 10263 /* ------------------------------ */ 10264 .balign 128 10265 .L_ALT_op_xor_int_2addr: /* 0xb7 */ 10266 /* File: x86_64/alt_stub.S */ 10267 /* 10268 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10269 * any interesting requests and then jump to the real instruction 10270 * handler. Unlike the Arm handler, we can't do this as a tail call 10271 * because rIBASE is caller save and we need to reload it. 10272 * 10273 * Note that unlike in the Arm implementation, we should never arrive 10274 * here with a zero breakFlag because we always refresh rIBASE on 10275 * return. 10276 */ 10277 .extern MterpCheckBefore 10278 REFRESH_IBASE 10279 movq rSELF, OUT_ARG0 10280 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10281 movq rPC, OUT_ARG2 10282 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10283 jmp .L_op_nop+(183*128) 10284 10285 /* ------------------------------ */ 10286 .balign 128 10287 .L_ALT_op_shl_int_2addr: /* 0xb8 */ 10288 /* File: x86_64/alt_stub.S */ 10289 /* 10290 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10291 * any interesting requests and then jump to the real instruction 10292 * handler. Unlike the Arm handler, we can't do this as a tail call 10293 * because rIBASE is caller save and we need to reload it. 10294 * 10295 * Note that unlike in the Arm implementation, we should never arrive 10296 * here with a zero breakFlag because we always refresh rIBASE on 10297 * return. 10298 */ 10299 .extern MterpCheckBefore 10300 REFRESH_IBASE 10301 movq rSELF, OUT_ARG0 10302 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10303 movq rPC, OUT_ARG2 10304 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10305 jmp .L_op_nop+(184*128) 10306 10307 /* ------------------------------ */ 10308 .balign 128 10309 .L_ALT_op_shr_int_2addr: /* 0xb9 */ 10310 /* File: x86_64/alt_stub.S */ 10311 /* 10312 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10313 * any interesting requests and then jump to the real instruction 10314 * handler. Unlike the Arm handler, we can't do this as a tail call 10315 * because rIBASE is caller save and we need to reload it. 10316 * 10317 * Note that unlike in the Arm implementation, we should never arrive 10318 * here with a zero breakFlag because we always refresh rIBASE on 10319 * return. 10320 */ 10321 .extern MterpCheckBefore 10322 REFRESH_IBASE 10323 movq rSELF, OUT_ARG0 10324 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10325 movq rPC, OUT_ARG2 10326 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10327 jmp .L_op_nop+(185*128) 10328 10329 /* ------------------------------ */ 10330 .balign 128 10331 .L_ALT_op_ushr_int_2addr: /* 0xba */ 10332 /* File: x86_64/alt_stub.S */ 10333 /* 10334 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10335 * any interesting requests and then jump to the real instruction 10336 * handler. Unlike the Arm handler, we can't do this as a tail call 10337 * because rIBASE is caller save and we need to reload it. 10338 * 10339 * Note that unlike in the Arm implementation, we should never arrive 10340 * here with a zero breakFlag because we always refresh rIBASE on 10341 * return. 10342 */ 10343 .extern MterpCheckBefore 10344 REFRESH_IBASE 10345 movq rSELF, OUT_ARG0 10346 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10347 movq rPC, OUT_ARG2 10348 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10349 jmp .L_op_nop+(186*128) 10350 10351 /* ------------------------------ */ 10352 .balign 128 10353 .L_ALT_op_add_long_2addr: /* 0xbb */ 10354 /* File: x86_64/alt_stub.S */ 10355 /* 10356 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10357 * any interesting requests and then jump to the real instruction 10358 * handler. Unlike the Arm handler, we can't do this as a tail call 10359 * because rIBASE is caller save and we need to reload it. 10360 * 10361 * Note that unlike in the Arm implementation, we should never arrive 10362 * here with a zero breakFlag because we always refresh rIBASE on 10363 * return. 10364 */ 10365 .extern MterpCheckBefore 10366 REFRESH_IBASE 10367 movq rSELF, OUT_ARG0 10368 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10369 movq rPC, OUT_ARG2 10370 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10371 jmp .L_op_nop+(187*128) 10372 10373 /* ------------------------------ */ 10374 .balign 128 10375 .L_ALT_op_sub_long_2addr: /* 0xbc */ 10376 /* File: x86_64/alt_stub.S */ 10377 /* 10378 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10379 * any interesting requests and then jump to the real instruction 10380 * handler. Unlike the Arm handler, we can't do this as a tail call 10381 * because rIBASE is caller save and we need to reload it. 10382 * 10383 * Note that unlike in the Arm implementation, we should never arrive 10384 * here with a zero breakFlag because we always refresh rIBASE on 10385 * return. 10386 */ 10387 .extern MterpCheckBefore 10388 REFRESH_IBASE 10389 movq rSELF, OUT_ARG0 10390 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10391 movq rPC, OUT_ARG2 10392 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10393 jmp .L_op_nop+(188*128) 10394 10395 /* ------------------------------ */ 10396 .balign 128 10397 .L_ALT_op_mul_long_2addr: /* 0xbd */ 10398 /* File: x86_64/alt_stub.S */ 10399 /* 10400 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10401 * any interesting requests and then jump to the real instruction 10402 * handler. Unlike the Arm handler, we can't do this as a tail call 10403 * because rIBASE is caller save and we need to reload it. 10404 * 10405 * Note that unlike in the Arm implementation, we should never arrive 10406 * here with a zero breakFlag because we always refresh rIBASE on 10407 * return. 10408 */ 10409 .extern MterpCheckBefore 10410 REFRESH_IBASE 10411 movq rSELF, OUT_ARG0 10412 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10413 movq rPC, OUT_ARG2 10414 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10415 jmp .L_op_nop+(189*128) 10416 10417 /* ------------------------------ */ 10418 .balign 128 10419 .L_ALT_op_div_long_2addr: /* 0xbe */ 10420 /* File: x86_64/alt_stub.S */ 10421 /* 10422 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10423 * any interesting requests and then jump to the real instruction 10424 * handler. Unlike the Arm handler, we can't do this as a tail call 10425 * because rIBASE is caller save and we need to reload it. 10426 * 10427 * Note that unlike in the Arm implementation, we should never arrive 10428 * here with a zero breakFlag because we always refresh rIBASE on 10429 * return. 10430 */ 10431 .extern MterpCheckBefore 10432 REFRESH_IBASE 10433 movq rSELF, OUT_ARG0 10434 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10435 movq rPC, OUT_ARG2 10436 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10437 jmp .L_op_nop+(190*128) 10438 10439 /* ------------------------------ */ 10440 .balign 128 10441 .L_ALT_op_rem_long_2addr: /* 0xbf */ 10442 /* File: x86_64/alt_stub.S */ 10443 /* 10444 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10445 * any interesting requests and then jump to the real instruction 10446 * handler. Unlike the Arm handler, we can't do this as a tail call 10447 * because rIBASE is caller save and we need to reload it. 10448 * 10449 * Note that unlike in the Arm implementation, we should never arrive 10450 * here with a zero breakFlag because we always refresh rIBASE on 10451 * return. 10452 */ 10453 .extern MterpCheckBefore 10454 REFRESH_IBASE 10455 movq rSELF, OUT_ARG0 10456 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10457 movq rPC, OUT_ARG2 10458 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10459 jmp .L_op_nop+(191*128) 10460 10461 /* ------------------------------ */ 10462 .balign 128 10463 .L_ALT_op_and_long_2addr: /* 0xc0 */ 10464 /* File: x86_64/alt_stub.S */ 10465 /* 10466 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10467 * any interesting requests and then jump to the real instruction 10468 * handler. Unlike the Arm handler, we can't do this as a tail call 10469 * because rIBASE is caller save and we need to reload it. 10470 * 10471 * Note that unlike in the Arm implementation, we should never arrive 10472 * here with a zero breakFlag because we always refresh rIBASE on 10473 * return. 10474 */ 10475 .extern MterpCheckBefore 10476 REFRESH_IBASE 10477 movq rSELF, OUT_ARG0 10478 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10479 movq rPC, OUT_ARG2 10480 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10481 jmp .L_op_nop+(192*128) 10482 10483 /* ------------------------------ */ 10484 .balign 128 10485 .L_ALT_op_or_long_2addr: /* 0xc1 */ 10486 /* File: x86_64/alt_stub.S */ 10487 /* 10488 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10489 * any interesting requests and then jump to the real instruction 10490 * handler. Unlike the Arm handler, we can't do this as a tail call 10491 * because rIBASE is caller save and we need to reload it. 10492 * 10493 * Note that unlike in the Arm implementation, we should never arrive 10494 * here with a zero breakFlag because we always refresh rIBASE on 10495 * return. 10496 */ 10497 .extern MterpCheckBefore 10498 REFRESH_IBASE 10499 movq rSELF, OUT_ARG0 10500 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10501 movq rPC, OUT_ARG2 10502 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10503 jmp .L_op_nop+(193*128) 10504 10505 /* ------------------------------ */ 10506 .balign 128 10507 .L_ALT_op_xor_long_2addr: /* 0xc2 */ 10508 /* File: x86_64/alt_stub.S */ 10509 /* 10510 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10511 * any interesting requests and then jump to the real instruction 10512 * handler. Unlike the Arm handler, we can't do this as a tail call 10513 * because rIBASE is caller save and we need to reload it. 10514 * 10515 * Note that unlike in the Arm implementation, we should never arrive 10516 * here with a zero breakFlag because we always refresh rIBASE on 10517 * return. 10518 */ 10519 .extern MterpCheckBefore 10520 REFRESH_IBASE 10521 movq rSELF, OUT_ARG0 10522 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10523 movq rPC, OUT_ARG2 10524 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10525 jmp .L_op_nop+(194*128) 10526 10527 /* ------------------------------ */ 10528 .balign 128 10529 .L_ALT_op_shl_long_2addr: /* 0xc3 */ 10530 /* File: x86_64/alt_stub.S */ 10531 /* 10532 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10533 * any interesting requests and then jump to the real instruction 10534 * handler. Unlike the Arm handler, we can't do this as a tail call 10535 * because rIBASE is caller save and we need to reload it. 10536 * 10537 * Note that unlike in the Arm implementation, we should never arrive 10538 * here with a zero breakFlag because we always refresh rIBASE on 10539 * return. 10540 */ 10541 .extern MterpCheckBefore 10542 REFRESH_IBASE 10543 movq rSELF, OUT_ARG0 10544 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10545 movq rPC, OUT_ARG2 10546 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10547 jmp .L_op_nop+(195*128) 10548 10549 /* ------------------------------ */ 10550 .balign 128 10551 .L_ALT_op_shr_long_2addr: /* 0xc4 */ 10552 /* File: x86_64/alt_stub.S */ 10553 /* 10554 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10555 * any interesting requests and then jump to the real instruction 10556 * handler. Unlike the Arm handler, we can't do this as a tail call 10557 * because rIBASE is caller save and we need to reload it. 10558 * 10559 * Note that unlike in the Arm implementation, we should never arrive 10560 * here with a zero breakFlag because we always refresh rIBASE on 10561 * return. 10562 */ 10563 .extern MterpCheckBefore 10564 REFRESH_IBASE 10565 movq rSELF, OUT_ARG0 10566 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10567 movq rPC, OUT_ARG2 10568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10569 jmp .L_op_nop+(196*128) 10570 10571 /* ------------------------------ */ 10572 .balign 128 10573 .L_ALT_op_ushr_long_2addr: /* 0xc5 */ 10574 /* File: x86_64/alt_stub.S */ 10575 /* 10576 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10577 * any interesting requests and then jump to the real instruction 10578 * handler. Unlike the Arm handler, we can't do this as a tail call 10579 * because rIBASE is caller save and we need to reload it. 10580 * 10581 * Note that unlike in the Arm implementation, we should never arrive 10582 * here with a zero breakFlag because we always refresh rIBASE on 10583 * return. 10584 */ 10585 .extern MterpCheckBefore 10586 REFRESH_IBASE 10587 movq rSELF, OUT_ARG0 10588 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10589 movq rPC, OUT_ARG2 10590 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10591 jmp .L_op_nop+(197*128) 10592 10593 /* ------------------------------ */ 10594 .balign 128 10595 .L_ALT_op_add_float_2addr: /* 0xc6 */ 10596 /* File: x86_64/alt_stub.S */ 10597 /* 10598 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10599 * any interesting requests and then jump to the real instruction 10600 * handler. Unlike the Arm handler, we can't do this as a tail call 10601 * because rIBASE is caller save and we need to reload it. 10602 * 10603 * Note that unlike in the Arm implementation, we should never arrive 10604 * here with a zero breakFlag because we always refresh rIBASE on 10605 * return. 10606 */ 10607 .extern MterpCheckBefore 10608 REFRESH_IBASE 10609 movq rSELF, OUT_ARG0 10610 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10611 movq rPC, OUT_ARG2 10612 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10613 jmp .L_op_nop+(198*128) 10614 10615 /* ------------------------------ */ 10616 .balign 128 10617 .L_ALT_op_sub_float_2addr: /* 0xc7 */ 10618 /* File: x86_64/alt_stub.S */ 10619 /* 10620 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10621 * any interesting requests and then jump to the real instruction 10622 * handler. Unlike the Arm handler, we can't do this as a tail call 10623 * because rIBASE is caller save and we need to reload it. 10624 * 10625 * Note that unlike in the Arm implementation, we should never arrive 10626 * here with a zero breakFlag because we always refresh rIBASE on 10627 * return. 10628 */ 10629 .extern MterpCheckBefore 10630 REFRESH_IBASE 10631 movq rSELF, OUT_ARG0 10632 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10633 movq rPC, OUT_ARG2 10634 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10635 jmp .L_op_nop+(199*128) 10636 10637 /* ------------------------------ */ 10638 .balign 128 10639 .L_ALT_op_mul_float_2addr: /* 0xc8 */ 10640 /* File: x86_64/alt_stub.S */ 10641 /* 10642 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10643 * any interesting requests and then jump to the real instruction 10644 * handler. Unlike the Arm handler, we can't do this as a tail call 10645 * because rIBASE is caller save and we need to reload it. 10646 * 10647 * Note that unlike in the Arm implementation, we should never arrive 10648 * here with a zero breakFlag because we always refresh rIBASE on 10649 * return. 10650 */ 10651 .extern MterpCheckBefore 10652 REFRESH_IBASE 10653 movq rSELF, OUT_ARG0 10654 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10655 movq rPC, OUT_ARG2 10656 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10657 jmp .L_op_nop+(200*128) 10658 10659 /* ------------------------------ */ 10660 .balign 128 10661 .L_ALT_op_div_float_2addr: /* 0xc9 */ 10662 /* File: x86_64/alt_stub.S */ 10663 /* 10664 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10665 * any interesting requests and then jump to the real instruction 10666 * handler. Unlike the Arm handler, we can't do this as a tail call 10667 * because rIBASE is caller save and we need to reload it. 10668 * 10669 * Note that unlike in the Arm implementation, we should never arrive 10670 * here with a zero breakFlag because we always refresh rIBASE on 10671 * return. 10672 */ 10673 .extern MterpCheckBefore 10674 REFRESH_IBASE 10675 movq rSELF, OUT_ARG0 10676 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10677 movq rPC, OUT_ARG2 10678 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10679 jmp .L_op_nop+(201*128) 10680 10681 /* ------------------------------ */ 10682 .balign 128 10683 .L_ALT_op_rem_float_2addr: /* 0xca */ 10684 /* File: x86_64/alt_stub.S */ 10685 /* 10686 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10687 * any interesting requests and then jump to the real instruction 10688 * handler. Unlike the Arm handler, we can't do this as a tail call 10689 * because rIBASE is caller save and we need to reload it. 10690 * 10691 * Note that unlike in the Arm implementation, we should never arrive 10692 * here with a zero breakFlag because we always refresh rIBASE on 10693 * return. 10694 */ 10695 .extern MterpCheckBefore 10696 REFRESH_IBASE 10697 movq rSELF, OUT_ARG0 10698 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10699 movq rPC, OUT_ARG2 10700 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10701 jmp .L_op_nop+(202*128) 10702 10703 /* ------------------------------ */ 10704 .balign 128 10705 .L_ALT_op_add_double_2addr: /* 0xcb */ 10706 /* File: x86_64/alt_stub.S */ 10707 /* 10708 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10709 * any interesting requests and then jump to the real instruction 10710 * handler. Unlike the Arm handler, we can't do this as a tail call 10711 * because rIBASE is caller save and we need to reload it. 10712 * 10713 * Note that unlike in the Arm implementation, we should never arrive 10714 * here with a zero breakFlag because we always refresh rIBASE on 10715 * return. 10716 */ 10717 .extern MterpCheckBefore 10718 REFRESH_IBASE 10719 movq rSELF, OUT_ARG0 10720 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10721 movq rPC, OUT_ARG2 10722 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10723 jmp .L_op_nop+(203*128) 10724 10725 /* ------------------------------ */ 10726 .balign 128 10727 .L_ALT_op_sub_double_2addr: /* 0xcc */ 10728 /* File: x86_64/alt_stub.S */ 10729 /* 10730 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10731 * any interesting requests and then jump to the real instruction 10732 * handler. Unlike the Arm handler, we can't do this as a tail call 10733 * because rIBASE is caller save and we need to reload it. 10734 * 10735 * Note that unlike in the Arm implementation, we should never arrive 10736 * here with a zero breakFlag because we always refresh rIBASE on 10737 * return. 10738 */ 10739 .extern MterpCheckBefore 10740 REFRESH_IBASE 10741 movq rSELF, OUT_ARG0 10742 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10743 movq rPC, OUT_ARG2 10744 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10745 jmp .L_op_nop+(204*128) 10746 10747 /* ------------------------------ */ 10748 .balign 128 10749 .L_ALT_op_mul_double_2addr: /* 0xcd */ 10750 /* File: x86_64/alt_stub.S */ 10751 /* 10752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10753 * any interesting requests and then jump to the real instruction 10754 * handler. Unlike the Arm handler, we can't do this as a tail call 10755 * because rIBASE is caller save and we need to reload it. 10756 * 10757 * Note that unlike in the Arm implementation, we should never arrive 10758 * here with a zero breakFlag because we always refresh rIBASE on 10759 * return. 10760 */ 10761 .extern MterpCheckBefore 10762 REFRESH_IBASE 10763 movq rSELF, OUT_ARG0 10764 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10765 movq rPC, OUT_ARG2 10766 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10767 jmp .L_op_nop+(205*128) 10768 10769 /* ------------------------------ */ 10770 .balign 128 10771 .L_ALT_op_div_double_2addr: /* 0xce */ 10772 /* File: x86_64/alt_stub.S */ 10773 /* 10774 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10775 * any interesting requests and then jump to the real instruction 10776 * handler. Unlike the Arm handler, we can't do this as a tail call 10777 * because rIBASE is caller save and we need to reload it. 10778 * 10779 * Note that unlike in the Arm implementation, we should never arrive 10780 * here with a zero breakFlag because we always refresh rIBASE on 10781 * return. 10782 */ 10783 .extern MterpCheckBefore 10784 REFRESH_IBASE 10785 movq rSELF, OUT_ARG0 10786 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10787 movq rPC, OUT_ARG2 10788 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10789 jmp .L_op_nop+(206*128) 10790 10791 /* ------------------------------ */ 10792 .balign 128 10793 .L_ALT_op_rem_double_2addr: /* 0xcf */ 10794 /* File: x86_64/alt_stub.S */ 10795 /* 10796 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10797 * any interesting requests and then jump to the real instruction 10798 * handler. Unlike the Arm handler, we can't do this as a tail call 10799 * because rIBASE is caller save and we need to reload it. 10800 * 10801 * Note that unlike in the Arm implementation, we should never arrive 10802 * here with a zero breakFlag because we always refresh rIBASE on 10803 * return. 10804 */ 10805 .extern MterpCheckBefore 10806 REFRESH_IBASE 10807 movq rSELF, OUT_ARG0 10808 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10809 movq rPC, OUT_ARG2 10810 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10811 jmp .L_op_nop+(207*128) 10812 10813 /* ------------------------------ */ 10814 .balign 128 10815 .L_ALT_op_add_int_lit16: /* 0xd0 */ 10816 /* File: x86_64/alt_stub.S */ 10817 /* 10818 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10819 * any interesting requests and then jump to the real instruction 10820 * handler. Unlike the Arm handler, we can't do this as a tail call 10821 * because rIBASE is caller save and we need to reload it. 10822 * 10823 * Note that unlike in the Arm implementation, we should never arrive 10824 * here with a zero breakFlag because we always refresh rIBASE on 10825 * return. 10826 */ 10827 .extern MterpCheckBefore 10828 REFRESH_IBASE 10829 movq rSELF, OUT_ARG0 10830 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10831 movq rPC, OUT_ARG2 10832 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10833 jmp .L_op_nop+(208*128) 10834 10835 /* ------------------------------ */ 10836 .balign 128 10837 .L_ALT_op_rsub_int: /* 0xd1 */ 10838 /* File: x86_64/alt_stub.S */ 10839 /* 10840 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10841 * any interesting requests and then jump to the real instruction 10842 * handler. Unlike the Arm handler, we can't do this as a tail call 10843 * because rIBASE is caller save and we need to reload it. 10844 * 10845 * Note that unlike in the Arm implementation, we should never arrive 10846 * here with a zero breakFlag because we always refresh rIBASE on 10847 * return. 10848 */ 10849 .extern MterpCheckBefore 10850 REFRESH_IBASE 10851 movq rSELF, OUT_ARG0 10852 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10853 movq rPC, OUT_ARG2 10854 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10855 jmp .L_op_nop+(209*128) 10856 10857 /* ------------------------------ */ 10858 .balign 128 10859 .L_ALT_op_mul_int_lit16: /* 0xd2 */ 10860 /* File: x86_64/alt_stub.S */ 10861 /* 10862 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10863 * any interesting requests and then jump to the real instruction 10864 * handler. Unlike the Arm handler, we can't do this as a tail call 10865 * because rIBASE is caller save and we need to reload it. 10866 * 10867 * Note that unlike in the Arm implementation, we should never arrive 10868 * here with a zero breakFlag because we always refresh rIBASE on 10869 * return. 10870 */ 10871 .extern MterpCheckBefore 10872 REFRESH_IBASE 10873 movq rSELF, OUT_ARG0 10874 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10875 movq rPC, OUT_ARG2 10876 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10877 jmp .L_op_nop+(210*128) 10878 10879 /* ------------------------------ */ 10880 .balign 128 10881 .L_ALT_op_div_int_lit16: /* 0xd3 */ 10882 /* File: x86_64/alt_stub.S */ 10883 /* 10884 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10885 * any interesting requests and then jump to the real instruction 10886 * handler. Unlike the Arm handler, we can't do this as a tail call 10887 * because rIBASE is caller save and we need to reload it. 10888 * 10889 * Note that unlike in the Arm implementation, we should never arrive 10890 * here with a zero breakFlag because we always refresh rIBASE on 10891 * return. 10892 */ 10893 .extern MterpCheckBefore 10894 REFRESH_IBASE 10895 movq rSELF, OUT_ARG0 10896 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10897 movq rPC, OUT_ARG2 10898 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10899 jmp .L_op_nop+(211*128) 10900 10901 /* ------------------------------ */ 10902 .balign 128 10903 .L_ALT_op_rem_int_lit16: /* 0xd4 */ 10904 /* File: x86_64/alt_stub.S */ 10905 /* 10906 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10907 * any interesting requests and then jump to the real instruction 10908 * handler. Unlike the Arm handler, we can't do this as a tail call 10909 * because rIBASE is caller save and we need to reload it. 10910 * 10911 * Note that unlike in the Arm implementation, we should never arrive 10912 * here with a zero breakFlag because we always refresh rIBASE on 10913 * return. 10914 */ 10915 .extern MterpCheckBefore 10916 REFRESH_IBASE 10917 movq rSELF, OUT_ARG0 10918 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10919 movq rPC, OUT_ARG2 10920 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10921 jmp .L_op_nop+(212*128) 10922 10923 /* ------------------------------ */ 10924 .balign 128 10925 .L_ALT_op_and_int_lit16: /* 0xd5 */ 10926 /* File: x86_64/alt_stub.S */ 10927 /* 10928 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10929 * any interesting requests and then jump to the real instruction 10930 * handler. Unlike the Arm handler, we can't do this as a tail call 10931 * because rIBASE is caller save and we need to reload it. 10932 * 10933 * Note that unlike in the Arm implementation, we should never arrive 10934 * here with a zero breakFlag because we always refresh rIBASE on 10935 * return. 10936 */ 10937 .extern MterpCheckBefore 10938 REFRESH_IBASE 10939 movq rSELF, OUT_ARG0 10940 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10941 movq rPC, OUT_ARG2 10942 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10943 jmp .L_op_nop+(213*128) 10944 10945 /* ------------------------------ */ 10946 .balign 128 10947 .L_ALT_op_or_int_lit16: /* 0xd6 */ 10948 /* File: x86_64/alt_stub.S */ 10949 /* 10950 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10951 * any interesting requests and then jump to the real instruction 10952 * handler. Unlike the Arm handler, we can't do this as a tail call 10953 * because rIBASE is caller save and we need to reload it. 10954 * 10955 * Note that unlike in the Arm implementation, we should never arrive 10956 * here with a zero breakFlag because we always refresh rIBASE on 10957 * return. 10958 */ 10959 .extern MterpCheckBefore 10960 REFRESH_IBASE 10961 movq rSELF, OUT_ARG0 10962 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10963 movq rPC, OUT_ARG2 10964 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10965 jmp .L_op_nop+(214*128) 10966 10967 /* ------------------------------ */ 10968 .balign 128 10969 .L_ALT_op_xor_int_lit16: /* 0xd7 */ 10970 /* File: x86_64/alt_stub.S */ 10971 /* 10972 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10973 * any interesting requests and then jump to the real instruction 10974 * handler. Unlike the Arm handler, we can't do this as a tail call 10975 * because rIBASE is caller save and we need to reload it. 10976 * 10977 * Note that unlike in the Arm implementation, we should never arrive 10978 * here with a zero breakFlag because we always refresh rIBASE on 10979 * return. 10980 */ 10981 .extern MterpCheckBefore 10982 REFRESH_IBASE 10983 movq rSELF, OUT_ARG0 10984 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10985 movq rPC, OUT_ARG2 10986 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10987 jmp .L_op_nop+(215*128) 10988 10989 /* ------------------------------ */ 10990 .balign 128 10991 .L_ALT_op_add_int_lit8: /* 0xd8 */ 10992 /* File: x86_64/alt_stub.S */ 10993 /* 10994 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10995 * any interesting requests and then jump to the real instruction 10996 * handler. Unlike the Arm handler, we can't do this as a tail call 10997 * because rIBASE is caller save and we need to reload it. 10998 * 10999 * Note that unlike in the Arm implementation, we should never arrive 11000 * here with a zero breakFlag because we always refresh rIBASE on 11001 * return. 11002 */ 11003 .extern MterpCheckBefore 11004 REFRESH_IBASE 11005 movq rSELF, OUT_ARG0 11006 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11007 movq rPC, OUT_ARG2 11008 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11009 jmp .L_op_nop+(216*128) 11010 11011 /* ------------------------------ */ 11012 .balign 128 11013 .L_ALT_op_rsub_int_lit8: /* 0xd9 */ 11014 /* File: x86_64/alt_stub.S */ 11015 /* 11016 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11017 * any interesting requests and then jump to the real instruction 11018 * handler. Unlike the Arm handler, we can't do this as a tail call 11019 * because rIBASE is caller save and we need to reload it. 11020 * 11021 * Note that unlike in the Arm implementation, we should never arrive 11022 * here with a zero breakFlag because we always refresh rIBASE on 11023 * return. 11024 */ 11025 .extern MterpCheckBefore 11026 REFRESH_IBASE 11027 movq rSELF, OUT_ARG0 11028 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11029 movq rPC, OUT_ARG2 11030 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11031 jmp .L_op_nop+(217*128) 11032 11033 /* ------------------------------ */ 11034 .balign 128 11035 .L_ALT_op_mul_int_lit8: /* 0xda */ 11036 /* File: x86_64/alt_stub.S */ 11037 /* 11038 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11039 * any interesting requests and then jump to the real instruction 11040 * handler. Unlike the Arm handler, we can't do this as a tail call 11041 * because rIBASE is caller save and we need to reload it. 11042 * 11043 * Note that unlike in the Arm implementation, we should never arrive 11044 * here with a zero breakFlag because we always refresh rIBASE on 11045 * return. 11046 */ 11047 .extern MterpCheckBefore 11048 REFRESH_IBASE 11049 movq rSELF, OUT_ARG0 11050 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11051 movq rPC, OUT_ARG2 11052 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11053 jmp .L_op_nop+(218*128) 11054 11055 /* ------------------------------ */ 11056 .balign 128 11057 .L_ALT_op_div_int_lit8: /* 0xdb */ 11058 /* File: x86_64/alt_stub.S */ 11059 /* 11060 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11061 * any interesting requests and then jump to the real instruction 11062 * handler. Unlike the Arm handler, we can't do this as a tail call 11063 * because rIBASE is caller save and we need to reload it. 11064 * 11065 * Note that unlike in the Arm implementation, we should never arrive 11066 * here with a zero breakFlag because we always refresh rIBASE on 11067 * return. 11068 */ 11069 .extern MterpCheckBefore 11070 REFRESH_IBASE 11071 movq rSELF, OUT_ARG0 11072 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11073 movq rPC, OUT_ARG2 11074 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11075 jmp .L_op_nop+(219*128) 11076 11077 /* ------------------------------ */ 11078 .balign 128 11079 .L_ALT_op_rem_int_lit8: /* 0xdc */ 11080 /* File: x86_64/alt_stub.S */ 11081 /* 11082 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11083 * any interesting requests and then jump to the real instruction 11084 * handler. Unlike the Arm handler, we can't do this as a tail call 11085 * because rIBASE is caller save and we need to reload it. 11086 * 11087 * Note that unlike in the Arm implementation, we should never arrive 11088 * here with a zero breakFlag because we always refresh rIBASE on 11089 * return. 11090 */ 11091 .extern MterpCheckBefore 11092 REFRESH_IBASE 11093 movq rSELF, OUT_ARG0 11094 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11095 movq rPC, OUT_ARG2 11096 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11097 jmp .L_op_nop+(220*128) 11098 11099 /* ------------------------------ */ 11100 .balign 128 11101 .L_ALT_op_and_int_lit8: /* 0xdd */ 11102 /* File: x86_64/alt_stub.S */ 11103 /* 11104 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11105 * any interesting requests and then jump to the real instruction 11106 * handler. Unlike the Arm handler, we can't do this as a tail call 11107 * because rIBASE is caller save and we need to reload it. 11108 * 11109 * Note that unlike in the Arm implementation, we should never arrive 11110 * here with a zero breakFlag because we always refresh rIBASE on 11111 * return. 11112 */ 11113 .extern MterpCheckBefore 11114 REFRESH_IBASE 11115 movq rSELF, OUT_ARG0 11116 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11117 movq rPC, OUT_ARG2 11118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11119 jmp .L_op_nop+(221*128) 11120 11121 /* ------------------------------ */ 11122 .balign 128 11123 .L_ALT_op_or_int_lit8: /* 0xde */ 11124 /* File: x86_64/alt_stub.S */ 11125 /* 11126 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11127 * any interesting requests and then jump to the real instruction 11128 * handler. Unlike the Arm handler, we can't do this as a tail call 11129 * because rIBASE is caller save and we need to reload it. 11130 * 11131 * Note that unlike in the Arm implementation, we should never arrive 11132 * here with a zero breakFlag because we always refresh rIBASE on 11133 * return. 11134 */ 11135 .extern MterpCheckBefore 11136 REFRESH_IBASE 11137 movq rSELF, OUT_ARG0 11138 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11139 movq rPC, OUT_ARG2 11140 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11141 jmp .L_op_nop+(222*128) 11142 11143 /* ------------------------------ */ 11144 .balign 128 11145 .L_ALT_op_xor_int_lit8: /* 0xdf */ 11146 /* File: x86_64/alt_stub.S */ 11147 /* 11148 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11149 * any interesting requests and then jump to the real instruction 11150 * handler. Unlike the Arm handler, we can't do this as a tail call 11151 * because rIBASE is caller save and we need to reload it. 11152 * 11153 * Note that unlike in the Arm implementation, we should never arrive 11154 * here with a zero breakFlag because we always refresh rIBASE on 11155 * return. 11156 */ 11157 .extern MterpCheckBefore 11158 REFRESH_IBASE 11159 movq rSELF, OUT_ARG0 11160 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11161 movq rPC, OUT_ARG2 11162 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11163 jmp .L_op_nop+(223*128) 11164 11165 /* ------------------------------ */ 11166 .balign 128 11167 .L_ALT_op_shl_int_lit8: /* 0xe0 */ 11168 /* File: x86_64/alt_stub.S */ 11169 /* 11170 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11171 * any interesting requests and then jump to the real instruction 11172 * handler. Unlike the Arm handler, we can't do this as a tail call 11173 * because rIBASE is caller save and we need to reload it. 11174 * 11175 * Note that unlike in the Arm implementation, we should never arrive 11176 * here with a zero breakFlag because we always refresh rIBASE on 11177 * return. 11178 */ 11179 .extern MterpCheckBefore 11180 REFRESH_IBASE 11181 movq rSELF, OUT_ARG0 11182 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11183 movq rPC, OUT_ARG2 11184 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11185 jmp .L_op_nop+(224*128) 11186 11187 /* ------------------------------ */ 11188 .balign 128 11189 .L_ALT_op_shr_int_lit8: /* 0xe1 */ 11190 /* File: x86_64/alt_stub.S */ 11191 /* 11192 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11193 * any interesting requests and then jump to the real instruction 11194 * handler. Unlike the Arm handler, we can't do this as a tail call 11195 * because rIBASE is caller save and we need to reload it. 11196 * 11197 * Note that unlike in the Arm implementation, we should never arrive 11198 * here with a zero breakFlag because we always refresh rIBASE on 11199 * return. 11200 */ 11201 .extern MterpCheckBefore 11202 REFRESH_IBASE 11203 movq rSELF, OUT_ARG0 11204 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11205 movq rPC, OUT_ARG2 11206 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11207 jmp .L_op_nop+(225*128) 11208 11209 /* ------------------------------ */ 11210 .balign 128 11211 .L_ALT_op_ushr_int_lit8: /* 0xe2 */ 11212 /* File: x86_64/alt_stub.S */ 11213 /* 11214 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11215 * any interesting requests and then jump to the real instruction 11216 * handler. Unlike the Arm handler, we can't do this as a tail call 11217 * because rIBASE is caller save and we need to reload it. 11218 * 11219 * Note that unlike in the Arm implementation, we should never arrive 11220 * here with a zero breakFlag because we always refresh rIBASE on 11221 * return. 11222 */ 11223 .extern MterpCheckBefore 11224 REFRESH_IBASE 11225 movq rSELF, OUT_ARG0 11226 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11227 movq rPC, OUT_ARG2 11228 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11229 jmp .L_op_nop+(226*128) 11230 11231 /* ------------------------------ */ 11232 .balign 128 11233 .L_ALT_op_iget_quick: /* 0xe3 */ 11234 /* File: x86_64/alt_stub.S */ 11235 /* 11236 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11237 * any interesting requests and then jump to the real instruction 11238 * handler. Unlike the Arm handler, we can't do this as a tail call 11239 * because rIBASE is caller save and we need to reload it. 11240 * 11241 * Note that unlike in the Arm implementation, we should never arrive 11242 * here with a zero breakFlag because we always refresh rIBASE on 11243 * return. 11244 */ 11245 .extern MterpCheckBefore 11246 REFRESH_IBASE 11247 movq rSELF, OUT_ARG0 11248 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11249 movq rPC, OUT_ARG2 11250 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11251 jmp .L_op_nop+(227*128) 11252 11253 /* ------------------------------ */ 11254 .balign 128 11255 .L_ALT_op_iget_wide_quick: /* 0xe4 */ 11256 /* File: x86_64/alt_stub.S */ 11257 /* 11258 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11259 * any interesting requests and then jump to the real instruction 11260 * handler. Unlike the Arm handler, we can't do this as a tail call 11261 * because rIBASE is caller save and we need to reload it. 11262 * 11263 * Note that unlike in the Arm implementation, we should never arrive 11264 * here with a zero breakFlag because we always refresh rIBASE on 11265 * return. 11266 */ 11267 .extern MterpCheckBefore 11268 REFRESH_IBASE 11269 movq rSELF, OUT_ARG0 11270 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11271 movq rPC, OUT_ARG2 11272 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11273 jmp .L_op_nop+(228*128) 11274 11275 /* ------------------------------ */ 11276 .balign 128 11277 .L_ALT_op_iget_object_quick: /* 0xe5 */ 11278 /* File: x86_64/alt_stub.S */ 11279 /* 11280 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11281 * any interesting requests and then jump to the real instruction 11282 * handler. Unlike the Arm handler, we can't do this as a tail call 11283 * because rIBASE is caller save and we need to reload it. 11284 * 11285 * Note that unlike in the Arm implementation, we should never arrive 11286 * here with a zero breakFlag because we always refresh rIBASE on 11287 * return. 11288 */ 11289 .extern MterpCheckBefore 11290 REFRESH_IBASE 11291 movq rSELF, OUT_ARG0 11292 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11293 movq rPC, OUT_ARG2 11294 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11295 jmp .L_op_nop+(229*128) 11296 11297 /* ------------------------------ */ 11298 .balign 128 11299 .L_ALT_op_iput_quick: /* 0xe6 */ 11300 /* File: x86_64/alt_stub.S */ 11301 /* 11302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11303 * any interesting requests and then jump to the real instruction 11304 * handler. Unlike the Arm handler, we can't do this as a tail call 11305 * because rIBASE is caller save and we need to reload it. 11306 * 11307 * Note that unlike in the Arm implementation, we should never arrive 11308 * here with a zero breakFlag because we always refresh rIBASE on 11309 * return. 11310 */ 11311 .extern MterpCheckBefore 11312 REFRESH_IBASE 11313 movq rSELF, OUT_ARG0 11314 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11315 movq rPC, OUT_ARG2 11316 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11317 jmp .L_op_nop+(230*128) 11318 11319 /* ------------------------------ */ 11320 .balign 128 11321 .L_ALT_op_iput_wide_quick: /* 0xe7 */ 11322 /* File: x86_64/alt_stub.S */ 11323 /* 11324 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11325 * any interesting requests and then jump to the real instruction 11326 * handler. Unlike the Arm handler, we can't do this as a tail call 11327 * because rIBASE is caller save and we need to reload it. 11328 * 11329 * Note that unlike in the Arm implementation, we should never arrive 11330 * here with a zero breakFlag because we always refresh rIBASE on 11331 * return. 11332 */ 11333 .extern MterpCheckBefore 11334 REFRESH_IBASE 11335 movq rSELF, OUT_ARG0 11336 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11337 movq rPC, OUT_ARG2 11338 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11339 jmp .L_op_nop+(231*128) 11340 11341 /* ------------------------------ */ 11342 .balign 128 11343 .L_ALT_op_iput_object_quick: /* 0xe8 */ 11344 /* File: x86_64/alt_stub.S */ 11345 /* 11346 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11347 * any interesting requests and then jump to the real instruction 11348 * handler. Unlike the Arm handler, we can't do this as a tail call 11349 * because rIBASE is caller save and we need to reload it. 11350 * 11351 * Note that unlike in the Arm implementation, we should never arrive 11352 * here with a zero breakFlag because we always refresh rIBASE on 11353 * return. 11354 */ 11355 .extern MterpCheckBefore 11356 REFRESH_IBASE 11357 movq rSELF, OUT_ARG0 11358 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11359 movq rPC, OUT_ARG2 11360 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11361 jmp .L_op_nop+(232*128) 11362 11363 /* ------------------------------ */ 11364 .balign 128 11365 .L_ALT_op_invoke_virtual_quick: /* 0xe9 */ 11366 /* File: x86_64/alt_stub.S */ 11367 /* 11368 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11369 * any interesting requests and then jump to the real instruction 11370 * handler. Unlike the Arm handler, we can't do this as a tail call 11371 * because rIBASE is caller save and we need to reload it. 11372 * 11373 * Note that unlike in the Arm implementation, we should never arrive 11374 * here with a zero breakFlag because we always refresh rIBASE on 11375 * return. 11376 */ 11377 .extern MterpCheckBefore 11378 REFRESH_IBASE 11379 movq rSELF, OUT_ARG0 11380 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11381 movq rPC, OUT_ARG2 11382 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11383 jmp .L_op_nop+(233*128) 11384 11385 /* ------------------------------ */ 11386 .balign 128 11387 .L_ALT_op_invoke_virtual_range_quick: /* 0xea */ 11388 /* File: x86_64/alt_stub.S */ 11389 /* 11390 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11391 * any interesting requests and then jump to the real instruction 11392 * handler. Unlike the Arm handler, we can't do this as a tail call 11393 * because rIBASE is caller save and we need to reload it. 11394 * 11395 * Note that unlike in the Arm implementation, we should never arrive 11396 * here with a zero breakFlag because we always refresh rIBASE on 11397 * return. 11398 */ 11399 .extern MterpCheckBefore 11400 REFRESH_IBASE 11401 movq rSELF, OUT_ARG0 11402 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11403 movq rPC, OUT_ARG2 11404 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11405 jmp .L_op_nop+(234*128) 11406 11407 /* ------------------------------ */ 11408 .balign 128 11409 .L_ALT_op_iput_boolean_quick: /* 0xeb */ 11410 /* File: x86_64/alt_stub.S */ 11411 /* 11412 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11413 * any interesting requests and then jump to the real instruction 11414 * handler. Unlike the Arm handler, we can't do this as a tail call 11415 * because rIBASE is caller save and we need to reload it. 11416 * 11417 * Note that unlike in the Arm implementation, we should never arrive 11418 * here with a zero breakFlag because we always refresh rIBASE on 11419 * return. 11420 */ 11421 .extern MterpCheckBefore 11422 REFRESH_IBASE 11423 movq rSELF, OUT_ARG0 11424 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11425 movq rPC, OUT_ARG2 11426 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11427 jmp .L_op_nop+(235*128) 11428 11429 /* ------------------------------ */ 11430 .balign 128 11431 .L_ALT_op_iput_byte_quick: /* 0xec */ 11432 /* File: x86_64/alt_stub.S */ 11433 /* 11434 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11435 * any interesting requests and then jump to the real instruction 11436 * handler. Unlike the Arm handler, we can't do this as a tail call 11437 * because rIBASE is caller save and we need to reload it. 11438 * 11439 * Note that unlike in the Arm implementation, we should never arrive 11440 * here with a zero breakFlag because we always refresh rIBASE on 11441 * return. 11442 */ 11443 .extern MterpCheckBefore 11444 REFRESH_IBASE 11445 movq rSELF, OUT_ARG0 11446 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11447 movq rPC, OUT_ARG2 11448 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11449 jmp .L_op_nop+(236*128) 11450 11451 /* ------------------------------ */ 11452 .balign 128 11453 .L_ALT_op_iput_char_quick: /* 0xed */ 11454 /* File: x86_64/alt_stub.S */ 11455 /* 11456 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11457 * any interesting requests and then jump to the real instruction 11458 * handler. Unlike the Arm handler, we can't do this as a tail call 11459 * because rIBASE is caller save and we need to reload it. 11460 * 11461 * Note that unlike in the Arm implementation, we should never arrive 11462 * here with a zero breakFlag because we always refresh rIBASE on 11463 * return. 11464 */ 11465 .extern MterpCheckBefore 11466 REFRESH_IBASE 11467 movq rSELF, OUT_ARG0 11468 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11469 movq rPC, OUT_ARG2 11470 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11471 jmp .L_op_nop+(237*128) 11472 11473 /* ------------------------------ */ 11474 .balign 128 11475 .L_ALT_op_iput_short_quick: /* 0xee */ 11476 /* File: x86_64/alt_stub.S */ 11477 /* 11478 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11479 * any interesting requests and then jump to the real instruction 11480 * handler. Unlike the Arm handler, we can't do this as a tail call 11481 * because rIBASE is caller save and we need to reload it. 11482 * 11483 * Note that unlike in the Arm implementation, we should never arrive 11484 * here with a zero breakFlag because we always refresh rIBASE on 11485 * return. 11486 */ 11487 .extern MterpCheckBefore 11488 REFRESH_IBASE 11489 movq rSELF, OUT_ARG0 11490 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11491 movq rPC, OUT_ARG2 11492 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11493 jmp .L_op_nop+(238*128) 11494 11495 /* ------------------------------ */ 11496 .balign 128 11497 .L_ALT_op_iget_boolean_quick: /* 0xef */ 11498 /* File: x86_64/alt_stub.S */ 11499 /* 11500 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11501 * any interesting requests and then jump to the real instruction 11502 * handler. Unlike the Arm handler, we can't do this as a tail call 11503 * because rIBASE is caller save and we need to reload it. 11504 * 11505 * Note that unlike in the Arm implementation, we should never arrive 11506 * here with a zero breakFlag because we always refresh rIBASE on 11507 * return. 11508 */ 11509 .extern MterpCheckBefore 11510 REFRESH_IBASE 11511 movq rSELF, OUT_ARG0 11512 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11513 movq rPC, OUT_ARG2 11514 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11515 jmp .L_op_nop+(239*128) 11516 11517 /* ------------------------------ */ 11518 .balign 128 11519 .L_ALT_op_iget_byte_quick: /* 0xf0 */ 11520 /* File: x86_64/alt_stub.S */ 11521 /* 11522 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11523 * any interesting requests and then jump to the real instruction 11524 * handler. Unlike the Arm handler, we can't do this as a tail call 11525 * because rIBASE is caller save and we need to reload it. 11526 * 11527 * Note that unlike in the Arm implementation, we should never arrive 11528 * here with a zero breakFlag because we always refresh rIBASE on 11529 * return. 11530 */ 11531 .extern MterpCheckBefore 11532 REFRESH_IBASE 11533 movq rSELF, OUT_ARG0 11534 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11535 movq rPC, OUT_ARG2 11536 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11537 jmp .L_op_nop+(240*128) 11538 11539 /* ------------------------------ */ 11540 .balign 128 11541 .L_ALT_op_iget_char_quick: /* 0xf1 */ 11542 /* File: x86_64/alt_stub.S */ 11543 /* 11544 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11545 * any interesting requests and then jump to the real instruction 11546 * handler. Unlike the Arm handler, we can't do this as a tail call 11547 * because rIBASE is caller save and we need to reload it. 11548 * 11549 * Note that unlike in the Arm implementation, we should never arrive 11550 * here with a zero breakFlag because we always refresh rIBASE on 11551 * return. 11552 */ 11553 .extern MterpCheckBefore 11554 REFRESH_IBASE 11555 movq rSELF, OUT_ARG0 11556 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11557 movq rPC, OUT_ARG2 11558 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11559 jmp .L_op_nop+(241*128) 11560 11561 /* ------------------------------ */ 11562 .balign 128 11563 .L_ALT_op_iget_short_quick: /* 0xf2 */ 11564 /* File: x86_64/alt_stub.S */ 11565 /* 11566 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11567 * any interesting requests and then jump to the real instruction 11568 * handler. Unlike the Arm handler, we can't do this as a tail call 11569 * because rIBASE is caller save and we need to reload it. 11570 * 11571 * Note that unlike in the Arm implementation, we should never arrive 11572 * here with a zero breakFlag because we always refresh rIBASE on 11573 * return. 11574 */ 11575 .extern MterpCheckBefore 11576 REFRESH_IBASE 11577 movq rSELF, OUT_ARG0 11578 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11579 movq rPC, OUT_ARG2 11580 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11581 jmp .L_op_nop+(242*128) 11582 11583 /* ------------------------------ */ 11584 .balign 128 11585 .L_ALT_op_unused_f3: /* 0xf3 */ 11586 /* File: x86_64/alt_stub.S */ 11587 /* 11588 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11589 * any interesting requests and then jump to the real instruction 11590 * handler. Unlike the Arm handler, we can't do this as a tail call 11591 * because rIBASE is caller save and we need to reload it. 11592 * 11593 * Note that unlike in the Arm implementation, we should never arrive 11594 * here with a zero breakFlag because we always refresh rIBASE on 11595 * return. 11596 */ 11597 .extern MterpCheckBefore 11598 REFRESH_IBASE 11599 movq rSELF, OUT_ARG0 11600 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11601 movq rPC, OUT_ARG2 11602 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11603 jmp .L_op_nop+(243*128) 11604 11605 /* ------------------------------ */ 11606 .balign 128 11607 .L_ALT_op_unused_f4: /* 0xf4 */ 11608 /* File: x86_64/alt_stub.S */ 11609 /* 11610 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11611 * any interesting requests and then jump to the real instruction 11612 * handler. Unlike the Arm handler, we can't do this as a tail call 11613 * because rIBASE is caller save and we need to reload it. 11614 * 11615 * Note that unlike in the Arm implementation, we should never arrive 11616 * here with a zero breakFlag because we always refresh rIBASE on 11617 * return. 11618 */ 11619 .extern MterpCheckBefore 11620 REFRESH_IBASE 11621 movq rSELF, OUT_ARG0 11622 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11623 movq rPC, OUT_ARG2 11624 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11625 jmp .L_op_nop+(244*128) 11626 11627 /* ------------------------------ */ 11628 .balign 128 11629 .L_ALT_op_unused_f5: /* 0xf5 */ 11630 /* File: x86_64/alt_stub.S */ 11631 /* 11632 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11633 * any interesting requests and then jump to the real instruction 11634 * handler. Unlike the Arm handler, we can't do this as a tail call 11635 * because rIBASE is caller save and we need to reload it. 11636 * 11637 * Note that unlike in the Arm implementation, we should never arrive 11638 * here with a zero breakFlag because we always refresh rIBASE on 11639 * return. 11640 */ 11641 .extern MterpCheckBefore 11642 REFRESH_IBASE 11643 movq rSELF, OUT_ARG0 11644 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11645 movq rPC, OUT_ARG2 11646 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11647 jmp .L_op_nop+(245*128) 11648 11649 /* ------------------------------ */ 11650 .balign 128 11651 .L_ALT_op_unused_f6: /* 0xf6 */ 11652 /* File: x86_64/alt_stub.S */ 11653 /* 11654 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11655 * any interesting requests and then jump to the real instruction 11656 * handler. Unlike the Arm handler, we can't do this as a tail call 11657 * because rIBASE is caller save and we need to reload it. 11658 * 11659 * Note that unlike in the Arm implementation, we should never arrive 11660 * here with a zero breakFlag because we always refresh rIBASE on 11661 * return. 11662 */ 11663 .extern MterpCheckBefore 11664 REFRESH_IBASE 11665 movq rSELF, OUT_ARG0 11666 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11667 movq rPC, OUT_ARG2 11668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11669 jmp .L_op_nop+(246*128) 11670 11671 /* ------------------------------ */ 11672 .balign 128 11673 .L_ALT_op_unused_f7: /* 0xf7 */ 11674 /* File: x86_64/alt_stub.S */ 11675 /* 11676 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11677 * any interesting requests and then jump to the real instruction 11678 * handler. Unlike the Arm handler, we can't do this as a tail call 11679 * because rIBASE is caller save and we need to reload it. 11680 * 11681 * Note that unlike in the Arm implementation, we should never arrive 11682 * here with a zero breakFlag because we always refresh rIBASE on 11683 * return. 11684 */ 11685 .extern MterpCheckBefore 11686 REFRESH_IBASE 11687 movq rSELF, OUT_ARG0 11688 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11689 movq rPC, OUT_ARG2 11690 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11691 jmp .L_op_nop+(247*128) 11692 11693 /* ------------------------------ */ 11694 .balign 128 11695 .L_ALT_op_unused_f8: /* 0xf8 */ 11696 /* File: x86_64/alt_stub.S */ 11697 /* 11698 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11699 * any interesting requests and then jump to the real instruction 11700 * handler. Unlike the Arm handler, we can't do this as a tail call 11701 * because rIBASE is caller save and we need to reload it. 11702 * 11703 * Note that unlike in the Arm implementation, we should never arrive 11704 * here with a zero breakFlag because we always refresh rIBASE on 11705 * return. 11706 */ 11707 .extern MterpCheckBefore 11708 REFRESH_IBASE 11709 movq rSELF, OUT_ARG0 11710 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11711 movq rPC, OUT_ARG2 11712 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11713 jmp .L_op_nop+(248*128) 11714 11715 /* ------------------------------ */ 11716 .balign 128 11717 .L_ALT_op_unused_f9: /* 0xf9 */ 11718 /* File: x86_64/alt_stub.S */ 11719 /* 11720 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11721 * any interesting requests and then jump to the real instruction 11722 * handler. Unlike the Arm handler, we can't do this as a tail call 11723 * because rIBASE is caller save and we need to reload it. 11724 * 11725 * Note that unlike in the Arm implementation, we should never arrive 11726 * here with a zero breakFlag because we always refresh rIBASE on 11727 * return. 11728 */ 11729 .extern MterpCheckBefore 11730 REFRESH_IBASE 11731 movq rSELF, OUT_ARG0 11732 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11733 movq rPC, OUT_ARG2 11734 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11735 jmp .L_op_nop+(249*128) 11736 11737 /* ------------------------------ */ 11738 .balign 128 11739 .L_ALT_op_invoke_polymorphic: /* 0xfa */ 11740 /* File: x86_64/alt_stub.S */ 11741 /* 11742 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11743 * any interesting requests and then jump to the real instruction 11744 * handler. Unlike the Arm handler, we can't do this as a tail call 11745 * because rIBASE is caller save and we need to reload it. 11746 * 11747 * Note that unlike in the Arm implementation, we should never arrive 11748 * here with a zero breakFlag because we always refresh rIBASE on 11749 * return. 11750 */ 11751 .extern MterpCheckBefore 11752 REFRESH_IBASE 11753 movq rSELF, OUT_ARG0 11754 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11755 movq rPC, OUT_ARG2 11756 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11757 jmp .L_op_nop+(250*128) 11758 11759 /* ------------------------------ */ 11760 .balign 128 11761 .L_ALT_op_invoke_polymorphic_range: /* 0xfb */ 11762 /* File: x86_64/alt_stub.S */ 11763 /* 11764 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11765 * any interesting requests and then jump to the real instruction 11766 * handler. Unlike the Arm handler, we can't do this as a tail call 11767 * because rIBASE is caller save and we need to reload it. 11768 * 11769 * Note that unlike in the Arm implementation, we should never arrive 11770 * here with a zero breakFlag because we always refresh rIBASE on 11771 * return. 11772 */ 11773 .extern MterpCheckBefore 11774 REFRESH_IBASE 11775 movq rSELF, OUT_ARG0 11776 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11777 movq rPC, OUT_ARG2 11778 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11779 jmp .L_op_nop+(251*128) 11780 11781 /* ------------------------------ */ 11782 .balign 128 11783 .L_ALT_op_invoke_custom: /* 0xfc */ 11784 /* File: x86_64/alt_stub.S */ 11785 /* 11786 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11787 * any interesting requests and then jump to the real instruction 11788 * handler. Unlike the Arm handler, we can't do this as a tail call 11789 * because rIBASE is caller save and we need to reload it. 11790 * 11791 * Note that unlike in the Arm implementation, we should never arrive 11792 * here with a zero breakFlag because we always refresh rIBASE on 11793 * return. 11794 */ 11795 .extern MterpCheckBefore 11796 REFRESH_IBASE 11797 movq rSELF, OUT_ARG0 11798 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11799 movq rPC, OUT_ARG2 11800 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11801 jmp .L_op_nop+(252*128) 11802 11803 /* ------------------------------ */ 11804 .balign 128 11805 .L_ALT_op_invoke_custom_range: /* 0xfd */ 11806 /* File: x86_64/alt_stub.S */ 11807 /* 11808 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11809 * any interesting requests and then jump to the real instruction 11810 * handler. Unlike the Arm handler, we can't do this as a tail call 11811 * because rIBASE is caller save and we need to reload it. 11812 * 11813 * Note that unlike in the Arm implementation, we should never arrive 11814 * here with a zero breakFlag because we always refresh rIBASE on 11815 * return. 11816 */ 11817 .extern MterpCheckBefore 11818 REFRESH_IBASE 11819 movq rSELF, OUT_ARG0 11820 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11821 movq rPC, OUT_ARG2 11822 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11823 jmp .L_op_nop+(253*128) 11824 11825 /* ------------------------------ */ 11826 .balign 128 11827 .L_ALT_op_const_method_handle: /* 0xfe */ 11828 /* File: x86_64/alt_stub.S */ 11829 /* 11830 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11831 * any interesting requests and then jump to the real instruction 11832 * handler. Unlike the Arm handler, we can't do this as a tail call 11833 * because rIBASE is caller save and we need to reload it. 11834 * 11835 * Note that unlike in the Arm implementation, we should never arrive 11836 * here with a zero breakFlag because we always refresh rIBASE on 11837 * return. 11838 */ 11839 .extern MterpCheckBefore 11840 REFRESH_IBASE 11841 movq rSELF, OUT_ARG0 11842 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11843 movq rPC, OUT_ARG2 11844 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11845 jmp .L_op_nop+(254*128) 11846 11847 /* ------------------------------ */ 11848 .balign 128 11849 .L_ALT_op_const_method_type: /* 0xff */ 11850 /* File: x86_64/alt_stub.S */ 11851 /* 11852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11853 * any interesting requests and then jump to the real instruction 11854 * handler. Unlike the Arm handler, we can't do this as a tail call 11855 * because rIBASE is caller save and we need to reload it. 11856 * 11857 * Note that unlike in the Arm implementation, we should never arrive 11858 * here with a zero breakFlag because we always refresh rIBASE on 11859 * return. 11860 */ 11861 .extern MterpCheckBefore 11862 REFRESH_IBASE 11863 movq rSELF, OUT_ARG0 11864 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11865 movq rPC, OUT_ARG2 11866 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11867 jmp .L_op_nop+(255*128) 11868 11869 .balign 128 11870 .global SYMBOL(artMterpAsmAltInstructionEnd) 11871 SYMBOL(artMterpAsmAltInstructionEnd): 11872 /* File: x86_64/footer.S */ 11873 /* 11874 * =========================================================================== 11875 * Common subroutines and data 11876 * =========================================================================== 11877 */ 11878 11879 .text 11880 .align 2 11881 11882 /* 11883 * We've detected a condition that will result in an exception, but the exception 11884 * has not yet been thrown. Just bail out to the reference interpreter to deal with it. 11885 * TUNING: for consistency, we may want to just go ahead and handle these here. 11886 */ 11887 common_errDivideByZero: 11888 EXPORT_PC 11889 #if MTERP_LOGGING 11890 movq rSELF, OUT_ARG0 11891 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11892 call SYMBOL(MterpLogDivideByZeroException) 11893 #endif 11894 jmp MterpCommonFallback 11895 11896 common_errArrayIndex: 11897 EXPORT_PC 11898 #if MTERP_LOGGING 11899 movq rSELF, OUT_ARG0 11900 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11901 call SYMBOL(MterpLogArrayIndexException) 11902 #endif 11903 jmp MterpCommonFallback 11904 11905 common_errNegativeArraySize: 11906 EXPORT_PC 11907 #if MTERP_LOGGING 11908 movq rSELF, OUT_ARG0 11909 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11910 call SYMBOL(MterpLogNegativeArraySizeException) 11911 #endif 11912 jmp MterpCommonFallback 11913 11914 common_errNoSuchMethod: 11915 EXPORT_PC 11916 #if MTERP_LOGGING 11917 movq rSELF, OUT_ARG0 11918 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11919 call SYMBOL(MterpLogNoSuchMethodException) 11920 #endif 11921 jmp MterpCommonFallback 11922 11923 common_errNullObject: 11924 EXPORT_PC 11925 #if MTERP_LOGGING 11926 movq rSELF, OUT_ARG0 11927 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11928 call SYMBOL(MterpLogNullObjectException) 11929 #endif 11930 jmp MterpCommonFallback 11931 11932 common_exceptionThrown: 11933 EXPORT_PC 11934 #if MTERP_LOGGING 11935 movq rSELF, OUT_ARG0 11936 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11937 call SYMBOL(MterpLogExceptionThrownException) 11938 #endif 11939 jmp MterpCommonFallback 11940 11941 MterpSuspendFallback: 11942 EXPORT_PC 11943 #if MTERP_LOGGING 11944 movq rSELF, OUT_ARG0 11945 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11946 movl THREAD_FLAGS_OFFSET(OUT_ARG0), OUT_32_ARG2 11947 call SYMBOL(MterpLogSuspendFallback) 11948 #endif 11949 jmp MterpCommonFallback 11950 11951 /* 11952 * If we're here, something is out of the ordinary. If there is a pending 11953 * exception, handle it. Otherwise, roll back and retry with the reference 11954 * interpreter. 11955 */ 11956 MterpPossibleException: 11957 movq rSELF, %rcx 11958 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 11959 jz MterpFallback 11960 /* intentional fallthrough - handle pending exception. */ 11961 11962 /* 11963 * On return from a runtime helper routine, we've found a pending exception. 11964 * Can we handle it here - or need to bail out to caller? 11965 * 11966 */ 11967 MterpException: 11968 movq rSELF, OUT_ARG0 11969 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11970 call SYMBOL(MterpHandleException) 11971 testb %al, %al 11972 jz MterpExceptionReturn 11973 movq OFF_FP_DEX_INSTRUCTIONS(rFP), %rax 11974 mov OFF_FP_DEX_PC(rFP), %ecx 11975 leaq (%rax, %rcx, 2), rPC 11976 movq rPC, OFF_FP_DEX_PC_PTR(rFP) 11977 /* Do we need to switch interpreters? */ 11978 call SYMBOL(MterpShouldSwitchInterpreters) 11979 testb %al, %al 11980 jnz MterpFallback 11981 /* resume execution at catch block */ 11982 REFRESH_IBASE 11983 FETCH_INST 11984 GOTO_NEXT 11985 /* NOTE: no fallthrough */ 11986 11987 /* 11988 * Common handling for branches with support for Jit profiling. 11989 * On entry: 11990 * rINST <= signed offset 11991 * rPROFILE <= signed hotness countdown (expanded to 32 bits) 11992 * condition bits <= set to establish sign of offset (use "NoFlags" entry if not) 11993 * 11994 * We have quite a few different cases for branch profiling, OSR detection and 11995 * suspend check support here. 11996 * 11997 * Taken backward branches: 11998 * If profiling active, do hotness countdown and report if we hit zero. 11999 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 12000 * Is there a pending suspend request? If so, suspend. 12001 * 12002 * Taken forward branches and not-taken backward branches: 12003 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 12004 * 12005 * Our most common case is expected to be a taken backward branch with active jit profiling, 12006 * but no full OSR check and no pending suspend request. 12007 * Next most common case is not-taken branch with no full OSR check. 12008 * 12009 */ 12010 MterpCommonTakenBranch: 12011 jg .L_forward_branch # don't add forward branches to hotness 12012 /* 12013 * We need to subtract 1 from positive values and we should not see 0 here, 12014 * so we may use the result of the comparison with -1. 12015 */ 12016 #if JIT_CHECK_OSR != -1 12017 # error "JIT_CHECK_OSR must be -1." 12018 #endif 12019 cmpl $JIT_CHECK_OSR, rPROFILE 12020 je .L_osr_check 12021 decl rPROFILE 12022 je .L_add_batch # counted down to zero - report 12023 .L_resume_backward_branch: 12024 movq rSELF, %rax 12025 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%rax) 12026 REFRESH_IBASE_REG %rax 12027 leaq (rPC, rINSTq, 2), rPC 12028 FETCH_INST 12029 jnz .L_suspend_request_pending 12030 GOTO_NEXT 12031 12032 .L_suspend_request_pending: 12033 EXPORT_PC 12034 movq rSELF, OUT_ARG0 12035 call SYMBOL(MterpSuspendCheck) # (self) 12036 testb %al, %al 12037 jnz MterpFallback 12038 REFRESH_IBASE # might have changed during suspend 12039 GOTO_NEXT 12040 12041 .L_no_count_backwards: 12042 cmpl $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 12043 jne .L_resume_backward_branch 12044 .L_osr_check: 12045 EXPORT_PC 12046 movq rSELF, OUT_ARG0 12047 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12048 movq rINSTq, OUT_ARG2 12049 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12050 testb %al, %al 12051 jz .L_resume_backward_branch 12052 jmp MterpOnStackReplacement 12053 12054 .L_forward_branch: 12055 cmpl $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 12056 je .L_check_osr_forward 12057 .L_resume_forward_branch: 12058 leaq (rPC, rINSTq, 2), rPC 12059 FETCH_INST 12060 GOTO_NEXT 12061 12062 .L_check_osr_forward: 12063 EXPORT_PC 12064 movq rSELF, OUT_ARG0 12065 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12066 movq rINSTq, OUT_ARG2 12067 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12068 testb %al, %al 12069 jz .L_resume_forward_branch 12070 jmp MterpOnStackReplacement 12071 12072 .L_add_batch: 12073 movl rPROFILE, %eax 12074 movq OFF_FP_METHOD(rFP), OUT_ARG0 12075 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12076 movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP) 12077 movq rSELF, OUT_ARG2 12078 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 12079 movswl %ax, rPROFILE 12080 jmp .L_no_count_backwards 12081 12082 /* 12083 * Entered from the conditional branch handlers when OSR check request active on 12084 * not-taken path. All Dalvik not-taken conditional branch offsets are 2. 12085 */ 12086 .L_check_not_taken_osr: 12087 EXPORT_PC 12088 movq rSELF, OUT_ARG0 12089 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12090 movl $2, OUT_32_ARG2 12091 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12092 testb %al, %al 12093 jnz MterpOnStackReplacement 12094 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 12095 12096 /* 12097 * On-stack replacement has happened, and now we've returned from the compiled method. 12098 */ 12099 MterpOnStackReplacement: 12100 #if MTERP_LOGGING 12101 movq rSELF, OUT_ARG0 12102 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12103 movl rINST, OUT_32_ARG2 12104 call SYMBOL(MterpLogOSR) 12105 #endif 12106 movl $1, %eax 12107 jmp MterpDone 12108 12109 /* 12110 * Bail out to reference interpreter. 12111 */ 12112 MterpFallback: 12113 EXPORT_PC 12114 #if MTERP_LOGGING 12115 movq rSELF, OUT_ARG0 12116 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12117 call SYMBOL(MterpLogFallback) 12118 #endif 12119 MterpCommonFallback: 12120 xorl %eax, %eax 12121 jmp MterpDone 12122 12123 /* 12124 * On entry: 12125 * uint32_t* rFP (should still be live, pointer to base of vregs) 12126 */ 12127 MterpExceptionReturn: 12128 movl $1, %eax 12129 jmp MterpDone 12130 MterpReturn: 12131 movq OFF_FP_RESULT_REGISTER(rFP), %rdx 12132 movq %rax, (%rdx) 12133 movl $1, %eax 12134 MterpDone: 12135 /* 12136 * At this point, we expect rPROFILE to be non-zero. If negative, hotness is disabled or we're 12137 * checking for OSR. If greater than zero, we might have unreported hotness to register 12138 * (the difference between the ending rPROFILE and the cached hotness counter). rPROFILE 12139 * should only reach zero immediately after a hotness decrement, and is then reset to either 12140 * a negative special state or the new non-zero countdown value. 12141 */ 12142 testl rPROFILE, rPROFILE 12143 jle MRestoreFrame # if > 0, we may have some counts to report. 12144 12145 movl %eax, rINST # stash return value 12146 /* Report cached hotness counts */ 12147 movl rPROFILE, %eax 12148 movq OFF_FP_METHOD(rFP), OUT_ARG0 12149 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12150 movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP) 12151 movq rSELF, OUT_ARG2 12152 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 12153 movl rINST, %eax # restore return value 12154 12155 /* pop up frame */ 12156 MRestoreFrame: 12157 addq $FRAME_SIZE, %rsp 12158 .cfi_adjust_cfa_offset -FRAME_SIZE 12159 12160 /* Restore callee save register */ 12161 POP %r15 12162 POP %r14 12163 POP %r13 12164 POP %r12 12165 POP %rbp 12166 POP %rbx 12167 ret 12168 .cfi_endproc 12169 SIZE(ExecuteMterpImpl,ExecuteMterpImpl) 12170 12171
