1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __LINUX_DCBNL_H__ 20 #define __LINUX_DCBNL_H__ 21 #include <linux/types.h> 22 #define IEEE_8021QAZ_MAX_TCS 8 23 #define IEEE_8021QAZ_TSA_STRICT 0 24 #define IEEE_8021QAZ_TSA_CB_SHAPER 1 25 #define IEEE_8021QAZ_TSA_ETS 2 26 #define IEEE_8021QAZ_TSA_VENDOR 255 27 struct ieee_ets { 28 __u8 willing; 29 __u8 ets_cap; 30 __u8 cbs; 31 __u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS]; 32 __u8 tc_rx_bw[IEEE_8021QAZ_MAX_TCS]; 33 __u8 tc_tsa[IEEE_8021QAZ_MAX_TCS]; 34 __u8 prio_tc[IEEE_8021QAZ_MAX_TCS]; 35 __u8 tc_reco_bw[IEEE_8021QAZ_MAX_TCS]; 36 __u8 tc_reco_tsa[IEEE_8021QAZ_MAX_TCS]; 37 __u8 reco_prio_tc[IEEE_8021QAZ_MAX_TCS]; 38 }; 39 struct ieee_maxrate { 40 __u64 tc_maxrate[IEEE_8021QAZ_MAX_TCS]; 41 }; 42 enum dcbnl_cndd_states { 43 DCB_CNDD_RESET = 0, 44 DCB_CNDD_EDGE, 45 DCB_CNDD_INTERIOR, 46 DCB_CNDD_INTERIOR_READY, 47 }; 48 struct ieee_qcn { 49 __u8 rpg_enable[IEEE_8021QAZ_MAX_TCS]; 50 __u32 rppp_max_rps[IEEE_8021QAZ_MAX_TCS]; 51 __u32 rpg_time_reset[IEEE_8021QAZ_MAX_TCS]; 52 __u32 rpg_byte_reset[IEEE_8021QAZ_MAX_TCS]; 53 __u32 rpg_threshold[IEEE_8021QAZ_MAX_TCS]; 54 __u32 rpg_max_rate[IEEE_8021QAZ_MAX_TCS]; 55 __u32 rpg_ai_rate[IEEE_8021QAZ_MAX_TCS]; 56 __u32 rpg_hai_rate[IEEE_8021QAZ_MAX_TCS]; 57 __u32 rpg_gd[IEEE_8021QAZ_MAX_TCS]; 58 __u32 rpg_min_dec_fac[IEEE_8021QAZ_MAX_TCS]; 59 __u32 rpg_min_rate[IEEE_8021QAZ_MAX_TCS]; 60 __u32 cndd_state_machine[IEEE_8021QAZ_MAX_TCS]; 61 }; 62 struct ieee_qcn_stats { 63 __u64 rppp_rp_centiseconds[IEEE_8021QAZ_MAX_TCS]; 64 __u32 rppp_created_rps[IEEE_8021QAZ_MAX_TCS]; 65 }; 66 struct ieee_pfc { 67 __u8 pfc_cap; 68 __u8 pfc_en; 69 __u8 mbc; 70 __u16 delay; 71 __u64 requests[IEEE_8021QAZ_MAX_TCS]; 72 __u64 indications[IEEE_8021QAZ_MAX_TCS]; 73 }; 74 #define CEE_DCBX_MAX_PGS 8 75 #define CEE_DCBX_MAX_PRIO 8 76 struct cee_pg { 77 __u8 willing; 78 __u8 error; 79 __u8 pg_en; 80 __u8 tcs_supported; 81 __u8 pg_bw[CEE_DCBX_MAX_PGS]; 82 __u8 prio_pg[CEE_DCBX_MAX_PGS]; 83 }; 84 struct cee_pfc { 85 __u8 willing; 86 __u8 error; 87 __u8 pfc_en; 88 __u8 tcs_supported; 89 }; 90 #define IEEE_8021QAZ_APP_SEL_ETHERTYPE 1 91 #define IEEE_8021QAZ_APP_SEL_STREAM 2 92 #define IEEE_8021QAZ_APP_SEL_DGRAM 3 93 #define IEEE_8021QAZ_APP_SEL_ANY 4 94 #define IEEE_8021QAZ_APP_SEL_DSCP 5 95 struct dcb_app { 96 __u8 selector; 97 __u8 priority; 98 __u16 protocol; 99 }; 100 struct dcb_peer_app_info { 101 __u8 willing; 102 __u8 error; 103 }; 104 struct dcbmsg { 105 __u8 dcb_family; 106 __u8 cmd; 107 __u16 dcb_pad; 108 }; 109 enum dcbnl_commands { 110 DCB_CMD_UNDEFINED, 111 DCB_CMD_GSTATE, 112 DCB_CMD_SSTATE, 113 DCB_CMD_PGTX_GCFG, 114 DCB_CMD_PGTX_SCFG, 115 DCB_CMD_PGRX_GCFG, 116 DCB_CMD_PGRX_SCFG, 117 DCB_CMD_PFC_GCFG, 118 DCB_CMD_PFC_SCFG, 119 DCB_CMD_SET_ALL, 120 DCB_CMD_GPERM_HWADDR, 121 DCB_CMD_GCAP, 122 DCB_CMD_GNUMTCS, 123 DCB_CMD_SNUMTCS, 124 DCB_CMD_PFC_GSTATE, 125 DCB_CMD_PFC_SSTATE, 126 DCB_CMD_BCN_GCFG, 127 DCB_CMD_BCN_SCFG, 128 DCB_CMD_GAPP, 129 DCB_CMD_SAPP, 130 DCB_CMD_IEEE_SET, 131 DCB_CMD_IEEE_GET, 132 DCB_CMD_GDCBX, 133 DCB_CMD_SDCBX, 134 DCB_CMD_GFEATCFG, 135 DCB_CMD_SFEATCFG, 136 DCB_CMD_CEE_GET, 137 DCB_CMD_IEEE_DEL, 138 __DCB_CMD_ENUM_MAX, 139 DCB_CMD_MAX = __DCB_CMD_ENUM_MAX - 1, 140 }; 141 enum dcbnl_attrs { 142 DCB_ATTR_UNDEFINED, 143 DCB_ATTR_IFNAME, 144 DCB_ATTR_STATE, 145 DCB_ATTR_PFC_STATE, 146 DCB_ATTR_PFC_CFG, 147 DCB_ATTR_NUM_TC, 148 DCB_ATTR_PG_CFG, 149 DCB_ATTR_SET_ALL, 150 DCB_ATTR_PERM_HWADDR, 151 DCB_ATTR_CAP, 152 DCB_ATTR_NUMTCS, 153 DCB_ATTR_BCN, 154 DCB_ATTR_APP, 155 DCB_ATTR_IEEE, 156 DCB_ATTR_DCBX, 157 DCB_ATTR_FEATCFG, 158 DCB_ATTR_CEE, 159 __DCB_ATTR_ENUM_MAX, 160 DCB_ATTR_MAX = __DCB_ATTR_ENUM_MAX - 1, 161 }; 162 enum ieee_attrs { 163 DCB_ATTR_IEEE_UNSPEC, 164 DCB_ATTR_IEEE_ETS, 165 DCB_ATTR_IEEE_PFC, 166 DCB_ATTR_IEEE_APP_TABLE, 167 DCB_ATTR_IEEE_PEER_ETS, 168 DCB_ATTR_IEEE_PEER_PFC, 169 DCB_ATTR_IEEE_PEER_APP, 170 DCB_ATTR_IEEE_MAXRATE, 171 DCB_ATTR_IEEE_QCN, 172 DCB_ATTR_IEEE_QCN_STATS, 173 __DCB_ATTR_IEEE_MAX 174 }; 175 #define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1) 176 enum ieee_attrs_app { 177 DCB_ATTR_IEEE_APP_UNSPEC, 178 DCB_ATTR_IEEE_APP, 179 __DCB_ATTR_IEEE_APP_MAX 180 }; 181 #define DCB_ATTR_IEEE_APP_MAX (__DCB_ATTR_IEEE_APP_MAX - 1) 182 enum cee_attrs { 183 DCB_ATTR_CEE_UNSPEC, 184 DCB_ATTR_CEE_PEER_PG, 185 DCB_ATTR_CEE_PEER_PFC, 186 DCB_ATTR_CEE_PEER_APP_TABLE, 187 DCB_ATTR_CEE_TX_PG, 188 DCB_ATTR_CEE_RX_PG, 189 DCB_ATTR_CEE_PFC, 190 DCB_ATTR_CEE_APP_TABLE, 191 DCB_ATTR_CEE_FEAT, 192 __DCB_ATTR_CEE_MAX 193 }; 194 #define DCB_ATTR_CEE_MAX (__DCB_ATTR_CEE_MAX - 1) 195 enum peer_app_attr { 196 DCB_ATTR_CEE_PEER_APP_UNSPEC, 197 DCB_ATTR_CEE_PEER_APP_INFO, 198 DCB_ATTR_CEE_PEER_APP, 199 __DCB_ATTR_CEE_PEER_APP_MAX 200 }; 201 #define DCB_ATTR_CEE_PEER_APP_MAX (__DCB_ATTR_CEE_PEER_APP_MAX - 1) 202 enum cee_attrs_app { 203 DCB_ATTR_CEE_APP_UNSPEC, 204 DCB_ATTR_CEE_APP, 205 __DCB_ATTR_CEE_APP_MAX 206 }; 207 #define DCB_ATTR_CEE_APP_MAX (__DCB_ATTR_CEE_APP_MAX - 1) 208 enum dcbnl_pfc_up_attrs { 209 DCB_PFC_UP_ATTR_UNDEFINED, 210 DCB_PFC_UP_ATTR_0, 211 DCB_PFC_UP_ATTR_1, 212 DCB_PFC_UP_ATTR_2, 213 DCB_PFC_UP_ATTR_3, 214 DCB_PFC_UP_ATTR_4, 215 DCB_PFC_UP_ATTR_5, 216 DCB_PFC_UP_ATTR_6, 217 DCB_PFC_UP_ATTR_7, 218 DCB_PFC_UP_ATTR_ALL, 219 __DCB_PFC_UP_ATTR_ENUM_MAX, 220 DCB_PFC_UP_ATTR_MAX = __DCB_PFC_UP_ATTR_ENUM_MAX - 1, 221 }; 222 enum dcbnl_pg_attrs { 223 DCB_PG_ATTR_UNDEFINED, 224 DCB_PG_ATTR_TC_0, 225 DCB_PG_ATTR_TC_1, 226 DCB_PG_ATTR_TC_2, 227 DCB_PG_ATTR_TC_3, 228 DCB_PG_ATTR_TC_4, 229 DCB_PG_ATTR_TC_5, 230 DCB_PG_ATTR_TC_6, 231 DCB_PG_ATTR_TC_7, 232 DCB_PG_ATTR_TC_MAX, 233 DCB_PG_ATTR_TC_ALL, 234 DCB_PG_ATTR_BW_ID_0, 235 DCB_PG_ATTR_BW_ID_1, 236 DCB_PG_ATTR_BW_ID_2, 237 DCB_PG_ATTR_BW_ID_3, 238 DCB_PG_ATTR_BW_ID_4, 239 DCB_PG_ATTR_BW_ID_5, 240 DCB_PG_ATTR_BW_ID_6, 241 DCB_PG_ATTR_BW_ID_7, 242 DCB_PG_ATTR_BW_ID_MAX, 243 DCB_PG_ATTR_BW_ID_ALL, 244 __DCB_PG_ATTR_ENUM_MAX, 245 DCB_PG_ATTR_MAX = __DCB_PG_ATTR_ENUM_MAX - 1, 246 }; 247 enum dcbnl_tc_attrs { 248 DCB_TC_ATTR_PARAM_UNDEFINED, 249 DCB_TC_ATTR_PARAM_PGID, 250 DCB_TC_ATTR_PARAM_UP_MAPPING, 251 DCB_TC_ATTR_PARAM_STRICT_PRIO, 252 DCB_TC_ATTR_PARAM_BW_PCT, 253 DCB_TC_ATTR_PARAM_ALL, 254 __DCB_TC_ATTR_PARAM_ENUM_MAX, 255 DCB_TC_ATTR_PARAM_MAX = __DCB_TC_ATTR_PARAM_ENUM_MAX - 1, 256 }; 257 enum dcbnl_cap_attrs { 258 DCB_CAP_ATTR_UNDEFINED, 259 DCB_CAP_ATTR_ALL, 260 DCB_CAP_ATTR_PG, 261 DCB_CAP_ATTR_PFC, 262 DCB_CAP_ATTR_UP2TC, 263 DCB_CAP_ATTR_PG_TCS, 264 DCB_CAP_ATTR_PFC_TCS, 265 DCB_CAP_ATTR_GSP, 266 DCB_CAP_ATTR_BCN, 267 DCB_CAP_ATTR_DCBX, 268 __DCB_CAP_ATTR_ENUM_MAX, 269 DCB_CAP_ATTR_MAX = __DCB_CAP_ATTR_ENUM_MAX - 1, 270 }; 271 #define DCB_CAP_DCBX_HOST 0x01 272 #define DCB_CAP_DCBX_LLD_MANAGED 0x02 273 #define DCB_CAP_DCBX_VER_CEE 0x04 274 #define DCB_CAP_DCBX_VER_IEEE 0x08 275 #define DCB_CAP_DCBX_STATIC 0x10 276 enum dcbnl_numtcs_attrs { 277 DCB_NUMTCS_ATTR_UNDEFINED, 278 DCB_NUMTCS_ATTR_ALL, 279 DCB_NUMTCS_ATTR_PG, 280 DCB_NUMTCS_ATTR_PFC, 281 __DCB_NUMTCS_ATTR_ENUM_MAX, 282 DCB_NUMTCS_ATTR_MAX = __DCB_NUMTCS_ATTR_ENUM_MAX - 1, 283 }; 284 enum dcbnl_bcn_attrs { 285 DCB_BCN_ATTR_UNDEFINED = 0, 286 DCB_BCN_ATTR_RP_0, 287 DCB_BCN_ATTR_RP_1, 288 DCB_BCN_ATTR_RP_2, 289 DCB_BCN_ATTR_RP_3, 290 DCB_BCN_ATTR_RP_4, 291 DCB_BCN_ATTR_RP_5, 292 DCB_BCN_ATTR_RP_6, 293 DCB_BCN_ATTR_RP_7, 294 DCB_BCN_ATTR_RP_ALL, 295 DCB_BCN_ATTR_BCNA_0, 296 DCB_BCN_ATTR_BCNA_1, 297 DCB_BCN_ATTR_ALPHA, 298 DCB_BCN_ATTR_BETA, 299 DCB_BCN_ATTR_GD, 300 DCB_BCN_ATTR_GI, 301 DCB_BCN_ATTR_TMAX, 302 DCB_BCN_ATTR_TD, 303 DCB_BCN_ATTR_RMIN, 304 DCB_BCN_ATTR_W, 305 DCB_BCN_ATTR_RD, 306 DCB_BCN_ATTR_RU, 307 DCB_BCN_ATTR_WRTT, 308 DCB_BCN_ATTR_RI, 309 DCB_BCN_ATTR_C, 310 DCB_BCN_ATTR_ALL, 311 __DCB_BCN_ATTR_ENUM_MAX, 312 DCB_BCN_ATTR_MAX = __DCB_BCN_ATTR_ENUM_MAX - 1, 313 }; 314 enum dcb_general_attr_values { 315 DCB_ATTR_VALUE_UNDEFINED = 0xff 316 }; 317 #define DCB_APP_IDTYPE_ETHTYPE 0x00 318 #define DCB_APP_IDTYPE_PORTNUM 0x01 319 enum dcbnl_app_attrs { 320 DCB_APP_ATTR_UNDEFINED, 321 DCB_APP_ATTR_IDTYPE, 322 DCB_APP_ATTR_ID, 323 DCB_APP_ATTR_PRIORITY, 324 __DCB_APP_ATTR_ENUM_MAX, 325 DCB_APP_ATTR_MAX = __DCB_APP_ATTR_ENUM_MAX - 1, 326 }; 327 #define DCB_FEATCFG_ERROR 0x01 328 #define DCB_FEATCFG_ENABLE 0x02 329 #define DCB_FEATCFG_WILLING 0x04 330 #define DCB_FEATCFG_ADVERTISE 0x08 331 enum dcbnl_featcfg_attrs { 332 DCB_FEATCFG_ATTR_UNDEFINED, 333 DCB_FEATCFG_ATTR_ALL, 334 DCB_FEATCFG_ATTR_PG, 335 DCB_FEATCFG_ATTR_PFC, 336 DCB_FEATCFG_ATTR_APP, 337 __DCB_FEATCFG_ATTR_ENUM_MAX, 338 DCB_FEATCFG_ATTR_MAX = __DCB_FEATCFG_ATTR_ENUM_MAX - 1, 339 }; 340 #endif 341
