1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _DVBFRONTEND_H_ 20 #define _DVBFRONTEND_H_ 21 #include <linux/types.h> 22 enum fe_caps { 23 FE_IS_STUPID = 0, 24 FE_CAN_INVERSION_AUTO = 0x1, 25 FE_CAN_FEC_1_2 = 0x2, 26 FE_CAN_FEC_2_3 = 0x4, 27 FE_CAN_FEC_3_4 = 0x8, 28 FE_CAN_FEC_4_5 = 0x10, 29 FE_CAN_FEC_5_6 = 0x20, 30 FE_CAN_FEC_6_7 = 0x40, 31 FE_CAN_FEC_7_8 = 0x80, 32 FE_CAN_FEC_8_9 = 0x100, 33 FE_CAN_FEC_AUTO = 0x200, 34 FE_CAN_QPSK = 0x400, 35 FE_CAN_QAM_16 = 0x800, 36 FE_CAN_QAM_32 = 0x1000, 37 FE_CAN_QAM_64 = 0x2000, 38 FE_CAN_QAM_128 = 0x4000, 39 FE_CAN_QAM_256 = 0x8000, 40 FE_CAN_QAM_AUTO = 0x10000, 41 FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000, 42 FE_CAN_BANDWIDTH_AUTO = 0x40000, 43 FE_CAN_GUARD_INTERVAL_AUTO = 0x80000, 44 FE_CAN_HIERARCHY_AUTO = 0x100000, 45 FE_CAN_8VSB = 0x200000, 46 FE_CAN_16VSB = 0x400000, 47 FE_HAS_EXTENDED_CAPS = 0x800000, 48 FE_CAN_MULTISTREAM = 0x4000000, 49 FE_CAN_TURBO_FEC = 0x8000000, 50 FE_CAN_2G_MODULATION = 0x10000000, 51 FE_NEEDS_BENDING = 0x20000000, 52 FE_CAN_RECOVER = 0x40000000, 53 FE_CAN_MUTE_TS = 0x80000000 54 }; 55 enum fe_type { 56 FE_QPSK, 57 FE_QAM, 58 FE_OFDM, 59 FE_ATSC 60 }; 61 struct dvb_frontend_info { 62 char name[128]; 63 enum fe_type type; 64 __u32 frequency_min; 65 __u32 frequency_max; 66 __u32 frequency_stepsize; 67 __u32 frequency_tolerance; 68 __u32 symbol_rate_min; 69 __u32 symbol_rate_max; 70 __u32 symbol_rate_tolerance; 71 __u32 notifier_delay; 72 enum fe_caps caps; 73 }; 74 struct dvb_diseqc_master_cmd { 75 __u8 msg[6]; 76 __u8 msg_len; 77 }; 78 struct dvb_diseqc_slave_reply { 79 __u8 msg[4]; 80 __u8 msg_len; 81 int timeout; 82 }; 83 enum fe_sec_voltage { 84 SEC_VOLTAGE_13, 85 SEC_VOLTAGE_18, 86 SEC_VOLTAGE_OFF 87 }; 88 enum fe_sec_tone_mode { 89 SEC_TONE_ON, 90 SEC_TONE_OFF 91 }; 92 enum fe_sec_mini_cmd { 93 SEC_MINI_A, 94 SEC_MINI_B 95 }; 96 enum fe_status { 97 FE_NONE = 0x00, 98 FE_HAS_SIGNAL = 0x01, 99 FE_HAS_CARRIER = 0x02, 100 FE_HAS_VITERBI = 0x04, 101 FE_HAS_SYNC = 0x08, 102 FE_HAS_LOCK = 0x10, 103 FE_TIMEDOUT = 0x20, 104 FE_REINIT = 0x40, 105 }; 106 enum fe_spectral_inversion { 107 INVERSION_OFF, 108 INVERSION_ON, 109 INVERSION_AUTO 110 }; 111 enum fe_code_rate { 112 FEC_NONE = 0, 113 FEC_1_2, 114 FEC_2_3, 115 FEC_3_4, 116 FEC_4_5, 117 FEC_5_6, 118 FEC_6_7, 119 FEC_7_8, 120 FEC_8_9, 121 FEC_AUTO, 122 FEC_3_5, 123 FEC_9_10, 124 FEC_2_5, 125 }; 126 enum fe_modulation { 127 QPSK, 128 QAM_16, 129 QAM_32, 130 QAM_64, 131 QAM_128, 132 QAM_256, 133 QAM_AUTO, 134 VSB_8, 135 VSB_16, 136 PSK_8, 137 APSK_16, 138 APSK_32, 139 DQPSK, 140 QAM_4_NR, 141 }; 142 enum fe_transmit_mode { 143 TRANSMISSION_MODE_2K, 144 TRANSMISSION_MODE_8K, 145 TRANSMISSION_MODE_AUTO, 146 TRANSMISSION_MODE_4K, 147 TRANSMISSION_MODE_1K, 148 TRANSMISSION_MODE_16K, 149 TRANSMISSION_MODE_32K, 150 TRANSMISSION_MODE_C1, 151 TRANSMISSION_MODE_C3780, 152 }; 153 enum fe_guard_interval { 154 GUARD_INTERVAL_1_32, 155 GUARD_INTERVAL_1_16, 156 GUARD_INTERVAL_1_8, 157 GUARD_INTERVAL_1_4, 158 GUARD_INTERVAL_AUTO, 159 GUARD_INTERVAL_1_128, 160 GUARD_INTERVAL_19_128, 161 GUARD_INTERVAL_19_256, 162 GUARD_INTERVAL_PN420, 163 GUARD_INTERVAL_PN595, 164 GUARD_INTERVAL_PN945, 165 }; 166 enum fe_hierarchy { 167 HIERARCHY_NONE, 168 HIERARCHY_1, 169 HIERARCHY_2, 170 HIERARCHY_4, 171 HIERARCHY_AUTO 172 }; 173 enum fe_interleaving { 174 INTERLEAVING_NONE, 175 INTERLEAVING_AUTO, 176 INTERLEAVING_240, 177 INTERLEAVING_720, 178 }; 179 #define DTV_UNDEFINED 0 180 #define DTV_TUNE 1 181 #define DTV_CLEAR 2 182 #define DTV_FREQUENCY 3 183 #define DTV_MODULATION 4 184 #define DTV_BANDWIDTH_HZ 5 185 #define DTV_INVERSION 6 186 #define DTV_DISEQC_MASTER 7 187 #define DTV_SYMBOL_RATE 8 188 #define DTV_INNER_FEC 9 189 #define DTV_VOLTAGE 10 190 #define DTV_TONE 11 191 #define DTV_PILOT 12 192 #define DTV_ROLLOFF 13 193 #define DTV_DISEQC_SLAVE_REPLY 14 194 #define DTV_FE_CAPABILITY_COUNT 15 195 #define DTV_FE_CAPABILITY 16 196 #define DTV_DELIVERY_SYSTEM 17 197 #define DTV_ISDBT_PARTIAL_RECEPTION 18 198 #define DTV_ISDBT_SOUND_BROADCASTING 19 199 #define DTV_ISDBT_SB_SUBCHANNEL_ID 20 200 #define DTV_ISDBT_SB_SEGMENT_IDX 21 201 #define DTV_ISDBT_SB_SEGMENT_COUNT 22 202 #define DTV_ISDBT_LAYERA_FEC 23 203 #define DTV_ISDBT_LAYERA_MODULATION 24 204 #define DTV_ISDBT_LAYERA_SEGMENT_COUNT 25 205 #define DTV_ISDBT_LAYERA_TIME_INTERLEAVING 26 206 #define DTV_ISDBT_LAYERB_FEC 27 207 #define DTV_ISDBT_LAYERB_MODULATION 28 208 #define DTV_ISDBT_LAYERB_SEGMENT_COUNT 29 209 #define DTV_ISDBT_LAYERB_TIME_INTERLEAVING 30 210 #define DTV_ISDBT_LAYERC_FEC 31 211 #define DTV_ISDBT_LAYERC_MODULATION 32 212 #define DTV_ISDBT_LAYERC_SEGMENT_COUNT 33 213 #define DTV_ISDBT_LAYERC_TIME_INTERLEAVING 34 214 #define DTV_API_VERSION 35 215 #define DTV_CODE_RATE_HP 36 216 #define DTV_CODE_RATE_LP 37 217 #define DTV_GUARD_INTERVAL 38 218 #define DTV_TRANSMISSION_MODE 39 219 #define DTV_HIERARCHY 40 220 #define DTV_ISDBT_LAYER_ENABLED 41 221 #define DTV_STREAM_ID 42 222 #define DTV_ISDBS_TS_ID_LEGACY DTV_STREAM_ID 223 #define DTV_DVBT2_PLP_ID_LEGACY 43 224 #define DTV_ENUM_DELSYS 44 225 #define DTV_ATSCMH_FIC_VER 45 226 #define DTV_ATSCMH_PARADE_ID 46 227 #define DTV_ATSCMH_NOG 47 228 #define DTV_ATSCMH_TNOG 48 229 #define DTV_ATSCMH_SGN 49 230 #define DTV_ATSCMH_PRC 50 231 #define DTV_ATSCMH_RS_FRAME_MODE 51 232 #define DTV_ATSCMH_RS_FRAME_ENSEMBLE 52 233 #define DTV_ATSCMH_RS_CODE_MODE_PRI 53 234 #define DTV_ATSCMH_RS_CODE_MODE_SEC 54 235 #define DTV_ATSCMH_SCCC_BLOCK_MODE 55 236 #define DTV_ATSCMH_SCCC_CODE_MODE_A 56 237 #define DTV_ATSCMH_SCCC_CODE_MODE_B 57 238 #define DTV_ATSCMH_SCCC_CODE_MODE_C 58 239 #define DTV_ATSCMH_SCCC_CODE_MODE_D 59 240 #define DTV_INTERLEAVING 60 241 #define DTV_LNA 61 242 #define DTV_STAT_SIGNAL_STRENGTH 62 243 #define DTV_STAT_CNR 63 244 #define DTV_STAT_PRE_ERROR_BIT_COUNT 64 245 #define DTV_STAT_PRE_TOTAL_BIT_COUNT 65 246 #define DTV_STAT_POST_ERROR_BIT_COUNT 66 247 #define DTV_STAT_POST_TOTAL_BIT_COUNT 67 248 #define DTV_STAT_ERROR_BLOCK_COUNT 68 249 #define DTV_STAT_TOTAL_BLOCK_COUNT 69 250 #define DTV_MAX_COMMAND DTV_STAT_TOTAL_BLOCK_COUNT 251 enum fe_pilot { 252 PILOT_ON, 253 PILOT_OFF, 254 PILOT_AUTO, 255 }; 256 enum fe_rolloff { 257 ROLLOFF_35, 258 ROLLOFF_20, 259 ROLLOFF_25, 260 ROLLOFF_AUTO, 261 }; 262 enum fe_delivery_system { 263 SYS_UNDEFINED, 264 SYS_DVBC_ANNEX_A, 265 SYS_DVBC_ANNEX_B, 266 SYS_DVBT, 267 SYS_DSS, 268 SYS_DVBS, 269 SYS_DVBS2, 270 SYS_DVBH, 271 SYS_ISDBT, 272 SYS_ISDBS, 273 SYS_ISDBC, 274 SYS_ATSC, 275 SYS_ATSCMH, 276 SYS_DTMB, 277 SYS_CMMB, 278 SYS_DAB, 279 SYS_DVBT2, 280 SYS_TURBO, 281 SYS_DVBC_ANNEX_C, 282 }; 283 #define SYS_DVBC_ANNEX_AC SYS_DVBC_ANNEX_A 284 #define SYS_DMBTH SYS_DTMB 285 enum atscmh_sccc_block_mode { 286 ATSCMH_SCCC_BLK_SEP = 0, 287 ATSCMH_SCCC_BLK_COMB = 1, 288 ATSCMH_SCCC_BLK_RES = 2, 289 }; 290 enum atscmh_sccc_code_mode { 291 ATSCMH_SCCC_CODE_HLF = 0, 292 ATSCMH_SCCC_CODE_QTR = 1, 293 ATSCMH_SCCC_CODE_RES = 2, 294 }; 295 enum atscmh_rs_frame_ensemble { 296 ATSCMH_RSFRAME_ENS_PRI = 0, 297 ATSCMH_RSFRAME_ENS_SEC = 1, 298 }; 299 enum atscmh_rs_frame_mode { 300 ATSCMH_RSFRAME_PRI_ONLY = 0, 301 ATSCMH_RSFRAME_PRI_SEC = 1, 302 ATSCMH_RSFRAME_RES = 2, 303 }; 304 enum atscmh_rs_code_mode { 305 ATSCMH_RSCODE_211_187 = 0, 306 ATSCMH_RSCODE_223_187 = 1, 307 ATSCMH_RSCODE_235_187 = 2, 308 ATSCMH_RSCODE_RES = 3, 309 }; 310 #define NO_STREAM_ID_FILTER (~0U) 311 #define LNA_AUTO (~0U) 312 enum fecap_scale_params { 313 FE_SCALE_NOT_AVAILABLE = 0, 314 FE_SCALE_DECIBEL, 315 FE_SCALE_RELATIVE, 316 FE_SCALE_COUNTER 317 }; 318 struct dtv_stats { 319 __u8 scale; 320 union { 321 __u64 uvalue; 322 __s64 svalue; 323 }; 324 } __attribute__((packed)); 325 #define MAX_DTV_STATS 4 326 struct dtv_fe_stats { 327 __u8 len; 328 struct dtv_stats stat[MAX_DTV_STATS]; 329 } __attribute__((packed)); 330 struct dtv_property { 331 __u32 cmd; 332 __u32 reserved[3]; 333 union { 334 __u32 data; 335 struct dtv_fe_stats st; 336 struct { 337 __u8 data[32]; 338 __u32 len; 339 __u32 reserved1[3]; 340 void * reserved2; 341 } buffer; 342 } u; 343 int result; 344 } __attribute__((packed)); 345 #define DTV_IOCTL_MAX_MSGS 64 346 struct dtv_properties { 347 __u32 num; 348 struct dtv_property * props; 349 }; 350 #define FE_TUNE_MODE_ONESHOT 0x01 351 #define FE_GET_INFO _IOR('o', 61, struct dvb_frontend_info) 352 #define FE_DISEQC_RESET_OVERLOAD _IO('o', 62) 353 #define FE_DISEQC_SEND_MASTER_CMD _IOW('o', 63, struct dvb_diseqc_master_cmd) 354 #define FE_DISEQC_RECV_SLAVE_REPLY _IOR('o', 64, struct dvb_diseqc_slave_reply) 355 #define FE_DISEQC_SEND_BURST _IO('o', 65) 356 #define FE_SET_TONE _IO('o', 66) 357 #define FE_SET_VOLTAGE _IO('o', 67) 358 #define FE_ENABLE_HIGH_LNB_VOLTAGE _IO('o', 68) 359 #define FE_READ_STATUS _IOR('o', 69, fe_status_t) 360 #define FE_READ_BER _IOR('o', 70, __u32) 361 #define FE_READ_SIGNAL_STRENGTH _IOR('o', 71, __u16) 362 #define FE_READ_SNR _IOR('o', 72, __u16) 363 #define FE_READ_UNCORRECTED_BLOCKS _IOR('o', 73, __u32) 364 #define FE_SET_FRONTEND_TUNE_MODE _IO('o', 81) 365 #define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event) 366 #define FE_DISHNETWORK_SEND_LEGACY_CMD _IO('o', 80) 367 #define FE_SET_PROPERTY _IOW('o', 82, struct dtv_properties) 368 #define FE_GET_PROPERTY _IOR('o', 83, struct dtv_properties) 369 enum fe_bandwidth { 370 BANDWIDTH_8_MHZ, 371 BANDWIDTH_7_MHZ, 372 BANDWIDTH_6_MHZ, 373 BANDWIDTH_AUTO, 374 BANDWIDTH_5_MHZ, 375 BANDWIDTH_10_MHZ, 376 BANDWIDTH_1_712_MHZ, 377 }; 378 typedef enum fe_sec_voltage fe_sec_voltage_t; 379 typedef enum fe_caps fe_caps_t; 380 typedef enum fe_type fe_type_t; 381 typedef enum fe_sec_tone_mode fe_sec_tone_mode_t; 382 typedef enum fe_sec_mini_cmd fe_sec_mini_cmd_t; 383 typedef enum fe_status fe_status_t; 384 typedef enum fe_spectral_inversion fe_spectral_inversion_t; 385 typedef enum fe_code_rate fe_code_rate_t; 386 typedef enum fe_modulation fe_modulation_t; 387 typedef enum fe_transmit_mode fe_transmit_mode_t; 388 typedef enum fe_bandwidth fe_bandwidth_t; 389 typedef enum fe_guard_interval fe_guard_interval_t; 390 typedef enum fe_hierarchy fe_hierarchy_t; 391 typedef enum fe_pilot fe_pilot_t; 392 typedef enum fe_rolloff fe_rolloff_t; 393 typedef enum fe_delivery_system fe_delivery_system_t; 394 struct dvb_qpsk_parameters { 395 __u32 symbol_rate; 396 fe_code_rate_t fec_inner; 397 }; 398 struct dvb_qam_parameters { 399 __u32 symbol_rate; 400 fe_code_rate_t fec_inner; 401 fe_modulation_t modulation; 402 }; 403 struct dvb_vsb_parameters { 404 fe_modulation_t modulation; 405 }; 406 struct dvb_ofdm_parameters { 407 fe_bandwidth_t bandwidth; 408 fe_code_rate_t code_rate_HP; 409 fe_code_rate_t code_rate_LP; 410 fe_modulation_t constellation; 411 fe_transmit_mode_t transmission_mode; 412 fe_guard_interval_t guard_interval; 413 fe_hierarchy_t hierarchy_information; 414 }; 415 struct dvb_frontend_parameters { 416 __u32 frequency; 417 fe_spectral_inversion_t inversion; 418 union { 419 struct dvb_qpsk_parameters qpsk; 420 struct dvb_qam_parameters qam; 421 struct dvb_ofdm_parameters ofdm; 422 struct dvb_vsb_parameters vsb; 423 } u; 424 }; 425 struct dvb_frontend_event { 426 fe_status_t status; 427 struct dvb_frontend_parameters parameters; 428 }; 429 #define FE_SET_FRONTEND _IOW('o', 76, struct dvb_frontend_parameters) 430 #define FE_GET_FRONTEND _IOR('o', 77, struct dvb_frontend_parameters) 431 #endif 432
