1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_ETHTOOL_H 20 #define _UAPI_LINUX_ETHTOOL_H 21 #include <linux/kernel.h> 22 #include <linux/types.h> 23 #include <linux/if_ether.h> 24 #include <limits.h> 25 struct ethtool_cmd { 26 __u32 cmd; 27 __u32 supported; 28 __u32 advertising; 29 __u16 speed; 30 __u8 duplex; 31 __u8 port; 32 __u8 phy_address; 33 __u8 transceiver; 34 __u8 autoneg; 35 __u8 mdio_support; 36 __u32 maxtxpkt; 37 __u32 maxrxpkt; 38 __u16 speed_hi; 39 __u8 eth_tp_mdix; 40 __u8 eth_tp_mdix_ctrl; 41 __u32 lp_advertising; 42 __u32 reserved[2]; 43 }; 44 #define ETH_MDIO_SUPPORTS_C22 1 45 #define ETH_MDIO_SUPPORTS_C45 2 46 #define ETHTOOL_FWVERS_LEN 32 47 #define ETHTOOL_BUSINFO_LEN 32 48 #define ETHTOOL_EROMVERS_LEN 32 49 struct ethtool_drvinfo { 50 __u32 cmd; 51 char driver[32]; 52 char version[32]; 53 char fw_version[ETHTOOL_FWVERS_LEN]; 54 char bus_info[ETHTOOL_BUSINFO_LEN]; 55 char erom_version[ETHTOOL_EROMVERS_LEN]; 56 char reserved2[12]; 57 __u32 n_priv_flags; 58 __u32 n_stats; 59 __u32 testinfo_len; 60 __u32 eedump_len; 61 __u32 regdump_len; 62 }; 63 #define SOPASS_MAX 6 64 struct ethtool_wolinfo { 65 __u32 cmd; 66 __u32 supported; 67 __u32 wolopts; 68 __u8 sopass[SOPASS_MAX]; 69 }; 70 struct ethtool_value { 71 __u32 cmd; 72 __u32 data; 73 }; 74 enum tunable_id { 75 ETHTOOL_ID_UNSPEC, 76 ETHTOOL_RX_COPYBREAK, 77 ETHTOOL_TX_COPYBREAK, 78 __ETHTOOL_TUNABLE_COUNT, 79 }; 80 enum tunable_type_id { 81 ETHTOOL_TUNABLE_UNSPEC, 82 ETHTOOL_TUNABLE_U8, 83 ETHTOOL_TUNABLE_U16, 84 ETHTOOL_TUNABLE_U32, 85 ETHTOOL_TUNABLE_U64, 86 ETHTOOL_TUNABLE_STRING, 87 ETHTOOL_TUNABLE_S8, 88 ETHTOOL_TUNABLE_S16, 89 ETHTOOL_TUNABLE_S32, 90 ETHTOOL_TUNABLE_S64, 91 }; 92 struct ethtool_tunable { 93 __u32 cmd; 94 __u32 id; 95 __u32 type_id; 96 __u32 len; 97 void * data[0]; 98 }; 99 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff 100 #define DOWNSHIFT_DEV_DISABLE 0 101 enum phy_tunable_id { 102 ETHTOOL_PHY_ID_UNSPEC, 103 ETHTOOL_PHY_DOWNSHIFT, 104 __ETHTOOL_PHY_TUNABLE_COUNT, 105 }; 106 struct ethtool_regs { 107 __u32 cmd; 108 __u32 version; 109 __u32 len; 110 __u8 data[0]; 111 }; 112 struct ethtool_eeprom { 113 __u32 cmd; 114 __u32 magic; 115 __u32 offset; 116 __u32 len; 117 __u8 data[0]; 118 }; 119 struct ethtool_eee { 120 __u32 cmd; 121 __u32 supported; 122 __u32 advertised; 123 __u32 lp_advertised; 124 __u32 eee_active; 125 __u32 eee_enabled; 126 __u32 tx_lpi_enabled; 127 __u32 tx_lpi_timer; 128 __u32 reserved[2]; 129 }; 130 struct ethtool_modinfo { 131 __u32 cmd; 132 __u32 type; 133 __u32 eeprom_len; 134 __u32 reserved[8]; 135 }; 136 struct ethtool_coalesce { 137 __u32 cmd; 138 __u32 rx_coalesce_usecs; 139 __u32 rx_max_coalesced_frames; 140 __u32 rx_coalesce_usecs_irq; 141 __u32 rx_max_coalesced_frames_irq; 142 __u32 tx_coalesce_usecs; 143 __u32 tx_max_coalesced_frames; 144 __u32 tx_coalesce_usecs_irq; 145 __u32 tx_max_coalesced_frames_irq; 146 __u32 stats_block_coalesce_usecs; 147 __u32 use_adaptive_rx_coalesce; 148 __u32 use_adaptive_tx_coalesce; 149 __u32 pkt_rate_low; 150 __u32 rx_coalesce_usecs_low; 151 __u32 rx_max_coalesced_frames_low; 152 __u32 tx_coalesce_usecs_low; 153 __u32 tx_max_coalesced_frames_low; 154 __u32 pkt_rate_high; 155 __u32 rx_coalesce_usecs_high; 156 __u32 rx_max_coalesced_frames_high; 157 __u32 tx_coalesce_usecs_high; 158 __u32 tx_max_coalesced_frames_high; 159 __u32 rate_sample_interval; 160 }; 161 struct ethtool_ringparam { 162 __u32 cmd; 163 __u32 rx_max_pending; 164 __u32 rx_mini_max_pending; 165 __u32 rx_jumbo_max_pending; 166 __u32 tx_max_pending; 167 __u32 rx_pending; 168 __u32 rx_mini_pending; 169 __u32 rx_jumbo_pending; 170 __u32 tx_pending; 171 }; 172 struct ethtool_channels { 173 __u32 cmd; 174 __u32 max_rx; 175 __u32 max_tx; 176 __u32 max_other; 177 __u32 max_combined; 178 __u32 rx_count; 179 __u32 tx_count; 180 __u32 other_count; 181 __u32 combined_count; 182 }; 183 struct ethtool_pauseparam { 184 __u32 cmd; 185 __u32 autoneg; 186 __u32 rx_pause; 187 __u32 tx_pause; 188 }; 189 #define ETH_GSTRING_LEN 32 190 enum ethtool_stringset { 191 ETH_SS_TEST = 0, 192 ETH_SS_STATS, 193 ETH_SS_PRIV_FLAGS, 194 ETH_SS_NTUPLE_FILTERS, 195 ETH_SS_FEATURES, 196 ETH_SS_RSS_HASH_FUNCS, 197 ETH_SS_TUNABLES, 198 ETH_SS_PHY_STATS, 199 ETH_SS_PHY_TUNABLES, 200 }; 201 struct ethtool_gstrings { 202 __u32 cmd; 203 __u32 string_set; 204 __u32 len; 205 __u8 data[0]; 206 }; 207 struct ethtool_sset_info { 208 __u32 cmd; 209 __u32 reserved; 210 __u64 sset_mask; 211 __u32 data[0]; 212 }; 213 enum ethtool_test_flags { 214 ETH_TEST_FL_OFFLINE = (1 << 0), 215 ETH_TEST_FL_FAILED = (1 << 1), 216 ETH_TEST_FL_EXTERNAL_LB = (1 << 2), 217 ETH_TEST_FL_EXTERNAL_LB_DONE = (1 << 3), 218 }; 219 struct ethtool_test { 220 __u32 cmd; 221 __u32 flags; 222 __u32 reserved; 223 __u32 len; 224 __u64 data[0]; 225 }; 226 struct ethtool_stats { 227 __u32 cmd; 228 __u32 n_stats; 229 __u64 data[0]; 230 }; 231 struct ethtool_perm_addr { 232 __u32 cmd; 233 __u32 size; 234 __u8 data[0]; 235 }; 236 enum ethtool_flags { 237 ETH_FLAG_TXVLAN = (1 << 7), 238 ETH_FLAG_RXVLAN = (1 << 8), 239 ETH_FLAG_LRO = (1 << 15), 240 ETH_FLAG_NTUPLE = (1 << 27), 241 ETH_FLAG_RXHASH = (1 << 28), 242 }; 243 struct ethtool_tcpip4_spec { 244 __be32 ip4src; 245 __be32 ip4dst; 246 __be16 psrc; 247 __be16 pdst; 248 __u8 tos; 249 }; 250 struct ethtool_ah_espip4_spec { 251 __be32 ip4src; 252 __be32 ip4dst; 253 __be32 spi; 254 __u8 tos; 255 }; 256 #define ETH_RX_NFC_IP4 1 257 struct ethtool_usrip4_spec { 258 __be32 ip4src; 259 __be32 ip4dst; 260 __be32 l4_4_bytes; 261 __u8 tos; 262 __u8 ip_ver; 263 __u8 proto; 264 }; 265 struct ethtool_tcpip6_spec { 266 __be32 ip6src[4]; 267 __be32 ip6dst[4]; 268 __be16 psrc; 269 __be16 pdst; 270 __u8 tclass; 271 }; 272 struct ethtool_ah_espip6_spec { 273 __be32 ip6src[4]; 274 __be32 ip6dst[4]; 275 __be32 spi; 276 __u8 tclass; 277 }; 278 struct ethtool_usrip6_spec { 279 __be32 ip6src[4]; 280 __be32 ip6dst[4]; 281 __be32 l4_4_bytes; 282 __u8 tclass; 283 __u8 l4_proto; 284 }; 285 union ethtool_flow_union { 286 struct ethtool_tcpip4_spec tcp_ip4_spec; 287 struct ethtool_tcpip4_spec udp_ip4_spec; 288 struct ethtool_tcpip4_spec sctp_ip4_spec; 289 struct ethtool_ah_espip4_spec ah_ip4_spec; 290 struct ethtool_ah_espip4_spec esp_ip4_spec; 291 struct ethtool_usrip4_spec usr_ip4_spec; 292 struct ethtool_tcpip6_spec tcp_ip6_spec; 293 struct ethtool_tcpip6_spec udp_ip6_spec; 294 struct ethtool_tcpip6_spec sctp_ip6_spec; 295 struct ethtool_ah_espip6_spec ah_ip6_spec; 296 struct ethtool_ah_espip6_spec esp_ip6_spec; 297 struct ethtool_usrip6_spec usr_ip6_spec; 298 struct ethhdr ether_spec; 299 __u8 hdata[52]; 300 }; 301 struct ethtool_flow_ext { 302 __u8 padding[2]; 303 unsigned char h_dest[ETH_ALEN]; 304 __be16 vlan_etype; 305 __be16 vlan_tci; 306 __be32 data[2]; 307 }; 308 struct ethtool_rx_flow_spec { 309 __u32 flow_type; 310 union ethtool_flow_union h_u; 311 struct ethtool_flow_ext h_ext; 312 union ethtool_flow_union m_u; 313 struct ethtool_flow_ext m_ext; 314 __u64 ring_cookie; 315 __u32 location; 316 }; 317 #define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFLL 318 #define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000LL 319 #define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32 320 struct ethtool_rxfh_indir { 321 __u32 cmd; 322 __u32 size; 323 __u32 ring_index[0]; 324 }; 325 struct ethtool_rxfh { 326 __u32 cmd; 327 __u32 rss_context; 328 __u32 indir_size; 329 __u32 key_size; 330 __u8 hfunc; 331 __u8 rsvd8[3]; 332 __u32 rsvd32; 333 __u32 rss_config[0]; 334 }; 335 #define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff 336 struct ethtool_rx_ntuple_flow_spec { 337 __u32 flow_type; 338 union { 339 struct ethtool_tcpip4_spec tcp_ip4_spec; 340 struct ethtool_tcpip4_spec udp_ip4_spec; 341 struct ethtool_tcpip4_spec sctp_ip4_spec; 342 struct ethtool_ah_espip4_spec ah_ip4_spec; 343 struct ethtool_ah_espip4_spec esp_ip4_spec; 344 struct ethtool_usrip4_spec usr_ip4_spec; 345 struct ethhdr ether_spec; 346 __u8 hdata[72]; 347 } h_u, m_u; 348 __u16 vlan_tag; 349 __u16 vlan_tag_mask; 350 __u64 data; 351 __u64 data_mask; 352 __s32 action; 353 #define ETHTOOL_RXNTUPLE_ACTION_DROP (- 1) 354 #define ETHTOOL_RXNTUPLE_ACTION_CLEAR (- 2) 355 }; 356 struct ethtool_rx_ntuple { 357 __u32 cmd; 358 struct ethtool_rx_ntuple_flow_spec fs; 359 }; 360 #define ETHTOOL_FLASH_MAX_FILENAME 128 361 enum ethtool_flash_op_type { 362 ETHTOOL_FLASH_ALL_REGIONS = 0, 363 }; 364 struct ethtool_flash { 365 __u32 cmd; 366 __u32 region; 367 char data[ETHTOOL_FLASH_MAX_FILENAME]; 368 }; 369 struct ethtool_dump { 370 __u32 cmd; 371 __u32 version; 372 __u32 flag; 373 __u32 len; 374 __u8 data[0]; 375 }; 376 #define ETH_FW_DUMP_DISABLE 0 377 struct ethtool_get_features_block { 378 __u32 available; 379 __u32 requested; 380 __u32 active; 381 __u32 never_changed; 382 }; 383 struct ethtool_gfeatures { 384 __u32 cmd; 385 __u32 size; 386 struct ethtool_get_features_block features[0]; 387 }; 388 struct ethtool_set_features_block { 389 __u32 valid; 390 __u32 requested; 391 }; 392 struct ethtool_sfeatures { 393 __u32 cmd; 394 __u32 size; 395 struct ethtool_set_features_block features[0]; 396 }; 397 struct ethtool_ts_info { 398 __u32 cmd; 399 __u32 so_timestamping; 400 __s32 phc_index; 401 __u32 tx_types; 402 __u32 tx_reserved[3]; 403 __u32 rx_filters; 404 __u32 rx_reserved[3]; 405 }; 406 enum ethtool_sfeatures_retval_bits { 407 ETHTOOL_F_UNSUPPORTED__BIT, 408 ETHTOOL_F_WISH__BIT, 409 ETHTOOL_F_COMPAT__BIT, 410 }; 411 #define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT) 412 #define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT) 413 #define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT) 414 #define MAX_NUM_QUEUE 4096 415 struct ethtool_per_queue_op { 416 __u32 cmd; 417 __u32 sub_command; 418 __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)]; 419 char data[]; 420 }; 421 struct ethtool_fecparam { 422 __u32 cmd; 423 __u32 active_fec; 424 __u32 fec; 425 __u32 reserved; 426 }; 427 enum ethtool_fec_config_bits { 428 ETHTOOL_FEC_NONE_BIT, 429 ETHTOOL_FEC_AUTO_BIT, 430 ETHTOOL_FEC_OFF_BIT, 431 ETHTOOL_FEC_RS_BIT, 432 ETHTOOL_FEC_BASER_BIT, 433 }; 434 #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT) 435 #define ETHTOOL_FEC_AUTO (1 << ETHTOOL_FEC_AUTO_BIT) 436 #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT) 437 #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) 438 #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) 439 #define ETHTOOL_GSET 0x00000001 440 #define ETHTOOL_SSET 0x00000002 441 #define ETHTOOL_GDRVINFO 0x00000003 442 #define ETHTOOL_GREGS 0x00000004 443 #define ETHTOOL_GWOL 0x00000005 444 #define ETHTOOL_SWOL 0x00000006 445 #define ETHTOOL_GMSGLVL 0x00000007 446 #define ETHTOOL_SMSGLVL 0x00000008 447 #define ETHTOOL_NWAY_RST 0x00000009 448 #define ETHTOOL_GLINK 0x0000000a 449 #define ETHTOOL_GEEPROM 0x0000000b 450 #define ETHTOOL_SEEPROM 0x0000000c 451 #define ETHTOOL_GCOALESCE 0x0000000e 452 #define ETHTOOL_SCOALESCE 0x0000000f 453 #define ETHTOOL_GRINGPARAM 0x00000010 454 #define ETHTOOL_SRINGPARAM 0x00000011 455 #define ETHTOOL_GPAUSEPARAM 0x00000012 456 #define ETHTOOL_SPAUSEPARAM 0x00000013 457 #define ETHTOOL_GRXCSUM 0x00000014 458 #define ETHTOOL_SRXCSUM 0x00000015 459 #define ETHTOOL_GTXCSUM 0x00000016 460 #define ETHTOOL_STXCSUM 0x00000017 461 #define ETHTOOL_GSG 0x00000018 462 #define ETHTOOL_SSG 0x00000019 463 #define ETHTOOL_TEST 0x0000001a 464 #define ETHTOOL_GSTRINGS 0x0000001b 465 #define ETHTOOL_PHYS_ID 0x0000001c 466 #define ETHTOOL_GSTATS 0x0000001d 467 #define ETHTOOL_GTSO 0x0000001e 468 #define ETHTOOL_STSO 0x0000001f 469 #define ETHTOOL_GPERMADDR 0x00000020 470 #define ETHTOOL_GUFO 0x00000021 471 #define ETHTOOL_SUFO 0x00000022 472 #define ETHTOOL_GGSO 0x00000023 473 #define ETHTOOL_SGSO 0x00000024 474 #define ETHTOOL_GFLAGS 0x00000025 475 #define ETHTOOL_SFLAGS 0x00000026 476 #define ETHTOOL_GPFLAGS 0x00000027 477 #define ETHTOOL_SPFLAGS 0x00000028 478 #define ETHTOOL_GRXFH 0x00000029 479 #define ETHTOOL_SRXFH 0x0000002a 480 #define ETHTOOL_GGRO 0x0000002b 481 #define ETHTOOL_SGRO 0x0000002c 482 #define ETHTOOL_GRXRINGS 0x0000002d 483 #define ETHTOOL_GRXCLSRLCNT 0x0000002e 484 #define ETHTOOL_GRXCLSRULE 0x0000002f 485 #define ETHTOOL_GRXCLSRLALL 0x00000030 486 #define ETHTOOL_SRXCLSRLDEL 0x00000031 487 #define ETHTOOL_SRXCLSRLINS 0x00000032 488 #define ETHTOOL_FLASHDEV 0x00000033 489 #define ETHTOOL_RESET 0x00000034 490 #define ETHTOOL_SRXNTUPLE 0x00000035 491 #define ETHTOOL_GRXNTUPLE 0x00000036 492 #define ETHTOOL_GSSET_INFO 0x00000037 493 #define ETHTOOL_GRXFHINDIR 0x00000038 494 #define ETHTOOL_SRXFHINDIR 0x00000039 495 #define ETHTOOL_GFEATURES 0x0000003a 496 #define ETHTOOL_SFEATURES 0x0000003b 497 #define ETHTOOL_GCHANNELS 0x0000003c 498 #define ETHTOOL_SCHANNELS 0x0000003d 499 #define ETHTOOL_SET_DUMP 0x0000003e 500 #define ETHTOOL_GET_DUMP_FLAG 0x0000003f 501 #define ETHTOOL_GET_DUMP_DATA 0x00000040 502 #define ETHTOOL_GET_TS_INFO 0x00000041 503 #define ETHTOOL_GMODULEINFO 0x00000042 504 #define ETHTOOL_GMODULEEEPROM 0x00000043 505 #define ETHTOOL_GEEE 0x00000044 506 #define ETHTOOL_SEEE 0x00000045 507 #define ETHTOOL_GRSSH 0x00000046 508 #define ETHTOOL_SRSSH 0x00000047 509 #define ETHTOOL_GTUNABLE 0x00000048 510 #define ETHTOOL_STUNABLE 0x00000049 511 #define ETHTOOL_GPHYSTATS 0x0000004a 512 #define ETHTOOL_PERQUEUE 0x0000004b 513 #define ETHTOOL_GLINKSETTINGS 0x0000004c 514 #define ETHTOOL_SLINKSETTINGS 0x0000004d 515 #define ETHTOOL_PHY_GTUNABLE 0x0000004e 516 #define ETHTOOL_PHY_STUNABLE 0x0000004f 517 #define ETHTOOL_GFECPARAM 0x00000050 518 #define ETHTOOL_SFECPARAM 0x00000051 519 #define SPARC_ETH_GSET ETHTOOL_GSET 520 #define SPARC_ETH_SSET ETHTOOL_SSET 521 enum ethtool_link_mode_bit_indices { 522 ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0, 523 ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1, 524 ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2, 525 ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3, 526 ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4, 527 ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5, 528 ETHTOOL_LINK_MODE_Autoneg_BIT = 6, 529 ETHTOOL_LINK_MODE_TP_BIT = 7, 530 ETHTOOL_LINK_MODE_AUI_BIT = 8, 531 ETHTOOL_LINK_MODE_MII_BIT = 9, 532 ETHTOOL_LINK_MODE_FIBRE_BIT = 10, 533 ETHTOOL_LINK_MODE_BNC_BIT = 11, 534 ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12, 535 ETHTOOL_LINK_MODE_Pause_BIT = 13, 536 ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14, 537 ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15, 538 ETHTOOL_LINK_MODE_Backplane_BIT = 16, 539 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17, 540 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18, 541 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19, 542 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20, 543 ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21, 544 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22, 545 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23, 546 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24, 547 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25, 548 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26, 549 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27, 550 ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28, 551 ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29, 552 ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30, 553 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31, 554 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32, 555 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33, 556 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34, 557 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35, 558 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36, 559 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37, 560 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38, 561 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39, 562 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40, 563 ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41, 564 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42, 565 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43, 566 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44, 567 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45, 568 ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46, 569 ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47, 570 ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48, 571 ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49, 572 ETHTOOL_LINK_MODE_FEC_RS_BIT = 50, 573 ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51, 574 __ETHTOOL_LINK_MODE_LAST = ETHTOOL_LINK_MODE_FEC_BASER_BIT, 575 }; 576 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT)) 577 #define SUPPORTED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 578 #define SUPPORTED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 579 #define SUPPORTED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 580 #define SUPPORTED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 581 #define SUPPORTED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 582 #define SUPPORTED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 583 #define SUPPORTED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 584 #define SUPPORTED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 585 #define SUPPORTED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 586 #define SUPPORTED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 587 #define SUPPORTED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 588 #define SUPPORTED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 589 #define SUPPORTED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 590 #define SUPPORTED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 591 #define SUPPORTED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 592 #define SUPPORTED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 593 #define SUPPORTED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 594 #define SUPPORTED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 595 #define SUPPORTED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 596 #define SUPPORTED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 597 #define SUPPORTED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 598 #define SUPPORTED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 599 #define SUPPORTED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 600 #define SUPPORTED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 601 #define SUPPORTED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 602 #define SUPPORTED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 603 #define SUPPORTED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 604 #define SUPPORTED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 605 #define SUPPORTED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 606 #define SUPPORTED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 607 #define SUPPORTED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 608 #define ADVERTISED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 609 #define ADVERTISED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 610 #define ADVERTISED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 611 #define ADVERTISED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 612 #define ADVERTISED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 613 #define ADVERTISED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 614 #define ADVERTISED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 615 #define ADVERTISED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 616 #define ADVERTISED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 617 #define ADVERTISED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 618 #define ADVERTISED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 619 #define ADVERTISED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 620 #define ADVERTISED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 621 #define ADVERTISED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 622 #define ADVERTISED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 623 #define ADVERTISED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 624 #define ADVERTISED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 625 #define ADVERTISED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 626 #define ADVERTISED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 627 #define ADVERTISED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 628 #define ADVERTISED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 629 #define ADVERTISED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 630 #define ADVERTISED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 631 #define ADVERTISED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 632 #define ADVERTISED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 633 #define ADVERTISED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 634 #define ADVERTISED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 635 #define ADVERTISED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 636 #define ADVERTISED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 637 #define ADVERTISED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 638 #define ADVERTISED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 639 #define SPEED_10 10 640 #define SPEED_100 100 641 #define SPEED_1000 1000 642 #define SPEED_2500 2500 643 #define SPEED_5000 5000 644 #define SPEED_10000 10000 645 #define SPEED_14000 14000 646 #define SPEED_20000 20000 647 #define SPEED_25000 25000 648 #define SPEED_40000 40000 649 #define SPEED_50000 50000 650 #define SPEED_56000 56000 651 #define SPEED_100000 100000 652 #define SPEED_UNKNOWN - 1 653 #define DUPLEX_HALF 0x00 654 #define DUPLEX_FULL 0x01 655 #define DUPLEX_UNKNOWN 0xff 656 #define PORT_TP 0x00 657 #define PORT_AUI 0x01 658 #define PORT_MII 0x02 659 #define PORT_FIBRE 0x03 660 #define PORT_BNC 0x04 661 #define PORT_DA 0x05 662 #define PORT_NONE 0xef 663 #define PORT_OTHER 0xff 664 #define XCVR_INTERNAL 0x00 665 #define XCVR_EXTERNAL 0x01 666 #define XCVR_DUMMY1 0x02 667 #define XCVR_DUMMY2 0x03 668 #define XCVR_DUMMY3 0x04 669 #define AUTONEG_DISABLE 0x00 670 #define AUTONEG_ENABLE 0x01 671 #define ETH_TP_MDI_INVALID 0x00 672 #define ETH_TP_MDI 0x01 673 #define ETH_TP_MDI_X 0x02 674 #define ETH_TP_MDI_AUTO 0x03 675 #define WAKE_PHY (1 << 0) 676 #define WAKE_UCAST (1 << 1) 677 #define WAKE_MCAST (1 << 2) 678 #define WAKE_BCAST (1 << 3) 679 #define WAKE_ARP (1 << 4) 680 #define WAKE_MAGIC (1 << 5) 681 #define WAKE_MAGICSECURE (1 << 6) 682 #define TCP_V4_FLOW 0x01 683 #define UDP_V4_FLOW 0x02 684 #define SCTP_V4_FLOW 0x03 685 #define AH_ESP_V4_FLOW 0x04 686 #define TCP_V6_FLOW 0x05 687 #define UDP_V6_FLOW 0x06 688 #define SCTP_V6_FLOW 0x07 689 #define AH_ESP_V6_FLOW 0x08 690 #define AH_V4_FLOW 0x09 691 #define ESP_V4_FLOW 0x0a 692 #define AH_V6_FLOW 0x0b 693 #define ESP_V6_FLOW 0x0c 694 #define IPV4_USER_FLOW 0x0d 695 #define IP_USER_FLOW IPV4_USER_FLOW 696 #define IPV6_USER_FLOW 0x0e 697 #define IPV4_FLOW 0x10 698 #define IPV6_FLOW 0x11 699 #define ETHER_FLOW 0x12 700 #define FLOW_EXT 0x80000000 701 #define FLOW_MAC_EXT 0x40000000 702 #define RXH_L2DA (1 << 1) 703 #define RXH_VLAN (1 << 2) 704 #define RXH_L3_PROTO (1 << 3) 705 #define RXH_IP_SRC (1 << 4) 706 #define RXH_IP_DST (1 << 5) 707 #define RXH_L4_B_0_1 (1 << 6) 708 #define RXH_L4_B_2_3 (1 << 7) 709 #define RXH_DISCARD (1 << 31) 710 #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL 711 #define RX_CLS_LOC_SPECIAL 0x80000000 712 #define RX_CLS_LOC_ANY 0xffffffff 713 #define RX_CLS_LOC_FIRST 0xfffffffe 714 #define RX_CLS_LOC_LAST 0xfffffffd 715 #define ETH_MODULE_SFF_8079 0x1 716 #define ETH_MODULE_SFF_8079_LEN 256 717 #define ETH_MODULE_SFF_8472 0x2 718 #define ETH_MODULE_SFF_8472_LEN 512 719 #define ETH_MODULE_SFF_8636 0x3 720 #define ETH_MODULE_SFF_8636_LEN 256 721 #define ETH_MODULE_SFF_8436 0x4 722 #define ETH_MODULE_SFF_8436_LEN 256 723 enum ethtool_reset_flags { 724 ETH_RESET_MGMT = 1 << 0, 725 ETH_RESET_IRQ = 1 << 1, 726 ETH_RESET_DMA = 1 << 2, 727 ETH_RESET_FILTER = 1 << 3, 728 ETH_RESET_OFFLOAD = 1 << 4, 729 ETH_RESET_MAC = 1 << 5, 730 ETH_RESET_PHY = 1 << 6, 731 ETH_RESET_RAM = 1 << 7, 732 ETH_RESET_DEDICATED = 0x0000ffff, 733 ETH_RESET_ALL = 0xffffffff, 734 }; 735 #define ETH_RESET_SHARED_SHIFT 16 736 struct ethtool_link_settings { 737 __u32 cmd; 738 __u32 speed; 739 __u8 duplex; 740 __u8 port; 741 __u8 phy_address; 742 __u8 autoneg; 743 __u8 mdio_support; 744 __u8 eth_tp_mdix; 745 __u8 eth_tp_mdix_ctrl; 746 __s8 link_mode_masks_nwords; 747 __u8 transceiver; 748 __u8 reserved1[3]; 749 __u32 reserved[7]; 750 __u32 link_mode_masks[0]; 751 }; 752 #endif 753
