1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _I2O_DEV_H 20 #define _I2O_DEV_H 21 #define MAX_I2O_CONTROLLERS 32 22 #include <linux/ioctl.h> 23 #include <linux/types.h> 24 #define I2O_MAGIC_NUMBER 'i' 25 #define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER, 0, __u8[MAX_I2O_CONTROLLERS]) 26 #define I2OHRTGET _IOWR(I2O_MAGIC_NUMBER, 1, struct i2o_cmd_hrtlct) 27 #define I2OLCTGET _IOWR(I2O_MAGIC_NUMBER, 2, struct i2o_cmd_hrtlct) 28 #define I2OPARMSET _IOWR(I2O_MAGIC_NUMBER, 3, struct i2o_cmd_psetget) 29 #define I2OPARMGET _IOWR(I2O_MAGIC_NUMBER, 4, struct i2o_cmd_psetget) 30 #define I2OSWDL _IOWR(I2O_MAGIC_NUMBER, 5, struct i2o_sw_xfer) 31 #define I2OSWUL _IOWR(I2O_MAGIC_NUMBER, 6, struct i2o_sw_xfer) 32 #define I2OSWDEL _IOWR(I2O_MAGIC_NUMBER, 7, struct i2o_sw_xfer) 33 #define I2OVALIDATE _IOR(I2O_MAGIC_NUMBER, 8, __u32) 34 #define I2OHTML _IOWR(I2O_MAGIC_NUMBER, 9, struct i2o_html) 35 #define I2OEVTREG _IOW(I2O_MAGIC_NUMBER, 10, struct i2o_evt_id) 36 #define I2OEVTGET _IOR(I2O_MAGIC_NUMBER, 11, struct i2o_evt_info) 37 #define I2OPASSTHRU _IOR(I2O_MAGIC_NUMBER, 12, struct i2o_cmd_passthru) 38 #define I2OPASSTHRU32 _IOR(I2O_MAGIC_NUMBER, 12, struct i2o_cmd_passthru32) 39 struct i2o_cmd_passthru32 { 40 unsigned int iop; 41 __u32 msg; 42 }; 43 struct i2o_cmd_passthru { 44 unsigned int iop; 45 void __user * msg; 46 }; 47 struct i2o_cmd_hrtlct { 48 unsigned int iop; 49 void __user * resbuf; 50 unsigned int __user * reslen; 51 }; 52 struct i2o_cmd_psetget { 53 unsigned int iop; 54 unsigned int tid; 55 void __user * opbuf; 56 unsigned int oplen; 57 void __user * resbuf; 58 unsigned int __user * reslen; 59 }; 60 struct i2o_sw_xfer { 61 unsigned int iop; 62 unsigned char flags; 63 unsigned char sw_type; 64 unsigned int sw_id; 65 void __user * buf; 66 unsigned int __user * swlen; 67 unsigned int __user * maxfrag; 68 unsigned int __user * curfrag; 69 }; 70 struct i2o_html { 71 unsigned int iop; 72 unsigned int tid; 73 unsigned int page; 74 void __user * resbuf; 75 unsigned int __user * reslen; 76 void __user * qbuf; 77 unsigned int qlen; 78 }; 79 #define I2O_EVT_Q_LEN 32 80 struct i2o_evt_id { 81 unsigned int iop; 82 unsigned int tid; 83 unsigned int evt_mask; 84 }; 85 #define I2O_EVT_DATA_SIZE 88 86 struct i2o_evt_info { 87 struct i2o_evt_id id; 88 unsigned char evt_data[I2O_EVT_DATA_SIZE]; 89 unsigned int data_size; 90 }; 91 struct i2o_evt_get { 92 struct i2o_evt_info info; 93 int pending; 94 int lost; 95 }; 96 typedef struct i2o_sg_io_hdr { 97 unsigned int flags; 98 } i2o_sg_io_hdr_t; 99 #define I2O_BUS_LOCAL 0 100 #define I2O_BUS_ISA 1 101 #define I2O_BUS_EISA 2 102 #define I2O_BUS_PCI 4 103 #define I2O_BUS_PCMCIA 5 104 #define I2O_BUS_NUBUS 6 105 #define I2O_BUS_CARDBUS 7 106 #define I2O_BUS_UNKNOWN 0x80 107 typedef struct _i2o_pci_bus { 108 __u8 PciFunctionNumber; 109 __u8 PciDeviceNumber; 110 __u8 PciBusNumber; 111 __u8 reserved; 112 __u16 PciVendorID; 113 __u16 PciDeviceID; 114 } i2o_pci_bus; 115 typedef struct _i2o_local_bus { 116 __u16 LbBaseIOPort; 117 __u16 reserved; 118 __u32 LbBaseMemoryAddress; 119 } i2o_local_bus; 120 typedef struct _i2o_isa_bus { 121 __u16 IsaBaseIOPort; 122 __u8 CSN; 123 __u8 reserved; 124 __u32 IsaBaseMemoryAddress; 125 } i2o_isa_bus; 126 typedef struct _i2o_eisa_bus_info { 127 __u16 EisaBaseIOPort; 128 __u8 reserved; 129 __u8 EisaSlotNumber; 130 __u32 EisaBaseMemoryAddress; 131 } i2o_eisa_bus; 132 typedef struct _i2o_mca_bus { 133 __u16 McaBaseIOPort; 134 __u8 reserved; 135 __u8 McaSlotNumber; 136 __u32 McaBaseMemoryAddress; 137 } i2o_mca_bus; 138 typedef struct _i2o_other_bus { 139 __u16 BaseIOPort; 140 __u16 reserved; 141 __u32 BaseMemoryAddress; 142 } i2o_other_bus; 143 typedef struct _i2o_hrt_entry { 144 __u32 adapter_id; 145 __u32 parent_tid : 12; 146 __u32 state : 4; 147 __u32 bus_num : 8; 148 __u32 bus_type : 8; 149 union { 150 i2o_pci_bus pci_bus; 151 i2o_local_bus local_bus; 152 i2o_isa_bus isa_bus; 153 i2o_eisa_bus eisa_bus; 154 i2o_mca_bus mca_bus; 155 i2o_other_bus other_bus; 156 } bus; 157 } i2o_hrt_entry; 158 typedef struct _i2o_hrt { 159 __u16 num_entries; 160 __u8 entry_len; 161 __u8 hrt_version; 162 __u32 change_ind; 163 i2o_hrt_entry hrt_entry[1]; 164 } i2o_hrt; 165 typedef struct _i2o_lct_entry { 166 __u32 entry_size : 16; 167 __u32 tid : 12; 168 __u32 reserved : 4; 169 __u32 change_ind; 170 __u32 device_flags; 171 __u32 class_id : 12; 172 __u32 version : 4; 173 __u32 vendor_id : 16; 174 __u32 sub_class; 175 __u32 user_tid : 12; 176 __u32 parent_tid : 12; 177 __u32 bios_info : 8; 178 __u8 identity_tag[8]; 179 __u32 event_capabilities; 180 } i2o_lct_entry; 181 typedef struct _i2o_lct { 182 __u32 table_size : 16; 183 __u32 boot_tid : 12; 184 __u32 lct_ver : 4; 185 __u32 iop_flags; 186 __u32 change_ind; 187 i2o_lct_entry lct_entry[1]; 188 } i2o_lct; 189 typedef struct _i2o_status_block { 190 __u16 org_id; 191 __u16 reserved; 192 __u16 iop_id : 12; 193 __u16 reserved1 : 4; 194 __u16 host_unit_id; 195 __u16 segment_number : 12; 196 __u16 i2o_version : 4; 197 __u8 iop_state; 198 __u8 msg_type; 199 __u16 inbound_frame_size; 200 __u8 init_code; 201 __u8 reserved2; 202 __u32 max_inbound_frames; 203 __u32 cur_inbound_frames; 204 __u32 max_outbound_frames; 205 char product_id[24]; 206 __u32 expected_lct_size; 207 __u32 iop_capabilities; 208 __u32 desired_mem_size; 209 __u32 current_mem_size; 210 __u32 current_mem_base; 211 __u32 desired_io_size; 212 __u32 current_io_size; 213 __u32 current_io_base; 214 __u32 reserved3 : 24; 215 __u32 cmd_status : 8; 216 } i2o_status_block; 217 #define I2O_EVT_IND_STATE_CHANGE 0x80000000 218 #define I2O_EVT_IND_GENERAL_WARNING 0x40000000 219 #define I2O_EVT_IND_CONFIGURATION_FLAG 0x20000000 220 #define I2O_EVT_IND_LOCK_RELEASE 0x10000000 221 #define I2O_EVT_IND_CAPABILITY_CHANGE 0x08000000 222 #define I2O_EVT_IND_DEVICE_RESET 0x04000000 223 #define I2O_EVT_IND_EVT_MASK_MODIFIED 0x02000000 224 #define I2O_EVT_IND_FIELD_MODIFIED 0x01000000 225 #define I2O_EVT_IND_VENDOR_EVT 0x00800000 226 #define I2O_EVT_IND_DEVICE_STATE 0x00400000 227 #define I2O_EVT_IND_EXEC_RESOURCE_LIMITS 0x00000001 228 #define I2O_EVT_IND_EXEC_CONNECTION_FAIL 0x00000002 229 #define I2O_EVT_IND_EXEC_ADAPTER_FAULT 0x00000004 230 #define I2O_EVT_IND_EXEC_POWER_FAIL 0x00000008 231 #define I2O_EVT_IND_EXEC_RESET_PENDING 0x00000010 232 #define I2O_EVT_IND_EXEC_RESET_IMMINENT 0x00000020 233 #define I2O_EVT_IND_EXEC_HW_FAIL 0x00000040 234 #define I2O_EVT_IND_EXEC_XCT_CHANGE 0x00000080 235 #define I2O_EVT_IND_EXEC_NEW_LCT_ENTRY 0x00000100 236 #define I2O_EVT_IND_EXEC_MODIFIED_LCT 0x00000200 237 #define I2O_EVT_IND_EXEC_DDM_AVAILABILITY 0x00000400 238 #define I2O_EVT_IND_BSA_VOLUME_LOAD 0x00000001 239 #define I2O_EVT_IND_BSA_VOLUME_UNLOAD 0x00000002 240 #define I2O_EVT_IND_BSA_VOLUME_UNLOAD_REQ 0x00000004 241 #define I2O_EVT_IND_BSA_CAPACITY_CHANGE 0x00000008 242 #define I2O_EVT_IND_BSA_SCSI_SMART 0x00000010 243 #define I2O_EVT_STATE_CHANGE_NORMAL 0x00 244 #define I2O_EVT_STATE_CHANGE_SUSPENDED 0x01 245 #define I2O_EVT_STATE_CHANGE_RESTART 0x02 246 #define I2O_EVT_STATE_CHANGE_NA_RECOVER 0x03 247 #define I2O_EVT_STATE_CHANGE_NA_NO_RECOVER 0x04 248 #define I2O_EVT_STATE_CHANGE_QUIESCE_REQUEST 0x05 249 #define I2O_EVT_STATE_CHANGE_FAILED 0x10 250 #define I2O_EVT_STATE_CHANGE_FAULTED 0x11 251 #define I2O_EVT_GEN_WARNING_NORMAL 0x00 252 #define I2O_EVT_GEN_WARNING_ERROR_THRESHOLD 0x01 253 #define I2O_EVT_GEN_WARNING_MEDIA_FAULT 0x02 254 #define I2O_EVT_CAPABILITY_OTHER 0x01 255 #define I2O_EVT_CAPABILITY_CHANGED 0x02 256 #define I2O_EVT_SENSOR_STATE_CHANGED 0x01 257 #define I2O_CLASS_VERSION_10 0x00 258 #define I2O_CLASS_VERSION_11 0x01 259 #define I2O_CLASS_EXECUTIVE 0x000 260 #define I2O_CLASS_DDM 0x001 261 #define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010 262 #define I2O_CLASS_SEQUENTIAL_STORAGE 0x011 263 #define I2O_CLASS_LAN 0x020 264 #define I2O_CLASS_WAN 0x030 265 #define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040 266 #define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041 267 #define I2O_CLASS_SCSI_PERIPHERAL 0x051 268 #define I2O_CLASS_ATE_PORT 0x060 269 #define I2O_CLASS_ATE_PERIPHERAL 0x061 270 #define I2O_CLASS_FLOPPY_CONTROLLER 0x070 271 #define I2O_CLASS_FLOPPY_DEVICE 0x071 272 #define I2O_CLASS_BUS_ADAPTER 0x080 273 #define I2O_CLASS_PEER_TRANSPORT_AGENT 0x090 274 #define I2O_CLASS_PEER_TRANSPORT 0x091 275 #define I2O_CLASS_END 0xfff 276 #define I2O_CLASS_MATCH_ANYCLASS 0xffffffff 277 #define I2O_SUBCLASS_i960 0x001 278 #define I2O_SUBCLASS_HDM 0x020 279 #define I2O_SUBCLASS_ISM 0x021 280 #define I2O_PARAMS_FIELD_GET 0x0001 281 #define I2O_PARAMS_LIST_GET 0x0002 282 #define I2O_PARAMS_MORE_GET 0x0003 283 #define I2O_PARAMS_SIZE_GET 0x0004 284 #define I2O_PARAMS_TABLE_GET 0x0005 285 #define I2O_PARAMS_FIELD_SET 0x0006 286 #define I2O_PARAMS_LIST_SET 0x0007 287 #define I2O_PARAMS_ROW_ADD 0x0008 288 #define I2O_PARAMS_ROW_DELETE 0x0009 289 #define I2O_PARAMS_TABLE_CLEAR 0x000A 290 #define I2O_SNFORMAT_UNKNOWN 0 291 #define I2O_SNFORMAT_BINARY 1 292 #define I2O_SNFORMAT_ASCII 2 293 #define I2O_SNFORMAT_UNICODE 3 294 #define I2O_SNFORMAT_LAN48_MAC 4 295 #define I2O_SNFORMAT_WAN 5 296 #define I2O_SNFORMAT_LAN64_MAC 6 297 #define I2O_SNFORMAT_DDM 7 298 #define I2O_SNFORMAT_IEEE_REG64 8 299 #define I2O_SNFORMAT_IEEE_REG128 9 300 #define I2O_SNFORMAT_UNKNOWN2 0xff 301 #define ADAPTER_STATE_INITIALIZING 0x01 302 #define ADAPTER_STATE_RESET 0x02 303 #define ADAPTER_STATE_HOLD 0x04 304 #define ADAPTER_STATE_READY 0x05 305 #define ADAPTER_STATE_OPERATIONAL 0x08 306 #define ADAPTER_STATE_FAILED 0x10 307 #define ADAPTER_STATE_FAULTED 0x11 308 #define I2O_SOFTWARE_MODULE_IRTOS 0x11 309 #define I2O_SOFTWARE_MODULE_IOP_PRIVATE 0x22 310 #define I2O_SOFTWARE_MODULE_IOP_CONFIG 0x23 311 #define I2O_VENDOR_DPT 0x001b 312 #define I2O_DPT_SG_FLAG_INTERPRET 0x00010000 313 #define I2O_DPT_SG_FLAG_PHYSICAL 0x00020000 314 #define I2O_DPT_FLASH_FRAG_SIZE 0x10000 315 #define I2O_DPT_FLASH_READ 0x0101 316 #define I2O_DPT_FLASH_WRITE 0x0102 317 #endif 318
