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      1 /** @file
      2 *
      3 *  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
      4 *  Copyright (c) 2016, Hisilicon Limited. All rights reserved.
      5 *  Copyright (c) 2016, Linaro Limited. All rights reserved.
      6 *
      7 *  This program and the accompanying materials
      8 *  are licensed and made available under the terms and conditions of the BSD License
      9 *  which accompanies this distribution.  The full text of the license may be found at
     10 *  http://opensource.org/licenses/bsd-license.php
     11 *
     12 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     13 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     14 *
     15 *  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
     16 *
     17 **/
     18 
     19 Scope(_SB)
     20 {
     21   // PCIe Root bus
     22   Device (PCI1)
     23   {
     24     Name (_HID, "HISI0080") // PCI Express Root Bridge
     25     Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
     26     Name(_SEG, 1) // Segment of this Root complex
     27     Name(_BBN, 64) // Base Bus Number
     28     Name(_CCA, 1)
     29     Method (_CRS, 0, Serialized) { // Root complex resources
     30       Name (RBUF, ResourceTemplate () {
     31         WordBusNumber ( // Bus numbers assigned to this root
     32           ResourceProducer, MinFixed, MaxFixed, PosDecode,
     33           0, // AddressGranularity
     34           64, // AddressMinimum - Minimum Bus Number
     35           127, // AddressMaximum - Maximum Bus Number
     36           0, // AddressTranslation - Set to 0
     37           64 // RangeLength - Number of Busses
     38         )
     39         QWordMemory ( // 64-bit BAR Windows
     40           ResourceProducer,
     41           PosDecode,
     42           MinFixed,
     43           MaxFixed,
     44           Cacheable,
     45           ReadWrite,
     46           0x0000000000000000, // Granularity
     47           0x00000000b0000000, // Min Base Address pci address
     48           0x00000000b7feffff, // Max Base Address
     49           0x0000021f58000000, // Translate
     50           0x0000000007ff0000 // Length
     51         )
     52         QWordIO (
     53           ResourceProducer,
     54           MinFixed,
     55           MaxFixed,
     56           PosDecode,
     57           EntireRange,
     58           0x0000000000000000, // Granularity
     59           0x0000000000000000, // Min Base Address
     60           0x000000000000ffff, // Max Base Address
     61           0x000002200fff0000, // Translate
     62           0x0000000000010000 // Length
     63         )
     64       }) // Name(RBUF)
     65       Return (RBUF)
     66     } // Method(_CRS)
     67 
     68     Device (RES1)
     69     {
     70       Name (_HID, "HISI0081") // HiSi PCIe RC config base address
     71       Name (_CRS, ResourceTemplate (){
     72         Memory32Fixed (ReadWrite, 0xb0080000 , 0x10000)
     73       })
     74     }
     75 
     76     OperationRegion(SCTR, SystemMemory, 0xb0006918, 4)
     77     Field(SCTR, AnyAcc, NoLock, Preserve) {
     78       LSTA, 32,
     79     }
     80     Method(_DSM, 0x4, Serialized) {
     81       If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949"))) {
     82 
     83         switch(ToInteger(Arg2))
     84         {
     85           // Function 0: Return LinkStatus
     86           case(0) {
     87               Store (0, Local0)
     88               Store (LSTA, Local0)
     89               Return (Local0)
     90           }
     91           default {
     92           }
     93         }
     94       }
     95       // If not one of the function identifiers we recognize, then return a buffer
     96       // with bit 0 set to 0 indicating no functions supported.
     97       return(Buffer(){0})
     98     }
     99   } // Device(PCI1)
    100 
    101   // PCIe Root bus
    102   Device (PCI2)
    103   {
    104     Name (_HID, "HISI0080") // PCI Express Root Bridge
    105     Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
    106     Name(_SEG, 2) // Segment of this Root complex
    107     Name(_BBN, 128) // Base Bus Number
    108     Name(_CCA, 1)
    109     Method (_CRS, 0, Serialized) { // Root complex resources
    110       Name (RBUF, ResourceTemplate () {
    111         WordBusNumber ( // Bus numbers assigned to this root
    112           ResourceProducer, MinFixed, MaxFixed, PosDecode,
    113           0, // AddressGranularity
    114           128, // AddressMinimum - Minimum Bus Number
    115           191, // AddressMaximum - Maximum Bus Number
    116           0, // AddressTranslation - Set to 0
    117           64 // RangeLength - Number of Busses
    118         )
    119         QWordMemory ( // 64-bit BAR Windows
    120           ResourceProducer,
    121           PosDecode,
    122           MinFixed,
    123           MaxFixed,
    124           Cacheable,
    125           ReadWrite,
    126           0x0000000000000000, // Granularity
    127           0x00000000c0000000, // Min Base Address
    128           0x00000000c3feffff, // Max Base Address
    129           0x0000023f4c000000, // Translate
    130           0x0000000003ff0000 // Length
    131         )
    132         QWordIO (
    133           ResourceProducer,
    134           MinFixed,
    135           MaxFixed,
    136           PosDecode,
    137           EntireRange,
    138           0x0000000000000000, // Granularity
    139           0x0000000000000000, // Min Base Address
    140           0x000000000000ffff, // Max Base Address
    141           0x000002400fff0000, // Translate
    142           0x0000000000010000 // Length
    143         )
    144       }) // Name(RBUF)
    145       Return (RBUF)
    146     } // Method(_CRS)
    147 
    148     Device (RES2)
    149     {
    150       Name (_HID, "HISI0081") // HiSi PCIe RC config base address
    151       Name (_CRS, ResourceTemplate (){
    152         Memory32Fixed (ReadWrite, 0xb0090000 , 0x10000)
    153       })
    154     }
    155 
    156     OperationRegion(SCTR, SystemMemory, 0xb0006a18, 4)
    157     Field(SCTR, AnyAcc, NoLock, Preserve) {
    158       LSTA, 32,
    159     }
    160     Method(_DSM, 0x4, Serialized) {
    161       If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949")))
    162       {
    163         switch(ToInteger(Arg2))
    164         {
    165           // Function 0: Return LinkStatus
    166           case(0) {
    167               Store (0, Local0)
    168               Store (LSTA, Local0)
    169               Return (Local0)
    170           }
    171           default {
    172           }
    173         }
    174       }
    175       // If not one of the function identifiers we recognize, then return a buffer
    176       // with bit 0 set to 0 indicating no functions supported.
    177       return(Buffer(){0})
    178     }
    179   } // Device(PCI2)
    180 }
    181 
    182