1 /* 2 * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <aem_generic.h> 7 #include <arch.h> 8 #include <asm_macros.S> 9 #include <cpu_macros.S> 10 11 func aem_generic_core_pwr_dwn 12 /* --------------------------------------------- 13 * Disable the Data Cache. 14 * --------------------------------------------- 15 */ 16 mrs x1, sctlr_el3 17 bic x1, x1, #SCTLR_C_BIT 18 msr sctlr_el3, x1 19 isb 20 21 mov x0, #DCCISW 22 23 /* --------------------------------------------- 24 * Flush L1 cache to PoU. 25 * --------------------------------------------- 26 */ 27 b dcsw_op_louis 28 endfunc aem_generic_core_pwr_dwn 29 30 31 func aem_generic_cluster_pwr_dwn 32 /* --------------------------------------------- 33 * Disable the Data Cache. 34 * --------------------------------------------- 35 */ 36 mrs x1, sctlr_el3 37 bic x1, x1, #SCTLR_C_BIT 38 msr sctlr_el3, x1 39 isb 40 41 /* --------------------------------------------- 42 * Flush L1 and L2 caches to PoC. 43 * --------------------------------------------- 44 */ 45 mov x0, #DCCISW 46 b dcsw_op_all 47 endfunc aem_generic_cluster_pwr_dwn 48 49 /* --------------------------------------------- 50 * This function provides cpu specific 51 * register information for crash reporting. 52 * It needs to return with x6 pointing to 53 * a list of register names in ascii and 54 * x8 - x15 having values of registers to be 55 * reported. 56 * --------------------------------------------- 57 */ 58 .section .rodata.aem_generic_regs, "aS" 59 aem_generic_regs: /* The ascii list of register names to be reported */ 60 .asciz "" /* no registers to report */ 61 62 func aem_generic_cpu_reg_dump 63 adr x6, aem_generic_regs 64 ret 65 endfunc aem_generic_cpu_reg_dump 66 67 68 /* cpu_ops for Base AEM FVP */ 69 declare_cpu_ops aem_generic, BASE_AEM_MIDR, CPU_NO_RESET_FUNC, \ 70 aem_generic_core_pwr_dwn, \ 71 aem_generic_cluster_pwr_dwn 72 73 /* cpu_ops for Foundation FVP */ 74 declare_cpu_ops aem_generic, FOUNDATION_AEM_MIDR, CPU_NO_RESET_FUNC, \ 75 aem_generic_core_pwr_dwn, \ 76 aem_generic_cluster_pwr_dwn 77
