1 /* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <plat_arm.h> 8 #include <tbbr_img_def.h> 9 #include "fvp_private.h" 10 11 12 /******************************************************************************* 13 * Perform any BL1 specific platform actions. 14 ******************************************************************************/ 15 void bl1_early_platform_setup(void) 16 { 17 arm_bl1_early_platform_setup(); 18 19 /* Initialize the platform config for future decision making */ 20 fvp_config_setup(); 21 22 /* 23 * Initialize Interconnect for this cluster during cold boot. 24 * No need for locks as no other CPU is active. 25 */ 26 fvp_interconnect_init(); 27 /* 28 * Enable coherency in Interconnect for the primary CPU's cluster. 29 */ 30 fvp_interconnect_enable(); 31 } 32 33 /******************************************************************************* 34 * The following function checks if Firmware update is needed, 35 * by checking if TOC in FIP image is valid or not. 36 ******************************************************************************/ 37 unsigned int bl1_plat_get_next_image_id(void) 38 { 39 if (!arm_io_is_toc_valid()) 40 return NS_BL1U_IMAGE_ID; 41 42 return BL2_IMAGE_ID; 43 } 44 45
