1 /* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <bl_common.h> 8 #include <errno.h> 9 #include <plat_arm.h> 10 #include <platform.h> 11 #include <sp805.h> 12 #include <tbbr_img_def.h> 13 #include <v2m_def.h> 14 15 #define RESET_REASON_WDOG_RESET (0x2) 16 17 void juno_reset_to_aarch32_state(void); 18 19 20 /******************************************************************************* 21 * The following function checks if Firmware update is needed, 22 * by checking if TOC in FIP image is valid or watchdog reset happened. 23 ******************************************************************************/ 24 unsigned int bl1_plat_get_next_image_id(void) 25 { 26 unsigned int *reset_flags_ptr = (unsigned int *)SSC_GPRETN; 27 unsigned int *nv_flags_ptr = (unsigned int *) 28 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS); 29 /* 30 * Check if TOC is invalid or watchdog reset happened. 31 */ 32 if ((arm_io_is_toc_valid() != 1) || 33 ((*reset_flags_ptr & RESET_REASON_WDOG_RESET) && 34 ((*nv_flags_ptr == -EAUTH) || (*nv_flags_ptr == -ENOENT)))) 35 return NS_BL1U_IMAGE_ID; 36 37 return BL2_IMAGE_ID; 38 } 39 40 /******************************************************************************* 41 * On JUNO update the arg2 with address of SCP_BL2U image info. 42 ******************************************************************************/ 43 void bl1_plat_set_ep_info(unsigned int image_id, 44 entry_point_info_t *ep_info) 45 { 46 if (image_id == BL2U_IMAGE_ID) { 47 image_desc_t *image_desc = bl1_plat_get_image_desc(SCP_BL2U_IMAGE_ID); 48 ep_info->args.arg2 = (unsigned long)&image_desc->image_info; 49 } 50 } 51 52 /******************************************************************************* 53 * On Juno clear SYS_NVFLAGS and wait for watchdog reset. 54 ******************************************************************************/ 55 __dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved) 56 { 57 unsigned int *nv_flags_clr = (unsigned int *) 58 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR); 59 unsigned int *nv_flags_ptr = (unsigned int *) 60 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS); 61 62 /* Clear the NV flags register. */ 63 *nv_flags_clr = *nv_flags_ptr; 64 65 while (1) 66 wfi(); 67 } 68 69 #if JUNO_AARCH32_EL3_RUNTIME 70 void bl1_plat_prepare_exit(entry_point_info_t *ep_info) 71 { 72 #if !ARM_DISABLE_TRUSTED_WDOG 73 /* Disable watchdog before leaving BL1 */ 74 sp805_stop(ARM_SP805_TWDG_BASE); 75 #endif 76 77 juno_reset_to_aarch32_state(); 78 } 79 #endif /* JUNO_AARCH32_EL3_RUNTIME */ 80
