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      1 /*
      2  * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * SPDX-License-Identifier: BSD-3-Clause
      5  */
      6 
      7 #include <arch_helpers.h>
      8 #include <bl_common.h>
      9 #include <platform_def.h>
     10 #include <arm_xlat_tables.h>
     11 #include "qemu_private.h"
     12 
     13 #define MAP_DEVICE0	MAP_REGION_FLAT(DEVICE0_BASE,			\
     14 					DEVICE0_SIZE,			\
     15 					MT_DEVICE | MT_RW | MT_SECURE)
     16 
     17 #ifdef DEVICE1_BASE
     18 #define MAP_DEVICE1	MAP_REGION_FLAT(DEVICE1_BASE,			\
     19 					DEVICE1_SIZE,			\
     20 					MT_DEVICE | MT_RW | MT_SECURE)
     21 #endif
     22 
     23 #ifdef DEVICE2_BASE
     24 #define MAP_DEVICE2	MAP_REGION_FLAT(DEVICE2_BASE,			\
     25 					DEVICE2_SIZE,			\
     26 					MT_DEVICE | MT_RO | MT_SECURE)
     27 #endif
     28 
     29 #define MAP_SHARED_RAM	MAP_REGION_FLAT(SHARED_RAM_BASE,		\
     30 					SHARED_RAM_SIZE,		\
     31 					MT_DEVICE  | MT_RW | MT_SECURE)
     32 
     33 #define MAP_BL32_MEM	MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE,	\
     34 					MT_MEMORY | MT_RW | MT_SECURE)
     35 
     36 #define MAP_NS_DRAM0	MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE,	\
     37 					MT_MEMORY | MT_RW | MT_NS)
     38 
     39 #define MAP_FLASH0	MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \
     40 					MT_MEMORY | MT_RO | MT_SECURE)
     41 
     42 /*
     43  * Table of regions for various BL stages to map using the MMU.
     44  * This doesn't include TZRAM as the 'mem_layout' argument passed to
     45  * arm_configure_mmu_elx() will give the available subset of that,
     46  */
     47 #ifdef IMAGE_BL1
     48 static const mmap_region_t plat_qemu_mmap[] = {
     49 	MAP_FLASH0,
     50 	MAP_SHARED_RAM,
     51 	MAP_DEVICE0,
     52 #ifdef MAP_DEVICE1
     53 	MAP_DEVICE1,
     54 #endif
     55 #ifdef MAP_DEVICE2
     56 	MAP_DEVICE2,
     57 #endif
     58 	{0}
     59 };
     60 #endif
     61 #ifdef IMAGE_BL2
     62 static const mmap_region_t plat_qemu_mmap[] = {
     63 	MAP_FLASH0,
     64 	MAP_SHARED_RAM,
     65 	MAP_DEVICE0,
     66 #ifdef MAP_DEVICE1
     67 	MAP_DEVICE1,
     68 #endif
     69 #ifdef MAP_DEVICE2
     70 	MAP_DEVICE2,
     71 #endif
     72 	MAP_NS_DRAM0,
     73 	MAP_BL32_MEM,
     74 	{0}
     75 };
     76 #endif
     77 #ifdef IMAGE_BL31
     78 static const mmap_region_t plat_qemu_mmap[] = {
     79 	MAP_SHARED_RAM,
     80 	MAP_DEVICE0,
     81 #ifdef MAP_DEVICE1
     82 	MAP_DEVICE1,
     83 #endif
     84 	MAP_BL32_MEM,
     85 	{0}
     86 };
     87 #endif
     88 
     89 /*******************************************************************************
     90  * Macro generating the code for the function setting up the pagetables as per
     91  * the platform memory map & initialize the mmu, for the given exception level
     92  ******************************************************************************/
     93 
     94 #define DEFINE_CONFIGURE_MMU_EL(_el)					\
     95 	void qemu_configure_mmu_el##_el(unsigned long total_base,	\
     96 				   unsigned long total_size,		\
     97 				   unsigned long ro_start,		\
     98 				   unsigned long ro_limit,		\
     99 				   unsigned long coh_start,		\
    100 				   unsigned long coh_limit)		\
    101 	{								\
    102 		mmap_add_region(total_base, total_base,			\
    103 				total_size,				\
    104 				MT_MEMORY | MT_RW | MT_SECURE);		\
    105 		mmap_add_region(ro_start, ro_start,			\
    106 				ro_limit - ro_start,			\
    107 				MT_MEMORY | MT_RO | MT_SECURE);		\
    108 		mmap_add_region(coh_start, coh_start,			\
    109 				coh_limit - coh_start,			\
    110 				MT_DEVICE | MT_RW | MT_SECURE);		\
    111 		mmap_add(plat_qemu_mmap);				\
    112 		init_xlat_tables();					\
    113 									\
    114 		enable_mmu_el##_el(0);					\
    115 	}
    116 
    117 /* Define EL1 and EL3 variants of the function initialising the MMU */
    118 DEFINE_CONFIGURE_MMU_EL(1)
    119 DEFINE_CONFIGURE_MMU_EL(3)
    120 
    121 
    122