1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __UNIPHIER_H__ 8 #define __UNIPHIER_H__ 9 10 #include <stdint.h> 11 #include <types.h> 12 13 unsigned int uniphier_get_soc_type(void); 14 unsigned int uniphier_get_soc_model(void); 15 unsigned int uniphier_get_soc_revision(void); 16 unsigned int uniphier_get_soc_id(void); 17 18 #define UNIPHIER_SOC_LD11 0 19 #define UNIPHIER_SOC_LD20 1 20 #define UNIPHIER_SOC_PXS3 2 21 #define UNIPHIER_SOC_UNKNOWN 0xffffffff 22 23 unsigned int uniphier_get_boot_device(unsigned int soc); 24 25 #define UNIPHIER_BOOT_DEVICE_EMMC 0 26 #define UNIPHIER_BOOT_DEVICE_NAND 1 27 #define UNIPHIER_BOOT_DEVICE_NOR 2 28 #define UNIPHIER_BOOT_DEVICE_USB 3 29 #define UNIPHIER_BOOT_DEVICE_RSV 0xffffffff 30 31 unsigned int uniphier_get_boot_master(unsigned int soc); 32 33 #define UNIPHIER_BOOT_MASTER_THIS 0 34 #define UNIPHIER_BOOT_MASTER_SCP 1 35 #define UNIPHIER_BOOT_MASTER_EXT 2 36 37 void uniphier_console_setup(void); 38 39 int uniphier_emmc_init(uintptr_t *block_dev_spec); 40 int uniphier_nand_init(uintptr_t *block_dev_spec); 41 int uniphier_usb_init(unsigned int soc, uintptr_t *block_dev_spec); 42 43 int uniphier_io_setup(unsigned int soc); 44 int uniphier_check_image(unsigned int image_id); 45 void uniphier_image_descs_fixup(void); 46 47 int uniphier_scp_is_running(void); 48 void uniphier_scp_start(void); 49 void uniphier_scp_open_com(void); 50 void uniphier_scp_system_off(void); 51 void uniphier_scp_system_reset(void); 52 53 struct mmap_region; 54 void uniphier_mmap_setup(uintptr_t total_base, size_t total_size, 55 const struct mmap_region *mmap); 56 57 void uniphier_cci_init(unsigned int soc); 58 void uniphier_cci_enable(void); 59 void uniphier_cci_disable(void); 60 61 void uniphier_gic_driver_init(unsigned int soc); 62 void uniphier_gic_init(void); 63 void uniphier_gic_cpuif_enable(void); 64 void uniphier_gic_cpuif_disable(void); 65 void uniphier_gic_pcpu_init(void); 66 67 unsigned int uniphier_calc_core_pos(u_register_t mpidr); 68 69 #define UNIPHIER_NS_DRAM_BASE 0x84000000 70 #define UNIPHIER_NS_DRAM_SIZE 0x01000000 71 72 #define UNIPHIER_BL33_BASE (UNIPHIER_NS_DRAM_BASE) 73 #define UNIPHIER_BL33_MAX_SIZE 0x00100000 74 75 #define UNIPHIER_SCP_BASE ((UNIPHIER_BL33_BASE) + \ 76 (UNIPHIER_BL33_MAX_SIZE)) 77 #define UNIPHIER_SCP_MAX_SIZE 0x00020000 78 79 #endif /* __UNIPHIER_H__ */ 80
