1 # 2 # Copyright (c) 2014, ARM Limited. All rights reserved. 3 # 4 # This program and the accompanying materials are licensed and made available 5 # under the terms and conditions of the BSD License which accompanies this 6 # distribution. The full text of the license may be found at 7 # http://opensource.org/licenses/bsd-license.php 8 # 9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 # 12 # 13 14 #include <AsmMacroIoLib.h> 15 #include <Library/ArmLib.h> 16 17 // For the moment we assume this will run in SVC mode on ARMv7 18 19 //UINT32 20 //EFIAPI 21 //ArmGicGetControlSystemRegisterEnable ( 22 // VOID 23 // ); 24 ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable) 25 mrc p15, 0, r0, c12, c12, 5 // ICC_SRE 26 bx lr 27 28 //VOID 29 //EFIAPI 30 //ArmGicSetControlSystemRegisterEnable ( 31 // IN UINT32 ControlSystemRegisterEnable 32 // ); 33 ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable) 34 mcr p15, 0, r0, c12, c12, 5 // ICC_SRE 35 isb 36 bx lr 37 38 //VOID 39 //ArmGicV3EnableInterruptInterface ( 40 // VOID 41 // ); 42 ASM_FUNC(ArmGicV3EnableInterruptInterface) 43 mov r0, #1 44 mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1 45 bx lr 46 47 //VOID 48 //ArmGicV3DisableInterruptInterface ( 49 // VOID 50 // ); 51 ASM_FUNC(ArmGicV3DisableInterruptInterface) 52 mov r0, #0 53 mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1 54 bx lr 55 56 //VOID 57 //ArmGicV3EndOfInterrupt ( 58 // IN UINTN InterruptId 59 // ); 60 ASM_FUNC(ArmGicV3EndOfInterrupt) 61 mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1 62 bx lr 63 64 //UINTN 65 //ArmGicV3AcknowledgeInterrupt ( 66 // VOID 67 // ); 68 ASM_FUNC(ArmGicV3AcknowledgeInterrupt) 69 mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1 70 bx lr 71 72 //VOID 73 //ArmGicV3SetPriorityMask ( 74 // IN UINTN Priority 75 // ); 76 ASM_FUNC(ArmGicV3SetPriorityMask) 77 mcr p15, 0, r0, c4, c6, 0 //ICC_PMR 78 bx lr 79 80 //VOID 81 //ArmGicV3SetBinaryPointer ( 82 // IN UINTN BinaryPoint 83 // ); 84 ASM_FUNC(ArmGicV3SetBinaryPointer) 85 mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1 86 bx lr 87