1 /** @file 2 * 3 * Copyright (c) 2013-2014, ARM Limited. All rights reserved. 4 * 5 * This program and the accompanying materials 6 * are licensed and made available under the terms and conditions of the BSD 7 * License which accompanies this distribution. The full text of the license 8 * may be found at http://opensource.org/licenses/bsd-license.php 9 * 10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 * 13 **/ 14 #ifndef __GENERIC_WATCHDOG_H__ 15 #define __GENERIC_WATCHDOG_H__ 16 17 // Refresh Frame: 18 #define GENERIC_WDOG_REFRESH_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogRefreshBase) + 0x000) 19 20 // Control Frame: 21 #define GENERIC_WDOG_CONTROL_STATUS_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x000) 22 #define GENERIC_WDOG_OFFSET_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x008) 23 #define GENERIC_WDOG_COMPARE_VALUE_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x010) 24 25 // Values of bit 0 of the Control/Status Register 26 #define GENERIC_WDOG_ENABLED 1 27 #define GENERIC_WDOG_DISABLED 0 28 29 #endif // __GENERIC_WATCHDOG_H__ 30
