1 /** @file 2 * 3 * Copyright (c) 2013-2014, ARM Limited. All rights reserved. 4 * 5 * This program and the accompanying materials 6 * are licensed and made available under the terms and conditions of the BSD License 7 * which accompanies this distribution. The full text of the license may be found at 8 * http://opensource.org/licenses/bsd-license.php 9 * 10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 * 13 **/ 14 15 #ifndef __ARM_JUNO_H__ 16 #define __ARM_JUNO_H__ 17 18 #include <VExpressMotherBoard.h> 19 20 /*********************************************************************************** 21 // Platform Memory Map 22 ************************************************************************************/ 23 24 // Motherboard Peripheral and On-chip peripheral 25 #define ARM_VE_BOARD_PERIPH_BASE 0x1C010000 26 #define ARM_VE_BOARD_SYS_ID 0x0000 27 #define ARM_VE_BOARD_SYS_PCIE_GBE_L 0x0074 28 #define ARM_VE_BOARD_SYS_PCIE_GBE_H 0x0078 29 30 #define ARM_VE_BOARD_SYS_ID_REV(word) ((word >> 28) & 0xff) 31 32 // NOR Flash 0 33 #define ARM_VE_SMB_NOR0_BASE 0x08000000 34 #define ARM_VE_SMB_NOR0_SZ SIZE_64MB 35 36 // Off-Chip peripherals (USB, Ethernet, VRAM) 37 #define ARM_VE_SMB_PERIPH_BASE 0x18000000 38 #define ARM_VE_SMB_PERIPH_SZ (SIZE_64MB + SIZE_2MB) 39 40 // On-Chip non-secure ROM 41 #define ARM_JUNO_NON_SECURE_ROM_BASE 0x1F000000 42 #define ARM_JUNO_NON_SECURE_ROM_SZ SIZE_16MB 43 44 // On-Chip Peripherals 45 #define ARM_JUNO_PERIPHERALS_BASE 0x20000000 46 #define ARM_JUNO_PERIPHERALS_SZ 0x0E000000 47 48 // PCIe MSI address window 49 #define ARM_JUNO_GIV2M_MSI_BASE 0x2c1c0000 50 #define ARM_JUNO_GIV2M_MSI_SZ SIZE_256KB 51 52 // PCIe MSI to SPI mapping range 53 #define ARM_JUNO_GIV2M_MSI_SPI_BASE 224 54 #define ARM_JUNO_GIV2M_MSI_SPI_COUNT 127 //TRM says last SPI is 351, 351-224=127 55 56 // On-Chip non-secure SRAM 57 #define ARM_JUNO_NON_SECURE_SRAM_BASE 0x2E000000 58 #define ARM_JUNO_NON_SECURE_SRAM_SZ SIZE_16MB 59 60 // SOC peripherals (HDLCD, UART, I2C, I2S, USB, SMC-PL354, etc) 61 #define ARM_JUNO_SOC_PERIPHERALS_BASE 0x7FF50000 62 #define ARM_JUNO_SOC_PERIPHERALS_SZ (SIZE_64KB * 9) 63 64 // 6GB of DRAM from the 64bit address space 65 #define ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE 0x0880000000 66 #define ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ (SIZE_2GB + SIZE_4GB) 67 68 // 69 // ACPI table information used to initialize tables. 70 // 71 #define EFI_ACPI_ARM_OEM_ID 'A','R','M','L','T','D' // OEMID 6 bytes long 72 #define EFI_ACPI_ARM_OEM_TABLE_ID SIGNATURE_64('A','R','M','-','J','U','N','O') // OEM table id 8 bytes long 73 #define EFI_ACPI_ARM_OEM_REVISION 0x20140727 74 #define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ') 75 #define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099 76 77 // A macro to initialise the common header part of EFI ACPI tables as defined by 78 // EFI_ACPI_DESCRIPTION_HEADER structure. 79 #define ARM_ACPI_HEADER(Signature, Type, Revision) { \ 80 Signature, /* UINT32 Signature */ \ 81 sizeof (Type), /* UINT32 Length */ \ 82 Revision, /* UINT8 Revision */ \ 83 0, /* UINT8 Checksum */ \ 84 { EFI_ACPI_ARM_OEM_ID }, /* UINT8 OemId[6] */ \ 85 EFI_ACPI_ARM_OEM_TABLE_ID, /* UINT64 OemTableId */ \ 86 EFI_ACPI_ARM_OEM_REVISION, /* UINT32 OemRevision */ \ 87 EFI_ACPI_ARM_CREATOR_ID, /* UINT32 CreatorId */ \ 88 EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ 89 } 90 91 // 92 // Hardware platform identifiers 93 // 94 #define JUNO_REVISION_PROTOTYPE 0 95 #define JUNO_REVISION_R0 1 96 #define JUNO_REVISION_R1 2 97 #define JUNO_REVISION_R2 3 98 #define JUNO_REVISION_UKNOWN 0xFF 99 100 // 101 // We detect whether we are running on a Juno r0, r1 or r2 102 // board at runtime by checking the value of board SYS_ID 103 // 104 #define GetJunoRevision(JunoRevision) \ 105 { \ 106 UINT32 SysId; \ 107 SysId = MmioRead32 (ARM_VE_BOARD_PERIPH_BASE+ARM_VE_BOARD_SYS_ID); \ 108 JunoRevision = ARM_VE_BOARD_SYS_ID_REV( SysId ); \ 109 } 110 111 #define JUNO_WATCHDOG_COUNT 2 112 113 // Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest 114 //#define ARM_JUNO_ACPI_5_0 115 116 // 117 // Address of the system registers that contain the MAC address 118 // assigned to the PCI Gigabyte Ethernet device. 119 // 120 121 #define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + ARM_VE_BOARD_SYS_PCIE_GBE_L) 122 #define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + ARM_VE_BOARD_SYS_PCIE_GBE_H) 123 124 #endif 125
